Message ID | 20211228005236.415583-3-jim.shu@sifive.com |
---|---|
State | New |
Headers | show |
Series | Align SiFive PDMA behavior to real hardware | expand |
On 12/28/21 01:52, Jim Shu wrote: > It's obvious that PDMA support 64-bit access of 64-bit registers, and > in previous commit, we confirm that PDMA support 32-bit access of both > 32/64-bit registers. Thus, we configure 32/64-bit memory access of > PDMA registers as valid in general. > > Signed-off-by: Jim Shu <jim.shu@sifive.com> > Reviewed-by: Frank Chang <frank.chang@sifive.com> > --- > hw/dma/sifive_pdma.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c > index b8b198ab4e..731fcdcf89 100644 > --- a/hw/dma/sifive_pdma.c > +++ b/hw/dma/sifive_pdma.c > @@ -441,6 +441,10 @@ static const MemoryRegionOps sifive_pdma_ops = { > .impl = { > .min_access_size = 4, > .max_access_size = 8, > + }, > + .valid = { > + .min_access_size = 4, > + .max_access_size = 8, > } > }; > Eh now I see this patch. It is correct, so: Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> But I think the previous patch could be simpler.
On Tue, Dec 28, 2021 at 10:54 AM Jim Shu <jim.shu@sifive.com> wrote: > > It's obvious that PDMA support 64-bit access of 64-bit registers, and > in previous commit, we confirm that PDMA support 32-bit access of both > 32/64-bit registers. Thus, we configure 32/64-bit memory access of > PDMA registers as valid in general. > > Signed-off-by: Jim Shu <jim.shu@sifive.com> > Reviewed-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/dma/sifive_pdma.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c > index b8b198ab4e..731fcdcf89 100644 > --- a/hw/dma/sifive_pdma.c > +++ b/hw/dma/sifive_pdma.c > @@ -441,6 +441,10 @@ static const MemoryRegionOps sifive_pdma_ops = { > .impl = { > .min_access_size = 4, > .max_access_size = 8, > + }, > + .valid = { > + .min_access_size = 4, > + .max_access_size = 8, > } > }; > > -- > 2.25.1 > >
On Tue, Dec 28, 2021 at 8:53 AM Jim Shu <jim.shu@sifive.com> wrote: > > It's obvious that PDMA support 64-bit access of 64-bit registers, and %s/support/supports > in previous commit, we confirm that PDMA support 32-bit access of both %s/support/supports > 32/64-bit registers. Thus, we configure 32/64-bit memory access of > PDMA registers as valid in general. > > Signed-off-by: Jim Shu <jim.shu@sifive.com> > Reviewed-by: Frank Chang <frank.chang@sifive.com> > --- > hw/dma/sifive_pdma.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c > index b8b198ab4e..731fcdcf89 100644 > --- a/hw/dma/sifive_pdma.c > +++ b/hw/dma/sifive_pdma.c > @@ -441,6 +441,10 @@ static const MemoryRegionOps sifive_pdma_ops = { > .impl = { > .min_access_size = 4, > .max_access_size = 8, > + }, > + .valid = { > + .min_access_size = 4, > + .max_access_size = 8, > } > }; > Otherwise, Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c index b8b198ab4e..731fcdcf89 100644 --- a/hw/dma/sifive_pdma.c +++ b/hw/dma/sifive_pdma.c @@ -441,6 +441,10 @@ static const MemoryRegionOps sifive_pdma_ops = { .impl = { .min_access_size = 4, .max_access_size = 8, + }, + .valid = { + .min_access_size = 4, + .max_access_size = 8, } };