| Message ID | 20211116100818.1615762-2-horatiu.vultur@microchip.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | phy: Add driver for lan966x Serdes driver | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
Hi Horatio, On Tue, Nov 16, 2021 at 11:16 AM Horatiu Vultur <horatiu.vultur@microchip.com> wrote: > Document the lan966x ethernet serdes phy driver bindings. > > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Thanks for your patch, which is now commit fd66e57e46a3d1b7 ("dt-bindings: phy: Add lan966x-serdes binding") in phy/next. > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml > +examples: > + - | > + serdes: serdes@e2004010 { > + compatible = "microchip,lan966x-serdes"; > + reg = <0xe202c000 0x9c>, <0xe2004010 0x4>; > + #phy-cells = <2>; > + }; So this overlaps with the switch registers, cfr. Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml in net-next/master? switch: switch@e0000000 { compatible = "microchip,lan966x-switch"; reg = <0xe0000000 0x0100000>, <0xe2000000 0x0800000>; ... }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
The 11/30/2021 15:02, Geert Uytterhoeven wrote: > > Hi Horatio, Hi Geert, > > On Tue, Nov 16, 2021 at 11:16 AM Horatiu Vultur > <horatiu.vultur@microchip.com> wrote: > > Document the lan966x ethernet serdes phy driver bindings. > > > > Reviewed-by: Rob Herring <robh@kernel.org> > > Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> > > Thanks for your patch, which is now commit fd66e57e46a3d1b7 > ("dt-bindings: phy: Add lan966x-serdes binding") in phy/next. > > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml > > > +examples: > > + - | > > + serdes: serdes@e2004010 { > > + compatible = "microchip,lan966x-serdes"; > > + reg = <0xe202c000 0x9c>, <0xe2004010 0x4>; > > + #phy-cells = <2>; > > + }; > > So this overlaps with the switch registers, cfr. > Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml > in net-next/master? > > switch: switch@e0000000 { > compatible = "microchip,lan966x-switch"; > reg = <0xe0000000 0x0100000>, > <0xe2000000 0x0800000>; > ... > }; Well, they will overlap, but the switch will not use the registers used by the the serdes. The 'lan966x_main_iomap' inside lan966x_main.c will decide which parts of the resource will be used. > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml b/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml new file mode 100644 index 000000000000..6e914fbbac56 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Lan966x Serdes controller + +maintainers: + - Horatiu Vultur <horatiu.vultur@microchip.com> + +description: | + Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU), + 3 SERDES6G and 2 RGMII interfaces. Two of the SERDES6G support QSGMII. + Also it has 8 logical Ethernet ports which can be connected to these + interfaces. The Serdes controller will allow to configure these interfaces + and allows to "mux" the interfaces to different ports. + + For simple selection of the interface that is used with a port, the + following macros are defined CU(X), SERDES6G(X), RGMII(X). Where X is a + number that represents the index of that interface type. For example + CU(1) means use interface copper transceivers 1. SERDES6G(2) means use + interface SerDes 2. + +properties: + $nodename: + pattern: "^serdes@[0-9a-f]+$" + + compatible: + const: microchip,lan966x-serdes + + reg: + items: + - description: HSIO registers + - description: HW_STAT register + + '#phy-cells': + const: 2 + description: | + - Input port to use for a given macro. + - The macro to be used. The macros are defined in + dt-bindings/phy/phy-lan966x-serdes. + +required: + - compatible + - reg + - '#phy-cells' + +additionalProperties: false + +examples: + - | + serdes: serdes@e2004010 { + compatible = "microchip,lan966x-serdes"; + reg = <0xe202c000 0x9c>, <0xe2004010 0x4>; + #phy-cells = <2>; + }; + +...