Message ID | 4a0250a2-b559-de51-6cb6-7339573a2581@linux.ibm.com |
---|---|
State | New |
Headers | show |
Series | rs6000/doc: Rename future cpu with power10 | expand |
Hi! On Wed, Nov 10, 2021 at 01:41:25PM +0800, Kewen.Lin wrote: > Commmit 5d9d0c94588 renamed future to power10 and ace60939fd2 > updated the documentation for "future" renaming. This patch > is to rename the remaining "future architecture" references in > documentation. Good find :-) > @@ -28613,7 +28613,7 @@ the offset with a symbol reference to a canary in the TLS block. > @opindex mpcrel > @opindex mno-pcrel > Generate (do not generate) pc-relative addressing when the option > -@option{-mcpu=future} is used. The @option{-mpcrel} option requires > +@option{-mcpu=power10} is used. The @option{-mpcrel} option requires > that the medium code model (@option{-mcmodel=medium}) and prefixed > addressing (@option{-mprefixed}) options are enabled. It still sounds strange, and factually incorrect really: the -mpcrel option says to use pc-relative processing, no matter if -mcpu=power10 is used or not. For example, it will work fine with later CPUs as well. So maybe this should just delete from after "addressing" to the end of that line? It already says what the prerequisites are, on the very next line :-) Segher
Hi Segher, on 2021/11/10 下午4:52, Segher Boessenkool wrote: > Hi! > > On Wed, Nov 10, 2021 at 01:41:25PM +0800, Kewen.Lin wrote: >> Commmit 5d9d0c94588 renamed future to power10 and ace60939fd2 >> updated the documentation for "future" renaming. This patch >> is to rename the remaining "future architecture" references in >> documentation. > > Good find :-) > >> @@ -28613,7 +28613,7 @@ the offset with a symbol reference to a canary in the TLS block. >> @opindex mpcrel >> @opindex mno-pcrel >> Generate (do not generate) pc-relative addressing when the option >> -@option{-mcpu=future} is used. The @option{-mpcrel} option requires >> +@option{-mcpu=power10} is used. The @option{-mpcrel} option requires >> that the medium code model (@option{-mcmodel=medium}) and prefixed >> addressing (@option{-mprefixed}) options are enabled. > > It still sounds strange, and factually incorrect really: the -mpcrel > option says to use pc-relative processing, no matter if -mcpu=power10 is > used or not. For example, it will work fine with later CPUs as well. > Good point! The comment is also applied for mma, prefixed and float128. > So maybe this should just delete from after "addressing" to the end of > that line? It already says what the prerequisites are, on the very next > line :-) > Thanks for the suggestion. The updated version is inlined as below. Not sure the update for float128 looks good enough to you. Could you please have a look again? BR, Kewen ----- gcc/ChangeLog: * doc/invoke.texi: Change references to "future cpu" to "power10", "-mcpu=future" to "-mcpu=power10". Adjust with "later cpu_type". diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2ea23d07c4c..aa0a20924bf 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -27597,7 +27597,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403}, @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, -@samp{power9}, @samp{future}, @samp{powerpc}, @samp{powerpc64}, +@samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}. @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and @@ -27779,10 +27779,10 @@ Enable/disable the @var{__float128} keyword for IEEE 128-bit floating point and use either software emulation for IEEE 128-bit floating point or hardware instructions. -The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7}, -@option{-mcpu=power8}), or @option{-mcpu=power9} must be enabled to -use the IEEE 128-bit floating point support. The IEEE 128-bit -floating point support only works on PowerPC Linux systems. +The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7} (or later +@var{cpu_type})) must be enabled to use the IEEE 128-bit floating point +support. The IEEE 128-bit floating point support only works on PowerPC +Linux systems. The default for @option{-mfloat128} is enabled on PowerPC Linux systems using the VSX instruction set, and disabled on other systems. @@ -28612,24 +28612,25 @@ the offset with a symbol reference to a canary in the TLS block. @itemx -mno-pcrel @opindex mpcrel @opindex mno-pcrel -Generate (do not generate) pc-relative addressing when the option -@option{-mcpu=future} is used. The @option{-mpcrel} option requires -that the medium code model (@option{-mcmodel=medium}) and prefixed -addressing (@option{-mprefixed}) options are enabled. +Generate (do not generate) pc-relative addressing. The @option{-mpcrel} +option requires that the medium code model (@option{-mcmodel=medium}) +and prefixed addressing (@option{-mprefixed}) options are enabled. @item -mprefixed @itemx -mno-prefixed @opindex mprefixed @opindex mno-prefixed Generate (do not generate) addressing modes using prefixed load and -store instructions when the option @option{-mcpu=future} is used. +store instructions. The @option{-mprefixed} option requires that +the option @option{-mcpu=power10} (or later @var{cpu_type}) is enabled. @item -mmma @itemx -mno-mma @opindex mmma @opindex mno-mma -Generate (do not generate) the MMA instructions when the option -@option{-mcpu=future} is used. +Generate (do not generate) the MMA instructions. The @option{-mma} +option requires that the option @option{-mcpu=power10} (or later +@var{cpu_type}) is enabled. @item -mrop-protect @itemx -mno-rop-protect
Hi! On Wed, Nov 10, 2021 at 05:39:27PM +0800, Kewen.Lin wrote: > @@ -27779,10 +27779,10 @@ Enable/disable the @var{__float128} keyword for IEEE 128-bit floating point > and use either software emulation for IEEE 128-bit floating point or > hardware instructions. > > -The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7}, > -@option{-mcpu=power8}), or @option{-mcpu=power9} must be enabled to > -use the IEEE 128-bit floating point support. The IEEE 128-bit > -floating point support only works on PowerPC Linux systems. > +The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7} (or later > +@var{cpu_type})) must be enabled to use the IEEE 128-bit floating point > +support. The IEEE 128-bit floating point support only works on PowerPC > +Linux systems. I'd just say -mvsx. This is default on for -mcpu=power7 and later, and cannot be enabled elsewhere, but that is beside the point. If you say more than the essentials here it becomes harder to read (simply because there is more to read then), harder to find what you are looking for, and harder to keep it updated if things change (like what this patch is for :-) ) The part about "works only on Linux" isn't quite true. "Is only supported on Linux" is a bit better. > Generate (do not generate) addressing modes using prefixed load and > -store instructions when the option @option{-mcpu=future} is used. > +store instructions. The @option{-mprefixed} option requires that > +the option @option{-mcpu=power10} (or later @var{cpu_type}) is enabled. Just "or later" please. The "CPU_TYPE" thing is local to the -mcpu= description, let's not refer to it from elsewhere. > @item -mmma > @itemx -mno-mma > @opindex mmma > @opindex mno-mma > -Generate (do not generate) the MMA instructions when the option > -@option{-mcpu=future} is used. > +Generate (do not generate) the MMA instructions. The @option{-mma} > +option requires that the option @option{-mcpu=power10} (or later > +@var{cpu_type}) is enabled. (once more) Okay for trunk with those changes. Thanks! Segher
on 2021/11/10 下午6:03, Segher Boessenkool wrote: > Hi! > > On Wed, Nov 10, 2021 at 05:39:27PM +0800, Kewen.Lin wrote: >> @@ -27779,10 +27779,10 @@ Enable/disable the @var{__float128} keyword for IEEE 128-bit floating point >> and use either software emulation for IEEE 128-bit floating point or >> hardware instructions. >> >> -The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7}, >> -@option{-mcpu=power8}), or @option{-mcpu=power9} must be enabled to >> -use the IEEE 128-bit floating point support. The IEEE 128-bit >> -floating point support only works on PowerPC Linux systems. >> +The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7} (or later >> +@var{cpu_type})) must be enabled to use the IEEE 128-bit floating point >> +support. The IEEE 128-bit floating point support only works on PowerPC >> +Linux systems. > > I'd just say -mvsx. This is default on for -mcpu=power7 and later, and > cannot be enabled elsewhere, but that is beside the point. > > If you say more than the essentials here it becomes harder to read > (simply because there is more to read then), harder to find what you > are looking for, and harder to keep it updated if things change (like > what this patch is for :-) ) > > The part about "works only on Linux" isn't quite true. "Is only > supported on Linux" is a bit better. > >> Generate (do not generate) addressing modes using prefixed load and >> -store instructions when the option @option{-mcpu=future} is used. >> +store instructions. The @option{-mprefixed} option requires that >> +the option @option{-mcpu=power10} (or later @var{cpu_type}) is enabled. > > Just "or later" please. The "CPU_TYPE" thing is local to the -mcpu= > description, let's not refer to it from elsewhere. > >> @item -mmma >> @itemx -mno-mma >> @opindex mmma >> @opindex mno-mma >> -Generate (do not generate) the MMA instructions when the option >> -@option{-mcpu=future} is used. >> +Generate (do not generate) the MMA instructions. The @option{-mma} >> +option requires that the option @option{-mcpu=power10} (or later >> +@var{cpu_type}) is enabled. > > (once more) > > Okay for trunk with those changes. Thanks! > > Thanks! All comments are addressed and committed as r12-5143. BR, Kewen > Segher >
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2ea23d07c4c..7b23165c477 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -27597,7 +27597,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403}, @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, -@samp{power9}, @samp{future}, @samp{powerpc}, @samp{powerpc64}, +@samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}. @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and @@ -28613,7 +28613,7 @@ the offset with a symbol reference to a canary in the TLS block. @opindex mpcrel @opindex mno-pcrel Generate (do not generate) pc-relative addressing when the option -@option{-mcpu=future} is used. The @option{-mpcrel} option requires +@option{-mcpu=power10} is used. The @option{-mpcrel} option requires that the medium code model (@option{-mcmodel=medium}) and prefixed addressing (@option{-mprefixed}) options are enabled. @@ -28622,14 +28622,14 @@ addressing (@option{-mprefixed}) options are enabled. @opindex mprefixed @opindex mno-prefixed Generate (do not generate) addressing modes using prefixed load and -store instructions when the option @option{-mcpu=future} is used. +store instructions when the option @option{-mcpu=power10} is used. @item -mmma @itemx -mno-mma @opindex mmma @opindex mno-mma Generate (do not generate) the MMA instructions when the option -@option{-mcpu=future} is used. +@option{-mcpu=power10} is used. @item -mrop-protect @itemx -mno-rop-protect