diff mbox series

[v2,07/13] PCI: aardvark: Do not unmask unused interrupts

Message ID 20211005180952.6812-8-kabel@kernel.org
State New
Headers show
Series PCI: aardvark controller fixes | expand

Commit Message

Marek Behún Oct. 5, 2021, 6:09 p.m. UTC
From: Pali Rohár <pali@kernel.org>

There are lot of undocumented interrupt bits. Fix all *_ALL_MASK macros to
define all interrupt bits, so that driver can properly mask all interrupts,
including those which are undocumented.

Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Cc: stable@vger.kernel.org
---
 drivers/pci/controller/pci-aardvark.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Lorenzo Pieralisi Oct. 6, 2021, 9:13 a.m. UTC | #1
[CC Sasha for stable kernel rules]

On Tue, Oct 05, 2021 at 08:09:46PM +0200, Marek Behún wrote:
> From: Pali Rohár <pali@kernel.org>
> 
> There are lot of undocumented interrupt bits. Fix all *_ALL_MASK macros to
> define all interrupt bits, so that driver can properly mask all interrupts,
> including those which are undocumented.
> 
> Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Marek Behún <kabel@kernel.org>
> Signed-off-by: Marek Behún <kabel@kernel.org>
> Cc: stable@vger.kernel.org

I don't think this is a fix and I don't think it should be sent
to stable kernels in _preparation_ for other fixes to come (that
may never land in mainline).

If, for future fixes a depedency is detected they can be added
in the relevant commit log.

That's my understanding, Sasha can clarify if needed.

Patch itself is fine.

Thanks,
Lorenzo

> ---
>  drivers/pci/controller/pci-aardvark.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index f7eebf453e83..3448a8c446d4 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -107,13 +107,13 @@
>  #define     PCIE_ISR0_MSI_INT_PENDING		BIT(24)
>  #define     PCIE_ISR0_INTX_ASSERT(val)		BIT(16 + (val))
>  #define     PCIE_ISR0_INTX_DEASSERT(val)	BIT(20 + (val))
> -#define	    PCIE_ISR0_ALL_MASK			GENMASK(26, 0)
> +#define     PCIE_ISR0_ALL_MASK			GENMASK(31, 0)
>  #define PCIE_ISR1_REG				(CONTROL_BASE_ADDR + 0x48)
>  #define PCIE_ISR1_MASK_REG			(CONTROL_BASE_ADDR + 0x4C)
>  #define     PCIE_ISR1_POWER_STATE_CHANGE	BIT(4)
>  #define     PCIE_ISR1_FLUSH			BIT(5)
>  #define     PCIE_ISR1_INTX_ASSERT(val)		BIT(8 + (val))
> -#define     PCIE_ISR1_ALL_MASK			GENMASK(11, 4)
> +#define     PCIE_ISR1_ALL_MASK			GENMASK(31, 0)
>  #define PCIE_MSI_ADDR_LOW_REG			(CONTROL_BASE_ADDR + 0x50)
>  #define PCIE_MSI_ADDR_HIGH_REG			(CONTROL_BASE_ADDR + 0x54)
>  #define PCIE_MSI_STATUS_REG			(CONTROL_BASE_ADDR + 0x58)
> @@ -199,7 +199,7 @@
>  #define     PCIE_IRQ_MSI_INT2_DET		BIT(21)
>  #define     PCIE_IRQ_RC_DBELL_DET		BIT(22)
>  #define     PCIE_IRQ_EP_STATUS			BIT(23)
> -#define     PCIE_IRQ_ALL_MASK			0xfff0fb
> +#define     PCIE_IRQ_ALL_MASK			GENMASK(31, 0)
>  #define     PCIE_IRQ_ENABLE_INTS_MASK		PCIE_IRQ_CORE_INT
>  
>  /* Transaction types */
> -- 
> 2.32.0
>
Marek Behún Oct. 6, 2021, 10:28 a.m. UTC | #2
On Wed, 6 Oct 2021 10:13:38 +0100
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> wrote:

> [CC Sasha for stable kernel rules]
> 
> On Tue, Oct 05, 2021 at 08:09:46PM +0200, Marek Behún wrote:
> > From: Pali Rohár <pali@kernel.org>
> > 
> > There are lot of undocumented interrupt bits. Fix all *_ALL_MASK macros to
> > define all interrupt bits, so that driver can properly mask all interrupts,
> > including those which are undocumented.
> > 
> > Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > Reviewed-by: Marek Behún <kabel@kernel.org>
> > Signed-off-by: Marek Behún <kabel@kernel.org>
> > Cc: stable@vger.kernel.org  
> 
> I don't think this is a fix and I don't think it should be sent
> to stable kernels in _preparation_ for other fixes to come (that
> may never land in mainline).

This patch is a fix because it fixes masking interrupts, which may
prevent spurious interrupts - we don't want interrupts which kernel
didn't request for.

I agree that the commit message should probably mention this, though...
:(

Marek
Lorenzo Pieralisi Oct. 7, 2021, 1:27 p.m. UTC | #3
On Wed, Oct 06, 2021 at 12:28:23PM +0200, Marek Behún wrote:
> On Wed, 6 Oct 2021 10:13:38 +0100
> Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> wrote:
> 
> > [CC Sasha for stable kernel rules]
> > 
> > On Tue, Oct 05, 2021 at 08:09:46PM +0200, Marek Behún wrote:
> > > From: Pali Rohár <pali@kernel.org>
> > > 
> > > There are lot of undocumented interrupt bits. Fix all *_ALL_MASK macros to
> > > define all interrupt bits, so that driver can properly mask all interrupts,
> > > including those which are undocumented.
> > > 
> > > Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
> > > Signed-off-by: Pali Rohár <pali@kernel.org>
> > > Reviewed-by: Marek Behún <kabel@kernel.org>
> > > Signed-off-by: Marek Behún <kabel@kernel.org>
> > > Cc: stable@vger.kernel.org  
> > 
> > I don't think this is a fix and I don't think it should be sent
> > to stable kernels in _preparation_ for other fixes to come (that
> > may never land in mainline).
> 
> This patch is a fix because it fixes masking interrupts, which may
> prevent spurious interrupts - we don't want interrupts which kernel
> didn't request for.
> 
> I agree that the commit message should probably mention this, though...
> :(

Now it does ;-), will notify you when I push the series out so that
you can have a look to check.

Thanks,
Lorenzo

> 
> Marek
diff mbox series

Patch

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index f7eebf453e83..3448a8c446d4 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -107,13 +107,13 @@ 
 #define     PCIE_ISR0_MSI_INT_PENDING		BIT(24)
 #define     PCIE_ISR0_INTX_ASSERT(val)		BIT(16 + (val))
 #define     PCIE_ISR0_INTX_DEASSERT(val)	BIT(20 + (val))
-#define	    PCIE_ISR0_ALL_MASK			GENMASK(26, 0)
+#define     PCIE_ISR0_ALL_MASK			GENMASK(31, 0)
 #define PCIE_ISR1_REG				(CONTROL_BASE_ADDR + 0x48)
 #define PCIE_ISR1_MASK_REG			(CONTROL_BASE_ADDR + 0x4C)
 #define     PCIE_ISR1_POWER_STATE_CHANGE	BIT(4)
 #define     PCIE_ISR1_FLUSH			BIT(5)
 #define     PCIE_ISR1_INTX_ASSERT(val)		BIT(8 + (val))
-#define     PCIE_ISR1_ALL_MASK			GENMASK(11, 4)
+#define     PCIE_ISR1_ALL_MASK			GENMASK(31, 0)
 #define PCIE_MSI_ADDR_LOW_REG			(CONTROL_BASE_ADDR + 0x50)
 #define PCIE_MSI_ADDR_HIGH_REG			(CONTROL_BASE_ADDR + 0x54)
 #define PCIE_MSI_STATUS_REG			(CONTROL_BASE_ADDR + 0x58)
@@ -199,7 +199,7 @@ 
 #define     PCIE_IRQ_MSI_INT2_DET		BIT(21)
 #define     PCIE_IRQ_RC_DBELL_DET		BIT(22)
 #define     PCIE_IRQ_EP_STATUS			BIT(23)
-#define     PCIE_IRQ_ALL_MASK			0xfff0fb
+#define     PCIE_IRQ_ALL_MASK			GENMASK(31, 0)
 #define     PCIE_IRQ_ENABLE_INTS_MASK		PCIE_IRQ_CORE_INT
 
 /* Transaction types */