diff mbox series

[pushed] c++: don't warn about internal interference sizes

Message ID 20210915153154.1111443-1-jason@redhat.com
State New
Headers show
Series [pushed] c++: don't warn about internal interference sizes | expand

Commit Message

Jason Merrill Sept. 15, 2021, 3:31 p.m. UTC
Most any compilation on ARM/AArch64 was warning because the default L1 cache
line size of 32B was smaller than the default
std::hardware_constructive_interference_size of 64B.  This is mostly due to
inaccurate --param l1-cache-line-size, but it's not helpful to complain to a
user that didn't set the values.

gcc/cp/ChangeLog:

	* decl.c (cxx_init_decl_processing): Only warn about odd
	interference sizes if they were specified with --param.
---
 gcc/cp/decl.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)


base-commit: adddfc85c07143f7c8097a90a83bfb15b8bd52e8

Comments

Jeff Law Sept. 15, 2021, 3:36 p.m. UTC | #1
On 9/15/2021 9:31 AM, Jason Merrill via Gcc-patches wrote:
> Most any compilation on ARM/AArch64 was warning because the default L1 cache
> line size of 32B was smaller than the default
> std::hardware_constructive_interference_size of 64B.  This is mostly due to
> inaccurate --param l1-cache-line-size, but it's not helpful to complain to a
> user that didn't set the values.
>
> gcc/cp/ChangeLog:
>
> 	* decl.c (cxx_init_decl_processing): Only warn about odd
> 	interference sizes if they were specified with --param.
I wonder if that'll fix the arm-linux build failures that started 
showing up recently:

armeb-linux-gnueabi:

<built-in>: error: '--param constructive-interference-size=64' is 
greater than '--param l1-cache-line-size=32' [-Werror=interference-size]

I expect the other arm- linux configurations would show it as well, but 
they're only run once a week in my tester and I don't think they've been 
run since the recent changes in this space.

jeff
Jason Merrill Sept. 15, 2021, 3:38 p.m. UTC | #2
On Wed, Sep 15, 2021 at 11:37 AM Jeff Law <jeffreyalaw@gmail.com> wrote:

>
>
> On 9/15/2021 9:31 AM, Jason Merrill via Gcc-patches wrote:
> > Most any compilation on ARM/AArch64 was warning because the default L1
> cache
> > line size of 32B was smaller than the default
> > std::hardware_constructive_interference_size of 64B.  This is mostly due
> to
> > inaccurate --param l1-cache-line-size, but it's not helpful to complain
> to a
> > user that didn't set the values.
> >
> > gcc/cp/ChangeLog:
> >
> >       * decl.c (cxx_init_decl_processing): Only warn about odd
> >       interference sizes if they were specified with --param.
> I wonder if that'll fix the arm-linux build failures that started
> showing up recently:
>
> armeb-linux-gnueabi:
>
> <built-in>: error: '--param constructive-interference-size=64' is
> greater than '--param l1-cache-line-size=32' [-Werror=interference-size]
>
> I expect the other arm- linux configurations would show it as well, but
> they're only run once a week in my tester and I don't think they've been
> run since the recent changes in this space.
>

Yes, that is exactly the purpose of this change.

Jason
Christophe Lyon Sept. 15, 2021, 4:15 p.m. UTC | #3
On Wed, Sep 15, 2021 at 5:39 PM Jason Merrill via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:

> On Wed, Sep 15, 2021 at 11:37 AM Jeff Law <jeffreyalaw@gmail.com> wrote:
>
> >
> >
> > On 9/15/2021 9:31 AM, Jason Merrill via Gcc-patches wrote:
> > > Most any compilation on ARM/AArch64 was warning because the default L1
> > cache
> > > line size of 32B was smaller than the default
> > > std::hardware_constructive_interference_size of 64B.  This is mostly
> due
> > to
> > > inaccurate --param l1-cache-line-size, but it's not helpful to complain
> > to a
> > > user that didn't set the values.
> > >
> > > gcc/cp/ChangeLog:
> > >
> > >       * decl.c (cxx_init_decl_processing): Only warn about odd
> > >       interference sizes if they were specified with --param.
> > I wonder if that'll fix the arm-linux build failures that started
> > showing up recently:
> >
> > armeb-linux-gnueabi:
> >
> > <built-in>: error: '--param constructive-interference-size=64' is
> > greater than '--param l1-cache-line-size=32' [-Werror=interference-size]
> >
> > I expect the other arm- linux configurations would show it as well, but
> > they're only run once a week in my tester and I don't think they've been
> > run since the recent changes in this space.
> >
>
> Yes, that is exactly the purpose of this change.
>
>
I can confirm that those targets build again, thanks.


> Jason
>
diff mbox series

Patch

diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 1a2925b4108..9ad9446e262 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -4756,7 +4756,7 @@  cxx_init_decl_processing (void)
   /* Check that the hardware interference sizes are at least
      alignof(max_align_t), as required by the standard.  */
   const int max_align = max_align_t_align () / BITS_PER_UNIT;
-  if (param_destruct_interfere_size)
+  if (global_options_set.x_param_destruct_interfere_size)
     {
       if (param_destruct_interfere_size < max_align)
 	error ("%<--param destructive-interference-size=%d%> is less than "
@@ -4767,11 +4767,13 @@  cxx_init_decl_processing (void)
 		 "is less than %<--param l1-cache-line-size=%d%>",
 		 param_destruct_interfere_size, param_l1_cache_line_size);
     }
+  else if (param_destruct_interfere_size)
+    /* Assume the internal value is OK.  */;
   else if (param_l1_cache_line_size >= max_align)
     param_destruct_interfere_size = param_l1_cache_line_size;
   /* else leave it unset.  */
 
-  if (param_construct_interfere_size)
+  if (global_options_set.x_param_construct_interfere_size)
     {
       if (param_construct_interfere_size < max_align)
 	error ("%<--param constructive-interference-size=%d%> is less than "
@@ -4783,6 +4785,8 @@  cxx_init_decl_processing (void)
 		 "is greater than %<--param l1-cache-line-size=%d%>",
 		 param_construct_interfere_size, param_l1_cache_line_size);
     }
+  else if (param_construct_interfere_size)
+    /* Assume the internal value is OK.  */;
   else if (param_l1_cache_line_size >= max_align)
     param_construct_interfere_size = param_l1_cache_line_size;
 }