| Message ID | 20210909073947.17438-1-kavyasree.kotagiri@microchip.com |
|---|---|
| Headers | show |
| Series | Add driver for lan966x Generic Clock Controller | expand |
Quoting Kavyasree Kotagiri (2021-09-09 00:39:46) > diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c > new file mode 100644 > index 000000000000..4492be90cecf > --- /dev/null > +++ b/drivers/clk/clk-lan966x.c > @@ -0,0 +1,235 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Microchip LAN966x SoC Clock driver. > + * > + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries > + * > + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> > + */ > + > +#include <linux/bitfield.h> > +#include <linux/clk-provider.h> > +#include <linux/io.h> > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/of.h> [...] > + > +static int lan966x_clk_probe(struct platform_device *pdev) > +{ > + struct clk_hw_onecell_data *hw_data; > + struct device *dev = &pdev->dev; > + const char *parent_names[3]; > + int i, ret; > + > + hw_data = devm_kzalloc(dev, sizeof(*hw_data), GFP_KERNEL); > + if (!hw_data) > + return -ENOMEM; > + > + base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(base)) > + return PTR_ERR(base); > + > + init.ops = &lan966x_gck_ops; > + init.num_parents = 3; > + > + for (i = 0; i < init.num_parents; ++i) { > + parent_names[i] = of_clk_get_parent_name(pdev->dev.of_node, i); Please use clk_parent_data instead of of_clk_get_parent_name(). > + if (!parent_names[i]) > + return -EINVAL; > + } > + > + init.parent_names = parent_names; > + hw_data->num = N_CLOCKS; > + > + for (i = 0; i < N_CLOCKS; i++) { > + init.name = clk_names[i]; > + hw_data->hws[i] = lan966x_gck_clk_register(dev, i); > + if (IS_ERR(hw_data->hws[i])) { > + dev_err(dev, "failed to register %s clock\n", > + init.name); > + return ret; return PTR_ERR(hw_data->hws[i]); > + } > + } > + > + return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data); > +} > + > +static const struct of_device_id lan966x_clk_dt_ids[] = { > + { .compatible = "microchip,lan966x-gck", }, > + { } > +};
This patch series adds a device driver for Generic Clock Controller of lan966x SoC. v2 -> v3: - Fixed dt_binding_check errors. v1 -> v2: - Updated license in dt-bindings. - Updated example provided for clock controller node. Kavyasree Kotagiri (3): dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs clk: lan966x: Add lan966x SoC clock driver dt-bindings: clock: lan966x: Add LAN966X Clock Controller .../bindings/clock/microchip,lan966x-gck.yaml | 64 +++++ drivers/clk/clk-lan966x.c | 235 ++++++++++++++++++ include/dt-bindings/clock/microchip,lan966x.h | 28 +++ 3 files changed, 327 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml create mode 100644 drivers/clk/clk-lan966x.c create mode 100644 include/dt-bindings/clock/microchip,lan966x.h