Message ID | 1627627573-32454-1-git-send-email-rnayak@codeaurora.org |
---|---|
Headers | show |
Series | nvmem: qfprom: Add binding updates and power-domain handling | expand |
Hi, On Thu, Jul 29, 2021 at 11:46 PM Rajendra Nayak <rnayak@codeaurora.org> wrote: > > qfprom_disable_fuse_blowing() disables a bunch of resources, > and then does a few register writes in the 'conf' address > space. > It works perhaps because the resources are needed only for the > 'raw' register space writes, and that the 'conf' space allows > read/writes regardless. > However that makes the code look confusing, so just move the > register writes before turning off the resources in the > function. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > --- > drivers/nvmem/qfprom.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c > index 81fbad5..b0ca4c6 100644 > --- a/drivers/nvmem/qfprom.c > +++ b/drivers/nvmem/qfprom.c > @@ -139,6 +139,9 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv, > { > int ret; > > + writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET); > + writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET); > + > /* > * This may be a shared rail and may be able to run at a lower rate > * when we're not blowing fuses. At the moment, the regulator framework > @@ -159,9 +162,6 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv, > "Failed to set clock rate for disable (ignoring)\n"); > > clk_disable_unprepare(priv->secclk); > - > - writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET); > - writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET); > } I think it doesn't matter since all of these resources are just needed for burning fuses, but I agree that what you have here makes more logical sense and makes the function less confusing. Reviewed-by: Douglas Anderson <dianders@chromium.org>
On 30/07/2021 07:46, Rajendra Nayak wrote: > v3: > * Dropped the description in bindings patch > * Added a patch to fix ordering in qfprom_disable_fuse_blowing() > * Fixed devm_add_action_or_reset() order > > v2: > * pm_runtime calls made unconditionally, should work even without the power-domains property in DT > * Added the missing pm_runtime_disable() handling > * DT patch rebased on msm/for-next > > -- > qfprom devices on sc7280 have an additional requirement to vote on a power-domain > performance state to reliably blow fuses. Add the binding updates and handle this in > the driver, also add the DT node for sc7280 platform. > > Rajendra Nayak (4): > dt-bindings: nvmem: qfprom: Add optional power-domains property > nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering > nvmem: qfprom: sc7280: Handle the additional power-domains vote Applied 1-3 patches. dts patch can go via Bjorn's tree. --srini > arm64: dts: qcom: sc7280: Add qfprom node > > .../devicetree/bindings/nvmem/qcom,qfprom.yaml | 3 +++ > arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++ > drivers/nvmem/qfprom.c | 31 +++++++++++++++++++--- > 3 files changed, 44 insertions(+), 3 deletions(-) >