Message ID | 3641cc2b859db2167dac2ed7bed4ecd1c99a3f62.1621421966.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Commit | 767aa16d41a94cfc39acbb796c300e575d4e3d4d |
Delegated to: | Michal Simek |
Headers | show |
Series | ARM: zynq: Rename bus to be align with simple-bus yaml | expand |
st 19. 5. 2021 v 12:59 odesÃlatel Michal Simek <michal.simek@xilinx.com> napsal: > > Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI > point-to-point channels for communicating addresses, data, and response > transactions between master and slave clients. This ARM AMBA 3.0..." > > Issues are reported as: > .. amba: $nodename:0: 'amba' does not match > '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' > >From schema: > ../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml > > Similar change has been done for Xilinx ZynqMP SoC. > > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com > --- > > arch/arm/dts/zynq-7000.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi > index c35eb2344fa8..4dda753671c2 100644 > --- a/arch/arm/dts/zynq-7000.dtsi > +++ b/arch/arm/dts/zynq-7000.dtsi > @@ -95,7 +95,7 @@ > }; > }; > > - amba: amba { > + amba: axi { > u-boot,dm-pre-reloc; > compatible = "simple-bus"; > #address-cells = <1>; > -- > 2.31.1 > Applied. M
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index c35eb2344fa8..4dda753671c2 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -95,7 +95,7 @@ }; }; - amba: amba { + amba: axi { u-boot,dm-pre-reloc; compatible = "simple-bus"; #address-cells = <1>;