diff mbox series

[GCC-10,backport] arm: Fix testisms introduced with fix for pr target/95646.

Message ID VI1PR0802MB2368FB55084CC1DA5D9202529B599@VI1PR0802MB2368.eurprd08.prod.outlook.com
State New
Headers show
Series [GCC-10,backport] arm: Fix testisms introduced with fix for pr target/95646. | expand

Commit Message

Srinath Parvathaneni May 5, 2021, 1:31 p.m. UTC 
Hi,

This is a backport to gcc-10, cleanly applied on the branch.

This patch changes the test to use the effective-target machinery disables the
error message "ARMv8-M Security Extensions incompatible with selected FPU" when
-mfloat-abi=soft.
Further changes 'asm' to '__asm__' to avoid failures with '-std=' options.

Regression tested on arm-none-eabi.

Is this Ok for GCC-10 branch?

Regards,
Srinath.

gcc/ChangeLog:
2020-07-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/arm/arm.c (arm_options_perform_arch_sanity_checks): Do not
	check +D32 for CMSE if -mfloat-abi=soft

gcc/testsuite/ChangeLog:
2020-07-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* gcc.target/arm/pr95646.c: Fix testism.

(cherry picked from commit 80297f897758f59071968ddff2a04a8d11481117)


###############     Attachment also inlined for ease of reply    ###############
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 6f4381fd6e959321d8d319fafdce4079c7b54e5f..c3bbd9fd5e177f07b37610df57d4f02bd0402761 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3850,7 +3850,7 @@ arm_options_perform_arch_sanity_checks (void)
 
   /* We don't clear D16-D31 VFP registers for cmse_nonsecure_call functions
      and ARMv8-M Baseline and Mainline do not allow such configuration.  */
-  if (use_cmse && LAST_VFP_REGNUM > LAST_LO_VFP_REGNUM)
+  if (use_cmse && TARGET_HARD_FLOAT && LAST_VFP_REGNUM > LAST_LO_VFP_REGNUM)
     error ("ARMv8-M Security Extensions incompatible with selected FPU");
 
 
diff --git a/gcc/testsuite/gcc.target/arm/pr95646.c b/gcc/testsuite/gcc.target/arm/pr95646.c
index 12d06a0c8c1ed7de1f8d4d15130432259e613a32..cde1b2d9d36a4e39cd916fdcc9eef424a22bd589 100644
--- a/gcc/testsuite/gcc.target/arm/pr95646.c
+++ b/gcc/testsuite/gcc.target/arm/pr95646.c
@@ -1,10 +1,7 @@
 /* { dg-do compile } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv8-m.base" } } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-m23" } } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mfpu=*" } { } } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
-/* { dg-options "-mcpu=cortex-m23 -mcmse" } */
-/* { dg-additional-options "-Os" } */
+/* { dg-require-effective-target arm_arch_v8m_base_ok } */
+/* { dg-add-options arm_arch_v8m_base } */
+/* { dg-additional-options "-mcmse -Os" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 int __attribute__ ((cmse_nonsecure_entry))
@@ -27,6 +24,6 @@ foo (void)
 int __attribute__ ((cmse_nonsecure_entry))
 bar (void)
 {
-  asm ("": : : "r9");
+  __asm__ ("" : : : "r9");
   return 1;
 }

Comments

Kyrylo Tkachov May 6, 2021, 8:13 a.m. UTC | #1 
> -----Original Message-----
> From: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com>
> Sent: 05 May 2021 14:32
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>
> Subject: [GCC-10 backport][PATCH] arm: Fix testisms introduced with fix for
> pr target/95646.
> 
> Hi,
> 
> This is a backport to gcc-10, cleanly applied on the branch.
> 
> This patch changes the test to use the effective-target machinery disables
> the
> error message "ARMv8-M Security Extensions incompatible with selected
> FPU" when
> -mfloat-abi=soft.
> Further changes 'asm' to '__asm__' to avoid failures with '-std=' options.
> 
> Regression tested on arm-none-eabi.
> 
> Is this Ok for GCC-10 branch?
> 

Ok.
Thanks,
Kyrill

> Regards,
> Srinath.
> 
> gcc/ChangeLog:
> 2020-07-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>
> 
> 	* config/arm/arm.c (arm_options_perform_arch_sanity_checks): Do
> not
> 	check +D32 for CMSE if -mfloat-abi=soft
> 
> gcc/testsuite/ChangeLog:
> 2020-07-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>
> 
> 	* gcc.target/arm/pr95646.c: Fix testism.
> 
> (cherry picked from commit 80297f897758f59071968ddff2a04a8d11481117)
> 
> 
> ###############     Attachment also inlined for ease of reply
> ###############
> 
> 
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index
> 6f4381fd6e959321d8d319fafdce4079c7b54e5f..c3bbd9fd5e177f07b37610df
> 57d4f02bd0402761 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -3850,7 +3850,7 @@ arm_options_perform_arch_sanity_checks (void)
> 
>    /* We don't clear D16-D31 VFP registers for cmse_nonsecure_call
> functions
>       and ARMv8-M Baseline and Mainline do not allow such configuration.  */
> -  if (use_cmse && LAST_VFP_REGNUM > LAST_LO_VFP_REGNUM)
> +  if (use_cmse && TARGET_HARD_FLOAT && LAST_VFP_REGNUM >
> LAST_LO_VFP_REGNUM)
>      error ("ARMv8-M Security Extensions incompatible with selected FPU");
> 
> 
> diff --git a/gcc/testsuite/gcc.target/arm/pr95646.c
> b/gcc/testsuite/gcc.target/arm/pr95646.c
> index
> 12d06a0c8c1ed7de1f8d4d15130432259e613a32..cde1b2d9d36a4e39cd916f
> dcc9eef424a22bd589 100644
> --- a/gcc/testsuite/gcc.target/arm/pr95646.c
> +++ b/gcc/testsuite/gcc.target/arm/pr95646.c
> @@ -1,10 +1,7 @@
>  /* { dg-do compile } */
> -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-
> march=armv8-m.base" } } */
> -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mcpu=*" } { "-
> mcpu=cortex-m23" } } */
> -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mfpu=*" } { } }
> */
> -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mfloat-abi=*" }
> { "-mfloat-abi=soft" } } */
> -/* { dg-options "-mcpu=cortex-m23 -mcmse" } */
> -/* { dg-additional-options "-Os" } */
> +/* { dg-require-effective-target arm_arch_v8m_base_ok } */
> +/* { dg-add-options arm_arch_v8m_base } */
> +/* { dg-additional-options "-mcmse -Os" } */
>  /* { dg-final { check-function-bodies "**" "" } } */
> 
>  int __attribute__ ((cmse_nonsecure_entry))
> @@ -27,6 +24,6 @@ foo (void)
>  int __attribute__ ((cmse_nonsecure_entry))
>  bar (void)
>  {
> -  asm ("": : : "r9");
> +  __asm__ ("" : : : "r9");
>    return 1;
>  }
diff mbox series

Patch

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 6f4381fd6e959321d8d319fafdce4079c7b54e5f..c3bbd9fd5e177f07b37610df57d4f02bd0402761 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3850,7 +3850,7 @@  arm_options_perform_arch_sanity_checks (void)
 
   /* We don't clear D16-D31 VFP registers for cmse_nonsecure_call functions
      and ARMv8-M Baseline and Mainline do not allow such configuration.  */
-  if (use_cmse && LAST_VFP_REGNUM > LAST_LO_VFP_REGNUM)
+  if (use_cmse && TARGET_HARD_FLOAT && LAST_VFP_REGNUM > LAST_LO_VFP_REGNUM)
     error ("ARMv8-M Security Extensions incompatible with selected FPU");
 
 
diff --git a/gcc/testsuite/gcc.target/arm/pr95646.c b/gcc/testsuite/gcc.target/arm/pr95646.c
index 12d06a0c8c1ed7de1f8d4d15130432259e613a32..cde1b2d9d36a4e39cd916fdcc9eef424a22bd589 100644
--- a/gcc/testsuite/gcc.target/arm/pr95646.c
+++ b/gcc/testsuite/gcc.target/arm/pr95646.c
@@ -1,10 +1,7 @@ 
 /* { dg-do compile } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv8-m.base" } } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-m23" } } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mfpu=*" } { } } */
-/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
-/* { dg-options "-mcpu=cortex-m23 -mcmse" } */
-/* { dg-additional-options "-Os" } */
+/* { dg-require-effective-target arm_arch_v8m_base_ok } */
+/* { dg-add-options arm_arch_v8m_base } */
+/* { dg-additional-options "-mcmse -Os" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 int __attribute__ ((cmse_nonsecure_entry))
@@ -27,6 +24,6 @@  foo (void)
 int __attribute__ ((cmse_nonsecure_entry))
 bar (void)
 {
-  asm ("": : : "r9");
+  __asm__ ("" : : : "r9");
   return 1;
 }