| Message ID | 20210412034237.2473017-1-dqfext@gmail.com |
|---|---|
| Headers | show |
| Series | MT7530 interrupt support | expand |
Hi Qingfang, Quoting DENG Qingfang <dqfext@gmail.com>: > Add support for MediaTek PHYs found in MT7530 and MT7531 switches. > The initialization procedure is from the vendor driver, but due to lack > of documentation, the function of some register values remains unknown. > > Signed-off-by: DENG Qingfang <dqfext@gmail.com> > --- > RFC v3 -> RFC v4: > - Remove unused include. > > drivers/net/phy/Kconfig | 5 ++ > drivers/net/phy/Makefile | 1 + > drivers/net/phy/mediatek.c | 111 +++++++++++++++++++++++++++++++++++++ > 3 files changed, 117 insertions(+) > create mode 100644 drivers/net/phy/mediatek.c > > diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig > index a615b3660b05..edd858cec9ec 100644 > --- a/drivers/net/phy/Kconfig > +++ b/drivers/net/phy/Kconfig > @@ -207,6 +207,11 @@ config MARVELL_88X2222_PHY > Support for the Marvell 88X2222 Dual-port Multi-speed Ethernet > Transceiver. > > +config MEDIATEK_PHY > + tristate "MediaTek PHYs" > + help > + Supports the MediaTek switch integrated PHYs. > + > config MICREL_PHY > tristate "Micrel PHYs" > help > diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile > index de683e3abe63..9ed7dbab7770 100644 > --- a/drivers/net/phy/Makefile > +++ b/drivers/net/phy/Makefile > @@ -64,6 +64,7 @@ obj-$(CONFIG_LXT_PHY) += lxt.o > obj-$(CONFIG_MARVELL_10G_PHY) += marvell10g.o > obj-$(CONFIG_MARVELL_PHY) += marvell.o > obj-$(CONFIG_MARVELL_88X2222_PHY) += marvell-88x2222.o > +obj-$(CONFIG_MEDIATEK_PHY) += mediatek.o > obj-$(CONFIG_MESON_GXL_PHY) += meson-gxl.o > obj-$(CONFIG_MICREL_KS8995MA) += spi_ks8995.o > obj-$(CONFIG_MICREL_PHY) += micrel.o > diff --git a/drivers/net/phy/mediatek.c b/drivers/net/phy/mediatek.c > new file mode 100644 > index 000000000000..1627b7c04345 > --- /dev/null > +++ b/drivers/net/phy/mediatek.c > @@ -0,0 +1,111 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +#include <linux/module.h> > +#include <linux/phy.h> > + > +#define MTK_EXT_PAGE_ACCESS 0x1f > +#define MTK_PHY_PAGE_STANDARD 0x0000 > +#define MTK_PHY_PAGE_EXTENDED 0x0001 > +#define MTK_PHY_PAGE_EXTENDED_2 0x0002 > +#define MTK_PHY_PAGE_EXTENDED_3 0x0003 > +#define MTK_PHY_PAGE_EXTENDED_2A30 0x2a30 > +#define MTK_PHY_PAGE_EXTENDED_52B5 0x52b5 > + > +static int mtk_phy_read_page(struct phy_device *phydev) > +{ > + return __phy_read(phydev, MTK_EXT_PAGE_ACCESS); > +} > + > +static int mtk_phy_write_page(struct phy_device *phydev, int page) > +{ > + return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page); > +} > + > +static void mtk_phy_config_init(struct phy_device *phydev) > +{ > + /* Disable EEE */ > + phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); For my EEE patch I changed this line to: genphy_config_eee_advert(phydev); So PHY EEE part is setup properly at boot, instead enable it manual via ethtool. This function also takes the DTS parameters "eee-broken-xxxx" in to account while setting-up the PHY. > + > + /* Enable HW auto downshift */ > + phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4)); > + > + /* Increase SlvDPSready time */ > + phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5); > + __phy_write(phydev, 0x10, 0xafae); > + __phy_write(phydev, 0x12, 0x2f); > + __phy_write(phydev, 0x10, 0x8fae); > + phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0); > + > + /* Adjust 100_mse_threshold */ > + phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x123, 0xffff); > + > + /* Disable mcc */ > + phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xa6, 0x300); > +} > + Greats, René
On Mon, 12 Apr 2021 04:42:35 +0100, DENG Qingfang <dqfext@gmail.com> wrote: > > Add support for MT7530 interrupt controller to handle internal PHYs. > In order to assign an IRQ number to each PHY, the registration of MDIO bus > is also done in this driver. > > Signed-off-by: DENG Qingfang <dqfext@gmail.com> > --- > RFC v3 -> RFC v4: > - No changes. > > drivers/net/dsa/Kconfig | 1 + > drivers/net/dsa/mt7530.c | 266 +++++++++++++++++++++++++++++++++++---- > drivers/net/dsa/mt7530.h | 20 ++- > 3 files changed, 258 insertions(+), 29 deletions(-) > > diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig > index a5f1aa911fe2..264384449f09 100644 > --- a/drivers/net/dsa/Kconfig > +++ b/drivers/net/dsa/Kconfig > @@ -36,6 +36,7 @@ config NET_DSA_LANTIQ_GSWIP > config NET_DSA_MT7530 > tristate "MediaTek MT753x and MT7621 Ethernet switch support" > select NET_DSA_TAG_MTK > + select MEDIATEK_PHY > help > This enables support for the MediaTek MT7530, MT7531, and MT7621 > Ethernet switch chips. > diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c > index 2bd1bab71497..da033004a74d 100644 > --- a/drivers/net/dsa/mt7530.c > +++ b/drivers/net/dsa/mt7530.c > @@ -10,6 +10,7 @@ > #include <linux/mfd/syscon.h> > #include <linux/module.h> > #include <linux/netdevice.h> > +#include <linux/of_irq.h> > #include <linux/of_mdio.h> > #include <linux/of_net.h> > #include <linux/of_platform.h> > @@ -596,18 +597,14 @@ mt7530_mib_reset(struct dsa_switch *ds) > mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_ACTIVATE); > } > > -static int mt7530_phy_read(struct dsa_switch *ds, int port, int regnum) > +static int mt7530_phy_read(struct mt7530_priv *priv, int port, int regnum) > { > - struct mt7530_priv *priv = ds->priv; > - > return mdiobus_read_nested(priv->bus, port, regnum); > } > > -static int mt7530_phy_write(struct dsa_switch *ds, int port, int regnum, > +static int mt7530_phy_write(struct mt7530_priv *priv, int port, int regnum, > u16 val) > { > - struct mt7530_priv *priv = ds->priv; > - > return mdiobus_write_nested(priv->bus, port, regnum, val); > } > > @@ -785,9 +782,8 @@ mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum, > } > > static int > -mt7531_ind_phy_read(struct dsa_switch *ds, int port, int regnum) > +mt7531_ind_phy_read(struct mt7530_priv *priv, int port, int regnum) > { > - struct mt7530_priv *priv = ds->priv; > int devad; > int ret; > > @@ -803,10 +799,9 @@ mt7531_ind_phy_read(struct dsa_switch *ds, int port, int regnum) > } > > static int > -mt7531_ind_phy_write(struct dsa_switch *ds, int port, int regnum, > +mt7531_ind_phy_write(struct mt7530_priv *priv, int port, int regnum, > u16 data) > { > - struct mt7530_priv *priv = ds->priv; > int devad; > int ret; > > @@ -822,6 +817,22 @@ mt7531_ind_phy_write(struct dsa_switch *ds, int port, int regnum, > return ret; > } > > +static int > +mt753x_phy_read(struct mii_bus *bus, int port, int regnum) > +{ > + struct mt7530_priv *priv = bus->priv; > + > + return priv->info->phy_read(priv, port, regnum); > +} > + > +static int > +mt753x_phy_write(struct mii_bus *bus, int port, int regnum, u16 val) > +{ > + struct mt7530_priv *priv = bus->priv; > + > + return priv->info->phy_write(priv, port, regnum, val); > +} > + > static void > mt7530_get_strings(struct dsa_switch *ds, int port, u32 stringset, > uint8_t *data) > @@ -1828,6 +1839,211 @@ mt7530_setup_gpio(struct mt7530_priv *priv) > } > #endif /* CONFIG_GPIOLIB */ > > +static irqreturn_t > +mt7530_irq_thread_fn(int irq, void *dev_id) > +{ > + struct mt7530_priv *priv = dev_id; > + bool handled = false; > + u32 val; > + int p; > + > + mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); > + val = mt7530_mii_read(priv, MT7530_SYS_INT_STS); > + mt7530_mii_write(priv, MT7530_SYS_INT_STS, val); > + mutex_unlock(&priv->bus->mdio_lock); > + > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > + if (BIT(p) & val) { > + unsigned int irq; > + > + irq = irq_find_mapping(priv->irq_domain, p); > + handle_nested_irq(irq); > + handled = true; > + } > + } > + > + return IRQ_RETVAL(handled); > +} > + > +static void > +mt7530_irq_mask(struct irq_data *d) > +{ > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > + > + priv->irq_enable &= ~BIT(d->hwirq); > +} > + > +static void > +mt7530_irq_unmask(struct irq_data *d) > +{ > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > + > + priv->irq_enable |= BIT(d->hwirq); > +} > + > +static void > +mt7530_irq_bus_lock(struct irq_data *d) > +{ > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > + > + mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); > +} > + > +static void > +mt7530_irq_bus_sync_unlock(struct irq_data *d) > +{ > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > + > + mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable); > + mutex_unlock(&priv->bus->mdio_lock); > +} > + > +static struct irq_chip mt7530_irq_chip = { > + .name = KBUILD_MODNAME, > + .irq_mask = mt7530_irq_mask, > + .irq_unmask = mt7530_irq_unmask, > + .irq_bus_lock = mt7530_irq_bus_lock, > + .irq_bus_sync_unlock = mt7530_irq_bus_sync_unlock, > +}; > + > +static int > +mt7530_irq_map(struct irq_domain *domain, unsigned int irq, > + irq_hw_number_t hwirq) > +{ > + irq_set_chip_data(irq, domain->host_data); > + irq_set_chip_and_handler(irq, &mt7530_irq_chip, handle_simple_irq); > + irq_set_nested_thread(irq, true); > + irq_set_noprobe(irq); > + > + return 0; > +} > + > +static const struct irq_domain_ops mt7530_irq_domain_ops = { > + .map = mt7530_irq_map, > + .xlate = irq_domain_xlate_onecell, > +}; > + > +static void > +mt7530_setup_mdio_irq(struct mt7530_priv *priv) > +{ > + struct dsa_switch *ds = priv->ds; > + int p; > + > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > + if (BIT(p) & ds->phys_mii_mask) { > + unsigned int irq; > + > + irq = irq_create_mapping(priv->irq_domain, p); This seems odd. Why aren't the MDIO IRQs allocated on demand as endpoint attached to this interrupt controller are being probed individually? In general, doing this allocation upfront is an indication that there is some missing information in the DT to perform the discovery. > + ds->slave_mii_bus->irq[p] = irq; > + } > + } > +} > + > +static int > +mt7530_setup_irq(struct mt7530_priv *priv) > +{ > + struct device *dev = priv->dev; > + struct device_node *np = dev->of_node; > + int ret; > + > + if (!of_property_read_bool(np, "interrupt-controller")) { > + dev_info(dev, "no interrupt support\n"); > + return 0; > + } > + > + priv->irq = of_irq_get(np, 0); > + if (priv->irq <= 0) { > + dev_err(dev, "failed to get parent IRQ: %d\n", priv->irq); > + return priv->irq ? : -EINVAL; > + } > + > + priv->irq_domain = irq_domain_add_linear(np, MT7530_NUM_PHYS, > + &mt7530_irq_domain_ops, priv); > + if (!priv->irq_domain) { > + dev_err(dev, "failed to create IRQ domain\n"); > + return -ENOMEM; > + } > + > + /* This register must be set for MT7530 to properly fire interrupts */ > + if (priv->id != ID_MT7531) Why not check for ID_MT7530 directly then? > + mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL); > + > + ret = request_threaded_irq(priv->irq, NULL, mt7530_irq_thread_fn, > + IRQF_ONESHOT, KBUILD_MODNAME, priv); > + if (ret) { > + irq_domain_remove(priv->irq_domain); > + dev_err(dev, "failed to request IRQ: %d\n", ret); > + return ret; > + } > + > + return 0; > +} > + > +static void > +mt7530_free_mdio_irq(struct mt7530_priv *priv) > +{ > + int p; > + > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > + if (BIT(p) & priv->ds->phys_mii_mask) { > + unsigned int irq; > + > + irq = irq_find_mapping(priv->irq_domain, p); > + irq_dispose_mapping(irq); > + } > + } > +} > + > + > +static void > +mt7530_free_irq_common(struct mt7530_priv *priv) > +{ > + free_irq(priv->irq, priv); > + irq_domain_remove(priv->irq_domain); > +} > + > +static void > +mt7530_free_irq(struct mt7530_priv *priv) > +{ > + mt7530_free_mdio_irq(priv); > + mt7530_free_irq_common(priv); > +} > + > +static int > +mt7530_setup_mdio(struct mt7530_priv *priv) > +{ > + struct dsa_switch *ds = priv->ds; > + struct device *dev = priv->dev; > + struct mii_bus *bus; > + static int idx; > + int ret; > + > + bus = devm_mdiobus_alloc(dev); > + if (!bus) > + return -ENOMEM; > + > + ds->slave_mii_bus = bus; > + bus->priv = priv; > + bus->name = KBUILD_MODNAME "-mii"; > + snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++); > + bus->read = mt753x_phy_read; > + bus->write = mt753x_phy_write; > + bus->parent = dev; > + bus->phy_mask = ~ds->phys_mii_mask; > + > + if (priv->irq) > + mt7530_setup_mdio_irq(priv); > + > + ret = mdiobus_register(bus); > + if (ret) { > + dev_err(dev, "failed to register MDIO bus: %d\n", ret); > + if (priv->irq) > + mt7530_free_mdio_irq(priv); > + } > + > + return ret; > +} > + > static int > mt7530_setup(struct dsa_switch *ds) > { > @@ -2780,32 +2996,25 @@ static int > mt753x_setup(struct dsa_switch *ds) > { > struct mt7530_priv *priv = ds->priv; > + int ret = priv->info->sw_setup(ds); > + if (ret) > + return ret; > > - return priv->info->sw_setup(ds); > -} > - > -static int > -mt753x_phy_read(struct dsa_switch *ds, int port, int regnum) > -{ > - struct mt7530_priv *priv = ds->priv; > - > - return priv->info->phy_read(ds, port, regnum); > -} > + ret = mt7530_setup_irq(priv); > + if (ret) > + return ret; > > -static int > -mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) > -{ > - struct mt7530_priv *priv = ds->priv; > + ret = mt7530_setup_mdio(priv); > + if (ret && priv->irq) > + mt7530_free_irq_common(priv); > > - return priv->info->phy_write(ds, port, regnum, val); > + return ret; > } > > static const struct dsa_switch_ops mt7530_switch_ops = { > .get_tag_protocol = mtk_get_tag_protocol, > .setup = mt753x_setup, > .get_strings = mt7530_get_strings, > - .phy_read = mt753x_phy_read, > - .phy_write = mt753x_phy_write, I don't get why this change is part of the interrupt support. This should probably be a separate patch. > .get_ethtool_stats = mt7530_get_ethtool_stats, > .get_sset_count = mt7530_get_sset_count, > .set_ageing_time = mt7530_set_ageing_time, > @@ -2986,6 +3195,9 @@ mt7530_remove(struct mdio_device *mdiodev) > dev_err(priv->dev, "Failed to disable io pwr: %d\n", > ret); > > + if (priv->irq) > + mt7530_free_irq(priv); > + > dsa_unregister_switch(priv->ds); > mutex_destroy(&priv->reg_mutex); > } > diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h > index ec36ea5dfd57..62fcaabefba1 100644 > --- a/drivers/net/dsa/mt7530.h > +++ b/drivers/net/dsa/mt7530.h nit: Another thing is that I don't see why this include file exists at all. The only user is mt7530.c, so the two could be merged and reduce the clutter. Thanks, M.
On Mon, Apr 12, 2021 at 07:04:49AM +0000, René van Dorst wrote: > Hi Qingfang, > > +static void mtk_phy_config_init(struct phy_device *phydev) > > +{ > > + /* Disable EEE */ > > + phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); > > For my EEE patch I changed this line to: > > genphy_config_eee_advert(phydev); > > So PHY EEE part is setup properly at boot, instead enable it manual via > ethtool. > This function also takes the DTS parameters "eee-broken-xxxx" in to account > while i> setting-up the PHY. Thanks, I'm now testing with it. > > > + > > + /* Enable HW auto downshift */ > > + phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4));
On Mon, Apr 12, 2021 at 09:21:12AM +0100, Marc Zyngier wrote: > On Mon, 12 Apr 2021 04:42:35 +0100, > DENG Qingfang <dqfext@gmail.com> wrote: > > > > Add support for MT7530 interrupt controller to handle internal PHYs. > > In order to assign an IRQ number to each PHY, the registration of MDIO bus > > is also done in this driver. > > > > Signed-off-by: DENG Qingfang <dqfext@gmail.com> > > --- > > RFC v3 -> RFC v4: > > - No changes. > > > > drivers/net/dsa/Kconfig | 1 + > > drivers/net/dsa/mt7530.c | 266 +++++++++++++++++++++++++++++++++++---- > > drivers/net/dsa/mt7530.h | 20 ++- > > 3 files changed, 258 insertions(+), 29 deletions(-) > > > > diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig > > index a5f1aa911fe2..264384449f09 100644 > > --- a/drivers/net/dsa/Kconfig > > +++ b/drivers/net/dsa/Kconfig > > @@ -36,6 +36,7 @@ config NET_DSA_LANTIQ_GSWIP > > config NET_DSA_MT7530 > > tristate "MediaTek MT753x and MT7621 Ethernet switch support" > > select NET_DSA_TAG_MTK > > + select MEDIATEK_PHY > > help > > This enables support for the MediaTek MT7530, MT7531, and MT7621 > > Ethernet switch chips. > > diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c > > index 2bd1bab71497..da033004a74d 100644 > > --- a/drivers/net/dsa/mt7530.c > > +++ b/drivers/net/dsa/mt7530.c > > @@ -10,6 +10,7 @@ > > #include <linux/mfd/syscon.h> > > #include <linux/module.h> > > #include <linux/netdevice.h> > > +#include <linux/of_irq.h> > > #include <linux/of_mdio.h> > > #include <linux/of_net.h> > > #include <linux/of_platform.h> > > @@ -596,18 +597,14 @@ mt7530_mib_reset(struct dsa_switch *ds) > > mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_ACTIVATE); > > } > > > > -static int mt7530_phy_read(struct dsa_switch *ds, int port, int regnum) > > +static int mt7530_phy_read(struct mt7530_priv *priv, int port, int regnum) > > { > > - struct mt7530_priv *priv = ds->priv; > > - > > return mdiobus_read_nested(priv->bus, port, regnum); > > } > > > > -static int mt7530_phy_write(struct dsa_switch *ds, int port, int regnum, > > +static int mt7530_phy_write(struct mt7530_priv *priv, int port, int regnum, > > u16 val) > > { > > - struct mt7530_priv *priv = ds->priv; > > - > > return mdiobus_write_nested(priv->bus, port, regnum, val); > > } > > > > @@ -785,9 +782,8 @@ mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum, > > } > > > > static int > > -mt7531_ind_phy_read(struct dsa_switch *ds, int port, int regnum) > > +mt7531_ind_phy_read(struct mt7530_priv *priv, int port, int regnum) > > { > > - struct mt7530_priv *priv = ds->priv; > > int devad; > > int ret; > > > > @@ -803,10 +799,9 @@ mt7531_ind_phy_read(struct dsa_switch *ds, int port, int regnum) > > } > > > > static int > > -mt7531_ind_phy_write(struct dsa_switch *ds, int port, int regnum, > > +mt7531_ind_phy_write(struct mt7530_priv *priv, int port, int regnum, > > u16 data) > > { > > - struct mt7530_priv *priv = ds->priv; > > int devad; > > int ret; > > > > @@ -822,6 +817,22 @@ mt7531_ind_phy_write(struct dsa_switch *ds, int port, int regnum, > > return ret; > > } > > > > +static int > > +mt753x_phy_read(struct mii_bus *bus, int port, int regnum) > > +{ > > + struct mt7530_priv *priv = bus->priv; > > + > > + return priv->info->phy_read(priv, port, regnum); > > +} > > + > > +static int > > +mt753x_phy_write(struct mii_bus *bus, int port, int regnum, u16 val) > > +{ > > + struct mt7530_priv *priv = bus->priv; > > + > > + return priv->info->phy_write(priv, port, regnum, val); > > +} > > + > > static void > > mt7530_get_strings(struct dsa_switch *ds, int port, u32 stringset, > > uint8_t *data) > > @@ -1828,6 +1839,211 @@ mt7530_setup_gpio(struct mt7530_priv *priv) > > } > > #endif /* CONFIG_GPIOLIB */ > > > > +static irqreturn_t > > +mt7530_irq_thread_fn(int irq, void *dev_id) > > +{ > > + struct mt7530_priv *priv = dev_id; > > + bool handled = false; > > + u32 val; > > + int p; > > + > > + mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); > > + val = mt7530_mii_read(priv, MT7530_SYS_INT_STS); > > + mt7530_mii_write(priv, MT7530_SYS_INT_STS, val); > > + mutex_unlock(&priv->bus->mdio_lock); > > + > > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > > + if (BIT(p) & val) { > > + unsigned int irq; > > + > > + irq = irq_find_mapping(priv->irq_domain, p); > > + handle_nested_irq(irq); > > + handled = true; > > + } > > + } > > + > > + return IRQ_RETVAL(handled); > > +} > > + > > +static void > > +mt7530_irq_mask(struct irq_data *d) > > +{ > > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > > + > > + priv->irq_enable &= ~BIT(d->hwirq); > > +} > > + > > +static void > > +mt7530_irq_unmask(struct irq_data *d) > > +{ > > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > > + > > + priv->irq_enable |= BIT(d->hwirq); > > +} > > + > > +static void > > +mt7530_irq_bus_lock(struct irq_data *d) > > +{ > > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > > + > > + mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); > > +} > > + > > +static void > > +mt7530_irq_bus_sync_unlock(struct irq_data *d) > > +{ > > + struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); > > + > > + mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable); > > + mutex_unlock(&priv->bus->mdio_lock); > > +} > > + > > +static struct irq_chip mt7530_irq_chip = { > > + .name = KBUILD_MODNAME, > > + .irq_mask = mt7530_irq_mask, > > + .irq_unmask = mt7530_irq_unmask, > > + .irq_bus_lock = mt7530_irq_bus_lock, > > + .irq_bus_sync_unlock = mt7530_irq_bus_sync_unlock, > > +}; > > + > > +static int > > +mt7530_irq_map(struct irq_domain *domain, unsigned int irq, > > + irq_hw_number_t hwirq) > > +{ > > + irq_set_chip_data(irq, domain->host_data); > > + irq_set_chip_and_handler(irq, &mt7530_irq_chip, handle_simple_irq); > > + irq_set_nested_thread(irq, true); > > + irq_set_noprobe(irq); > > + > > + return 0; > > +} > > + > > +static const struct irq_domain_ops mt7530_irq_domain_ops = { > > + .map = mt7530_irq_map, > > + .xlate = irq_domain_xlate_onecell, > > +}; > > + > > +static void > > +mt7530_setup_mdio_irq(struct mt7530_priv *priv) > > +{ > > + struct dsa_switch *ds = priv->ds; > > + int p; > > + > > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > > + if (BIT(p) & ds->phys_mii_mask) { > > + unsigned int irq; > > + > > + irq = irq_create_mapping(priv->irq_domain, p); > > This seems odd. Why aren't the MDIO IRQs allocated on demand as > endpoint attached to this interrupt controller are being probed > individually? In general, doing this allocation upfront is an > indication that there is some missing information in the DT to perform > the discovery. This is what Andrew's mv88e6xxx does, actually. In addition, I also check the phys_mii_mask to avoid creating mappings for unused ports. Andrew, perhaps this can be done in DSA core? > > > + ds->slave_mii_bus->irq[p] = irq; > > + } > > + } > > +} > > + > > +static int > > +mt7530_setup_irq(struct mt7530_priv *priv) > > +{ > > + struct device *dev = priv->dev; > > + struct device_node *np = dev->of_node; > > + int ret; > > + > > + if (!of_property_read_bool(np, "interrupt-controller")) { > > + dev_info(dev, "no interrupt support\n"); > > + return 0; > > + } > > + > > + priv->irq = of_irq_get(np, 0); > > + if (priv->irq <= 0) { > > + dev_err(dev, "failed to get parent IRQ: %d\n", priv->irq); > > + return priv->irq ? : -EINVAL; > > + } > > + > > + priv->irq_domain = irq_domain_add_linear(np, MT7530_NUM_PHYS, > > + &mt7530_irq_domain_ops, priv); > > + if (!priv->irq_domain) { > > + dev_err(dev, "failed to create IRQ domain\n"); > > + return -ENOMEM; > > + } > > + > > + /* This register must be set for MT7530 to properly fire interrupts */ > > + if (priv->id != ID_MT7531) > > Why not check for ID_MT7530 directly then? There is also ID_MT7621, introduced by Greg Ungerer, but it is basically MT7530 too. > > > + mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL); > > + > > + ret = request_threaded_irq(priv->irq, NULL, mt7530_irq_thread_fn, > > + IRQF_ONESHOT, KBUILD_MODNAME, priv); > > + if (ret) { > > + irq_domain_remove(priv->irq_domain); > > + dev_err(dev, "failed to request IRQ: %d\n", ret); > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > +static void > > +mt7530_free_mdio_irq(struct mt7530_priv *priv) > > +{ > > + int p; > > + > > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > > + if (BIT(p) & priv->ds->phys_mii_mask) { > > + unsigned int irq; > > + > > + irq = irq_find_mapping(priv->irq_domain, p); > > + irq_dispose_mapping(irq); > > + } > > + } > > +} > > + > > + > > +static void > > +mt7530_free_irq_common(struct mt7530_priv *priv) > > +{ > > + free_irq(priv->irq, priv); > > + irq_domain_remove(priv->irq_domain); > > +} > > + > > +static void > > +mt7530_free_irq(struct mt7530_priv *priv) > > +{ > > + mt7530_free_mdio_irq(priv); > > + mt7530_free_irq_common(priv); > > +} > > + > > +static int > > +mt7530_setup_mdio(struct mt7530_priv *priv) > > +{ > > + struct dsa_switch *ds = priv->ds; > > + struct device *dev = priv->dev; > > + struct mii_bus *bus; > > + static int idx; > > + int ret; > > + > > + bus = devm_mdiobus_alloc(dev); > > + if (!bus) > > + return -ENOMEM; > > + > > + ds->slave_mii_bus = bus; > > + bus->priv = priv; > > + bus->name = KBUILD_MODNAME "-mii"; > > + snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++); > > + bus->read = mt753x_phy_read; > > + bus->write = mt753x_phy_write; > > + bus->parent = dev; > > + bus->phy_mask = ~ds->phys_mii_mask; > > + > > + if (priv->irq) > > + mt7530_setup_mdio_irq(priv); > > + > > + ret = mdiobus_register(bus); > > + if (ret) { > > + dev_err(dev, "failed to register MDIO bus: %d\n", ret); > > + if (priv->irq) > > + mt7530_free_mdio_irq(priv); > > + } > > + > > + return ret; > > +} > > + > > static int > > mt7530_setup(struct dsa_switch *ds) > > { > > @@ -2780,32 +2996,25 @@ static int > > mt753x_setup(struct dsa_switch *ds) > > { > > struct mt7530_priv *priv = ds->priv; > > + int ret = priv->info->sw_setup(ds); > > + if (ret) > > + return ret; > > > > - return priv->info->sw_setup(ds); > > -} > > - > > -static int > > -mt753x_phy_read(struct dsa_switch *ds, int port, int regnum) > > -{ > > - struct mt7530_priv *priv = ds->priv; > > - > > - return priv->info->phy_read(ds, port, regnum); > > -} > > + ret = mt7530_setup_irq(priv); > > + if (ret) > > + return ret; > > > > -static int > > -mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) > > -{ > > - struct mt7530_priv *priv = ds->priv; > > + ret = mt7530_setup_mdio(priv); > > + if (ret && priv->irq) > > + mt7530_free_irq_common(priv); > > > > - return priv->info->phy_write(ds, port, regnum, val); > > + return ret; > > } > > > > static const struct dsa_switch_ops mt7530_switch_ops = { > > .get_tag_protocol = mtk_get_tag_protocol, > > .setup = mt753x_setup, > > .get_strings = mt7530_get_strings, > > - .phy_read = mt753x_phy_read, > > - .phy_write = mt753x_phy_write, > > I don't get why this change is part of the interrupt support. This > should probably be a separate patch. These 2 functions are for DSA slave MII bus. Since the driver now manages the MII bus, mt753x_phy_{read,write} are assigned to bus->{read,write} instead. > > > .get_ethtool_stats = mt7530_get_ethtool_stats, > > .get_sset_count = mt7530_get_sset_count, > > .set_ageing_time = mt7530_set_ageing_time, > > @@ -2986,6 +3195,9 @@ mt7530_remove(struct mdio_device *mdiodev) > > dev_err(priv->dev, "Failed to disable io pwr: %d\n", > > ret); > > > > + if (priv->irq) > > + mt7530_free_irq(priv); > > + > > dsa_unregister_switch(priv->ds); > > mutex_destroy(&priv->reg_mutex); > > } > > diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h > > index ec36ea5dfd57..62fcaabefba1 100644 > > --- a/drivers/net/dsa/mt7530.h > > +++ b/drivers/net/dsa/mt7530.h > > nit: Another thing is that I don't see why this include file exists at > all. The only user is mt7530.c, so the two could be merged and reduce > the clutter. > > Thanks, > > M. > > -- > Without deviation from the norm, progress is not possible.
> > > +static void > > > +mt7530_setup_mdio_irq(struct mt7530_priv *priv) > > > +{ > > > + struct dsa_switch *ds = priv->ds; > > > + int p; > > > + > > > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > > > + if (BIT(p) & ds->phys_mii_mask) { > > > + unsigned int irq; > > > + > > > + irq = irq_create_mapping(priv->irq_domain, p); > > > > This seems odd. Why aren't the MDIO IRQs allocated on demand as > > endpoint attached to this interrupt controller are being probed > > individually? In general, doing this allocation upfront is an > > indication that there is some missing information in the DT to perform > > the discovery. > > This is what Andrew's mv88e6xxx does, actually. In addition, I also check > the phys_mii_mask to avoid creating mappings for unused ports. It can be done via DT, using the standard interrupt property, so long as you use of_mdiobus_register(np). But when you have an 7 port switch, and a nice simple mapping, port 0 PHY using interrupt 0, you can save a lot of device tree boilerplate by doing it in code. And when you have 4 of these switches, it gets very boring adding all the DT to just wire up the interrupts 28 interrupts. > Andrew, perhaps this can be done in DSA core? Not easily. It is not always a simple mapping like this. Two of the switches supported by mv88exxx offset the PHYs by 0x10. You really need the switch driver involved, with its detailed knowledge of the hardware. Andrew
On Mon, Apr 12, 2021 at 11:08:36PM +0800, DENG Qingfang wrote: > On Mon, Apr 12, 2021 at 07:04:49AM +0000, René van Dorst wrote: > > Hi Qingfang, > > > +static void mtk_phy_config_init(struct phy_device *phydev) > > > +{ > > > + /* Disable EEE */ > > > + phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); > > > > For my EEE patch I changed this line to: > > > > genphy_config_eee_advert(phydev); > > > > So PHY EEE part is setup properly at boot, instead enable it manual via > > ethtool. > > This function also takes the DTS parameters "eee-broken-xxxx" in to account > > while > > setting-up the PHY. > > Thanks, I'm now testing with it. Hi Rene, Within 12 hours, I got some spontaneous link down/ups when EEE is enabled: [16334.236233] mt7530 mdio-bus:1f wan: Link is Down [16334.241340] br-lan: port 3(wan) entered disabled state [16337.355988] mt7530 mdio-bus:1f wan: Link is Up - 1Gbps/Full - flow control rx/tx [16337.363468] br-lan: port 3(wan) entered blocking state [16337.368638] br-lan: port 3(wan) entered forwarding state The cable is a 30m Cat.6 and never has such issue when EEE is disabled. Perhaps WAKEUP_TIME_1000/100 or some PHY registers need to be fine-tuned, but for now I think it should be disabled by default. > > > > > > + > > > + /* Enable HW auto downshift */ > > > + phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4));
On Tue, 13 Apr 2021 01:07:23 +0100, Andrew Lunn <andrew@lunn.ch> wrote: > > > > > +static void > > > > +mt7530_setup_mdio_irq(struct mt7530_priv *priv) > > > > +{ > > > > + struct dsa_switch *ds = priv->ds; > > > > + int p; > > > > + > > > > + for (p = 0; p < MT7530_NUM_PHYS; p++) { > > > > + if (BIT(p) & ds->phys_mii_mask) { > > > > + unsigned int irq; > > > > + > > > > + irq = irq_create_mapping(priv->irq_domain, p); > > > > > > This seems odd. Why aren't the MDIO IRQs allocated on demand as > > > endpoint attached to this interrupt controller are being probed > > > individually? In general, doing this allocation upfront is an > > > indication that there is some missing information in the DT to perform > > > the discovery. > > > > This is what Andrew's mv88e6xxx does, actually. In addition, I also check > > the phys_mii_mask to avoid creating mappings for unused ports. > > It can be done via DT, using the standard interrupt property, so long > as you use of_mdiobus_register(np). > > But when you have an 7 port switch, and a nice simple mapping, port 0 > PHY using interrupt 0, you can save a lot of device tree boilerplate > by doing it in code. And when you have 4 of these switches, it gets > very boring adding all the DT to just wire up the interrupts 28 > interrupts. I guess this is depends whether the most usual case is to have all these interrupts being actively in use or not. Most interrupts only use a limited portion of their interrupt space at any given time. Allocating all interrupts and creating mappings upfront is a waste of memory. If the use case here is that all these interrupts will be wired and used in most cases, then upfront allocation is probably not a problem. M.
Quoting DENG Qingfang <dqfext@gmail.com>: > On Mon, Apr 12, 2021 at 11:08:36PM +0800, DENG Qingfang wrote: >> On Mon, Apr 12, 2021 at 07:04:49AM +0000, René van Dorst wrote: >> > Hi Qingfang, >> > > +static void mtk_phy_config_init(struct phy_device *phydev) >> > > +{ >> > > + /* Disable EEE */ >> > > + phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); >> > >> > For my EEE patch I changed this line to: >> > >> > genphy_config_eee_advert(phydev); >> > >> > So PHY EEE part is setup properly at boot, instead enable it manual via >> > ethtool. >> > This function also takes the DTS parameters "eee-broken-xxxx" in >> to account >> > while >> > setting-up the PHY. >> >> Thanks, I'm now testing with it. > > Hi Rene, > > Within 12 hours, I got some spontaneous link down/ups when EEE is enabled: > > [16334.236233] mt7530 mdio-bus:1f wan: Link is Down > [16334.241340] br-lan: port 3(wan) entered disabled state > [16337.355988] mt7530 mdio-bus:1f wan: Link is Up - 1Gbps/Full - > flow control rx/tx > [16337.363468] br-lan: port 3(wan) entered blocking state > [16337.368638] br-lan: port 3(wan) entered forwarding state > > The cable is a 30m Cat.6 and never has such issue when EEE is disabled. > Perhaps WAKEUP_TIME_1000/100 or some PHY registers need to be fine-tuned, > but for now I think it should be disabled by default. Hi Qingfang, Problem is that, may be the other device on the other side, may is issue. So it is hard to tell which device is the issue. I have a low traffic access point with 1meter cable running the openwrt 5.10 kernel with the openwrt EEE patch. EEE is active and uptime with 16days without an issue. This was with the old patch which clears the WAKEUP_TIME_1000/100 values. I changed my ethernet setup so that access point switch has more traffic and longer cable ~18meters. I also upgraded the kernel to 5.10.28 and added the EEE v2 patch. Let's see what happens for a longer time and with more real world traffic. Greats, René > >> >> > >> > > + >> > > + /* Enable HW auto downshift */ >> > > + phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4));
> I guess this is depends whether the most usual case is to have all > these interrupts being actively in use or not. Most interrupts only > use a limited portion of their interrupt space at any given time. > Allocating all interrupts and creating mappings upfront is a waste of > memory. > > If the use case here is that all these interrupts will be wired and > used in most cases, then upfront allocation is probably not a problem. Hi Marc The interrupts are generally used. Since this is an Ethernet switch, generally the port is administratively up, even if there is no cable plugged in. Once/if a cable is plugged in and there is a link peer, the PHY will interrupt to indicate this. The only real case i can think of when the interrupts are not used is when the switch has more ports than connected to the front panel. This can happen in industrial settings, but not SOHO. Those ports which don't go anywhere are never configured up and so the interrupt is never used. Andrew
On Tue, Apr 13, 2021 at 11:59:20AM +0800, DENG Qingfang wrote: > Within 12 hours, I got some spontaneous link down/ups when EEE is enabled: > > [16334.236233] mt7530 mdio-bus:1f wan: Link is Down > [16334.241340] br-lan: port 3(wan) entered disabled state > [16337.355988] mt7530 mdio-bus:1f wan: Link is Up - 1Gbps/Full - flow control rx/tx > [16337.363468] br-lan: port 3(wan) entered blocking state > [16337.368638] br-lan: port 3(wan) entered forwarding state > > The cable is a 30m Cat.6 and never has such issue when EEE is disabled. > Perhaps WAKEUP_TIME_1000/100 or some PHY registers need to be fine-tuned, > but for now I think it should be disabled by default. Experience with Atheros AR8035 which has a very similar issue would suggest that before resorting to the blunt hammer of disabling SmartEEE, one should definitely experiment with the 1G Tw settings. Using 24us for 1G speeds on AR8035 helps a great deal, whereas the PHY defaults to 17us for 1G and 23us for 100M.
On Tue, Apr 13, 2021 at 02:52:59PM +0200, Andrew Lunn wrote: > > I guess this is depends whether the most usual case is to have all > > these interrupts being actively in use or not. Most interrupts only > > use a limited portion of their interrupt space at any given time. > > Allocating all interrupts and creating mappings upfront is a waste of > > memory. > > > > If the use case here is that all these interrupts will be wired and > > used in most cases, then upfront allocation is probably not a problem. > > Hi Marc > > The interrupts are generally used. Since this is an Ethernet switch, > generally the port is administratively up, even if there is no cable > plugged in. Once/if a cable is plugged in and there is a link peer, > the PHY will interrupt to indicate this. > > The only real case i can think of when the interrupts are not used is > when the switch has more ports than connected to the front panel. This > can happen in industrial settings, but not SOHO. Those ports which > don't go anywhere are never configured up and so the interrupt is > never used. Hi Andrew This is what the extra check (BIT(p) & ds->phys_mii_mask) avoids. Currently the mv88e6xxx driver does not have this check, and creates 15 PHY IRQ mappings on my 88E6176 unconditionally, leaving a gap in /proc/interrupts: ... 57: 0 0 mv88e6xxx-g1 3 Edge mv88e6xxx-f1072004.mdio-mii:00-g1-atu-prob 59: 0 0 mv88e6xxx-g1 5 Edge mv88e6xxx-f1072004.mdio-mii:00-g1-vtu-prob 61: 8 5 mv88e6xxx-g1 7 Edge mv88e6xxx-f1072004.mdio-mii:00-g2 63: 8 4 mv88e6xxx-g2 0 Edge mv88e6xxx-1:00 64: 0 0 mv88e6xxx-g2 1 Edge mv88e6xxx-1:01 65: 0 0 mv88e6xxx-g2 2 Edge mv88e6xxx-1:02 66: 0 0 mv88e6xxx-g2 3 Edge mv88e6xxx-1:03 67: 0 2 mv88e6xxx-g2 4 Edge mv88e6xxx-1:04 // IRQ 68~77 are created but not used 78: 0 0 mv88e6xxx-g2 15 Edge mv88e6xxx-f1072004.mdio-mii:00-watchdog ... You may as well add irq_set_nested_thread(irq, true) to irq_domain_map so all IRQs share a single thread. > > Andrew
On Tue, Apr 13, 2021 at 02:12:59PM +0100, Russell King - ARM Linux admin wrote: > On Tue, Apr 13, 2021 at 11:59:20AM +0800, DENG Qingfang wrote: > > Within 12 hours, I got some spontaneous link down/ups when EEE is enabled: > > > > [16334.236233] mt7530 mdio-bus:1f wan: Link is Down > > [16334.241340] br-lan: port 3(wan) entered disabled state > > [16337.355988] mt7530 mdio-bus:1f wan: Link is Up - 1Gbps/Full - flow control rx/tx > > [16337.363468] br-lan: port 3(wan) entered blocking state > > [16337.368638] br-lan: port 3(wan) entered forwarding state > > > > The cable is a 30m Cat.6 and never has such issue when EEE is disabled. > > Perhaps WAKEUP_TIME_1000/100 or some PHY registers need to be fine-tuned, > > but for now I think it should be disabled by default. > > Experience with Atheros AR8035 which has a very similar issue would > suggest that before resorting to the blunt hammer of disabling > SmartEEE, one should definitely experiment with the 1G Tw settings. > > Using 24us for 1G speeds on AR8035 helps a great deal, whereas the PHY > defaults to 17us for 1G and 23us for 100M. I set the 1G Tw to maximum 255us and still got the link issue..