diff mbox series

Fix array-quals-1.c for RISC-V

Message ID 20210106091714.110709-1-kito.cheng@sifive.com
State New
Headers show
Series Fix array-quals-1.c for RISC-V | expand

Commit Message

Kito Cheng Jan. 6, 2021, 9:17 a.m. UTC
RISC-V will put those variable on srodata rather than rodata.

gcc/testsuite/ChangeLog:

	* gcc.dg/array-quals-1.c: Allow srodata.
---
 gcc/testsuite/gcc.dg/array-quals-1.c | 40 ++++++++++++++--------------
 1 file changed, 20 insertions(+), 20 deletions(-)

Comments

Jim Wilson Jan. 7, 2021, 7:27 p.m. UTC | #1
On Wed, Jan 6, 2021 at 1:17 AM Kito Cheng <kito.cheng@sifive.com> wrote:

> RISC-V will put those variable on srodata rather than rodata.
> gcc/testsuite/ChangeLog:
>         * gcc.dg/array-quals-1.c: Allow srodata.
>

OK.

Jim
Kito Cheng Jan. 8, 2021, 3:33 a.m. UTC | #2
Committed

On Fri, Jan 8, 2021 at 3:29 AM Jim Wilson <jimw@sifive.com> wrote:
>
> On Wed, Jan 6, 2021 at 1:17 AM Kito Cheng <kito.cheng@sifive.com> wrote:
>
> > RISC-V will put those variable on srodata rather than rodata.
> > gcc/testsuite/ChangeLog:
> >         * gcc.dg/array-quals-1.c: Allow srodata.
> >
>
> OK.
>
> Jim
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.dg/array-quals-1.c b/gcc/testsuite/gcc.dg/array-quals-1.c
index 31aa1d3cb3f..c8d36296434 100644
--- a/gcc/testsuite/gcc.dg/array-quals-1.c
+++ b/gcc/testsuite/gcc.dg/array-quals-1.c
@@ -6,46 +6,46 @@ 
 /* { dg-options "-Wno-discarded-array-qualifiers" } */
 /* The MMIX port always switches to the .data section at the end of a file.  */
 /* { dg-final { scan-assembler-not "\\.data(?!\\.rel\\.ro)" { xfail powerpc*-*-aix* mmix-*-* x86_64-*-mingw* } } } */
-/* { dg-final { scan-assembler-symbol-section {^_?a$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?a$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 static const int a[2] = { 1, 2 };
-/* { dg-final { scan-assembler-symbol-section {^_?a1$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?a1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 const int a1[2] = { 1, 2 };
 typedef const int ci;
-/* { dg-final { scan-assembler-symbol-section {^_?b$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?b$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 static ci b[2] = { 3, 4 };
-/* { dg-final { scan-assembler-symbol-section {^_?b1$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?b1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 ci b1[2] = { 3, 4 };
 typedef int ia[2];
-/* { dg-final { scan-assembler-symbol-section {^_?c$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?c$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 static const ia c = { 5, 6 };
-/* { dg-final { scan-assembler-symbol-section {^_?c1$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?c1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 const ia c1 = { 5, 6 };
 typedef const int cia[2];
-/* { dg-final { scan-assembler-symbol-section {^_?d$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?d$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 static cia d = { 7, 8 };
-/* { dg-final { scan-assembler-symbol-section {^_?d1$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?d1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 cia d1 = { 7, 8 };
-/* { dg-final { scan-assembler-symbol-section {^_?e$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?e$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 static cia e[2] = { { 1, 2 }, { 3, 4 } };
-/* { dg-final { scan-assembler-symbol-section {^_?e1$} {^\.(const|rodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?e1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
 cia e1[2] = { { 1, 2 }, { 3, 4 } };
-/* { dg-final { scan-assembler-symbol-section {^_?p$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?p$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const p = &a;
-/* { dg-final { scan-assembler-symbol-section {^_?q$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?q$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const q = &b;
-/* { dg-final { scan-assembler-symbol-section {^_?r$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?r$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const r = &c;
-/* { dg-final { scan-assembler-symbol-section {^_?s$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?s$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const s = &d;
-/* { dg-final { scan-assembler-symbol-section {^_?t$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?t$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const t = &e;
-/* { dg-final { scan-assembler-symbol-section {^_?p1$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?p1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const p1 = &a1;
-/* { dg-final { scan-assembler-symbol-section {^_?q1$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?q1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const q1 = &b1;
-/* { dg-final { scan-assembler-symbol-section {^_?r1$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?r1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const r1 = &c1;
-/* { dg-final { scan-assembler-symbol-section {^_?s1$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?s1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const s1 = &d1;
-/* { dg-final { scan-assembler-symbol-section {^_?t1$} {^\.(const|rodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?t1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
 void *const t1 = &e1;