| Message ID | 20201210100906.18205-1-martin.kepplinger@puri.sm |
|---|---|
| Headers | show |
| Series | imx8mq: updates for the interconnect fabric | expand |
On 12/10/20 12:09, Martin Kepplinger wrote: > From: Leonard Crestez <leonard.crestez@nxp.com> > > Add initial support for dynamic frequency scaling of the main NOC > on imx8mq. > > Make DDRC the parent of the NOC (using passive governor) so that the > main NOC is automatically scaled together with DDRC by default. > > Support for proactive scaling via interconnect will come on top. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index a841a023e8e0..9c9d68a14e69 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -1158,6 +1158,28 @@ > }; > }; > > + noc: interconnect@32700000 { > + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc"; > + reg = <0x32700000 0x100000>; > + clocks = <&clk IMX8MQ_CLK_NOC>; > + fsl,ddrc = <&ddrc>; > + operating-points-v2 = <&noc_opp_table>; > + > + noc_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-133M { > + opp-hz = /bits/ 64 <133333333>; > + }; > + opp-400M { > + opp-hz = /bits/ 64 <400000000>; > + }; > + opp-800M { > + opp-hz = /bits/ 64 <800000000>; > + }; > + }; > + }; > + > bus@32c00000 { /* AIPS4 */ > compatible = "fsl,aips-bus", "simple-bus"; > reg = <0x32c00000 0x400000>; >
On 12/10/20 12:09, Martin Kepplinger wrote: > Add #interconnect-cells on main &noc so that it will probe the interconnect > provider. > > Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index 9c9d68a14e69..3617b7238952 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -1163,6 +1163,7 @@ > reg = <0x32700000 0x100000>; > clocks = <&clk IMX8MQ_CLK_NOC>; > fsl,ddrc = <&ddrc>; > + #interconnect-cells = <1>; > operating-points-v2 = <&noc_opp_table>; > > noc_opp_table: opp-table { >
On 12/10/20 12:09, Martin Kepplinger wrote: > Add interconnect ports for lcdif to set bus capabilities. > > Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index 3617b7238952..7c4b68bda6fa 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -11,6 +11,7 @@ > #include "dt-bindings/input/input.h" > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/interconnect/imx8mq.h> > #include "imx8mq-pinfunc.h" > > / { > @@ -522,6 +523,8 @@ > <&clk IMX8MQ_VIDEO_PLL1>, > <&clk IMX8MQ_VIDEO_PLL1_OUT>; > assigned-clock-rates = <0>, <0>, <0>, <594000000>; > + interconnects = <&noc IMX8MQ_ICM_LCDIF &noc IMX8MQ_ICS_DRAM>; > + interconnect-names = "dram"; > status = "disabled"; > > port@0 { > Nit: IMO, the dt-bindings patch (4/6) should come before this one - first document the DT properties and then use them. Otherwise looks good to me. Thanks, Georgi
On 12/10/20 12:09, Martin Kepplinger wrote: > Enable INTERCONNECT_IMX8MQ in order to make interconnect more widely > available. > > Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> > --- > arch/arm64/configs/defconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig > index c8ca76751a34..f25748b0fa95 100644 > --- a/arch/arm64/configs/defconfig > +++ b/arch/arm64/configs/defconfig > @@ -1074,6 +1074,8 @@ CONFIG_SLIM_QCOM_CTRL=m > CONFIG_SLIM_QCOM_NGD_CTRL=m > CONFIG_MUX_MMIO=y > CONFIG_INTERCONNECT=y > +CONFIG_INTERCONNECT_IMX=m > +CONFIG_INTERCONNECT_IMX8MQ=m > CONFIG_INTERCONNECT_QCOM=y > CONFIG_INTERCONNECT_QCOM_MSM8916=m > CONFIG_INTERCONNECT_QCOM_OSM_L3=m >
On Thu, Dec 10, 2020 at 11:09:01AM +0100, Martin Kepplinger wrote: > From: Leonard Crestez <leonard.crestez@nxp.com> > > Add initial support for dynamic frequency scaling of the main NOC > on imx8mq. > > Make DDRC the parent of the NOC (using passive governor) so that the > main NOC is automatically scaled together with DDRC by default. > > Support for proactive scaling via interconnect will come on top. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index a841a023e8e0..9c9d68a14e69 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -1158,6 +1158,28 @@ > }; > }; > > + noc: interconnect@32700000 { > + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc"; > + reg = <0x32700000 0x100000>; > + clocks = <&clk IMX8MQ_CLK_NOC>; > + fsl,ddrc = <&ddrc>; > + operating-points-v2 = <&noc_opp_table>; > + > + noc_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-133M { > + opp-hz = /bits/ 64 <133333333>; > + }; Please have a newline between nodes. Shawn > + opp-400M { > + opp-hz = /bits/ 64 <400000000>; > + }; > + opp-800M { > + opp-hz = /bits/ 64 <800000000>; > + }; > + }; > + }; > + > bus@32c00000 { /* AIPS4 */ > compatible = "fsl,aips-bus", "simple-bus"; > reg = <0x32c00000 0x400000>; > -- > 2.20.1 >
revision history: v3: (thanks Krysztof and Georgi) * drop the defconfig cycling patch and fix the interconnect enable config * add the noc node to imx8mq only and use correct properties * add missing signed-off-by v2: (thanks Lucas) * reorder and clean up defconfig changes * use "dram" for the interconnect path name and document it * https://lore.kernel.org/linux-arm-kernel/20201201123932.12312-1-martin.kepplinger@puri.sm/T/#t v1: * link: https://lore.kernel.org/linux-arm-kernel/20201201100124.4676-1-martin.kepplinger@puri.sm/T/ thanks, martin Leonard Crestez (1): arm64: dts: imx8mq: Add NOC node Martin Kepplinger (5): arm64: dts: imx8mq: Add interconnect provider property arm64: dts: imx8mq: Add interconnect for lcdif dt-bindings: mxsfb: Add interconnect bindings for LCDIF path interconnect: imx8mq: Use icc_sync_state arm64: defconfig: Enable interconnect for imx8mq .../devicetree/bindings/display/mxsfb.txt | 6 +++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 26 +++++++++++++++++++ arch/arm64/configs/defconfig | 2 ++ drivers/interconnect/imx/imx8mq.c | 2 ++ 4 files changed, 36 insertions(+)