Message ID | 20201022082143.21170-5-igor.opaniuk@gmail.com |
---|---|
State | Accepted |
Commit | 2f36a693e34bd4bc6ab05d2c6e803aa9eb10d4df |
Delegated to: | Stefano Babic |
Headers | show |
Series | toradex: add support for Apalis iMX8X WB IT V1.1 module | expand |
On Thu, Oct 22, 2020 at 11:22 AM Igor Opaniuk <igor.opaniuk@gmail.com> wrote: > > From: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > Introduce weak function board_mem_get_layout() which allows overriding > the memory layout from board code in runtime, useful for handling > different SKU versions. > > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> > --- > > arch/arm/include/asm/mach-imx/sys_proto.h | 5 ++ > arch/arm/mach-imx/imx8/cpu.c | 96 ++++++++++++++++------- > 2 files changed, 72 insertions(+), 29 deletions(-) > > diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h > index 5f0c1ae218..43eae6d796 100644 > --- a/arch/arm/include/asm/mach-imx/sys_proto.h > +++ b/arch/arm/include/asm/mach-imx/sys_proto.h > @@ -183,6 +183,11 @@ void init_src(void); > void init_snvs(void); > void imx_wdog_disable_powerdown(void); > > +void board_mem_get_layout(u64 *phys_sdram_1_start, > + u64 *phys_sdram_1_size, > + u64 *phys_sdram_2_start, > + u64 *phys_sdram_2_size); > + > int arch_auxiliary_core_check_up(u32 core_id); > > int board_mmc_get_env_dev(int devno); > diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c > index 38b2c0926f..911d6a51d1 100644 > --- a/arch/arm/mach-imx/imx8/cpu.c > +++ b/arch/arm/mach-imx/imx8/cpu.c > @@ -260,14 +260,30 @@ static int get_owned_memreg(sc_rm_mr_t mr, sc_faddr_t *addr_start, > return -EINVAL; > } > > +__weak void board_mem_get_layout(u64 *phys_sdram_1_start, > + u64 *phys_sdram_1_size, > + u64 *phys_sdram_2_start, > + u64 *phys_sdram_2_size) > +{ > + *phys_sdram_1_start = PHYS_SDRAM_1; > + *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; > + *phys_sdram_2_start = PHYS_SDRAM_2; > + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; > +} > + > phys_size_t get_effective_memsize(void) > { > sc_rm_mr_t mr; > sc_faddr_t start, end, end1, start_aligned; > + u64 phys_sdram_1_start, phys_sdram_1_size; > + u64 phys_sdram_2_start, phys_sdram_2_size; > int err; > > - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; > + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, > + &phys_sdram_2_start, &phys_sdram_2_size); > + > > + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; > for (mr = 0; mr < 64; mr++) { > err = get_owned_memreg(mr, &start, &end); > if (!err) { > @@ -277,29 +293,35 @@ phys_size_t get_effective_memsize(void) > continue; > > /* Find the memory region runs the U-Boot */ > - if (start >= PHYS_SDRAM_1 && start <= end1 && > + if (start >= phys_sdram_1_start && start <= end1 && > (start <= CONFIG_SYS_TEXT_BASE && > end >= CONFIG_SYS_TEXT_BASE)) { > - if ((end + 1) <= ((sc_faddr_t)PHYS_SDRAM_1 + > - PHYS_SDRAM_1_SIZE)) > - return (end - PHYS_SDRAM_1 + 1); > + if ((end + 1) <= > + ((sc_faddr_t)phys_sdram_1_start + > + phys_sdram_1_size)) > + return (end - phys_sdram_1_start + 1); > else > - return PHYS_SDRAM_1_SIZE; > + return phys_sdram_1_size; > } > } > } > > - return PHYS_SDRAM_1_SIZE; > + return phys_sdram_1_size; > } > > int dram_init(void) > { > sc_rm_mr_t mr; > sc_faddr_t start, end, end1, end2; > + u64 phys_sdram_1_start, phys_sdram_1_size; > + u64 phys_sdram_2_start, phys_sdram_2_size; > int err; > > - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; > - end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; > + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, > + &phys_sdram_2_start, &phys_sdram_2_size); > + > + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; > + end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size; > for (mr = 0; mr < 64; mr++) { > err = get_owned_memreg(mr, &start, &end); > if (!err) { > @@ -308,12 +330,13 @@ int dram_init(void) > if (start > end) > continue; > > - if (start >= PHYS_SDRAM_1 && start <= end1) { > + if (start >= phys_sdram_1_start && start <= end1) { > if ((end + 1) <= end1) > gd->ram_size += end - start + 1; > else > gd->ram_size += end1 - start; > - } else if (start >= PHYS_SDRAM_2 && start <= end2) { > + } else if (start >= phys_sdram_2_start && > + start <= end2) { > if ((end + 1) <= end2) > gd->ram_size += end - start + 1; > else > @@ -324,8 +347,8 @@ int dram_init(void) > > /* If error, set to the default value */ > if (!gd->ram_size) { > - gd->ram_size = PHYS_SDRAM_1_SIZE; > - gd->ram_size += PHYS_SDRAM_2_SIZE; > + gd->ram_size = phys_sdram_1_size; > + gd->ram_size += phys_sdram_2_size; > } > return 0; > } > @@ -358,11 +381,15 @@ int dram_init_banksize(void) > sc_rm_mr_t mr; > sc_faddr_t start, end, end1, end2; > int i = 0; > + u64 phys_sdram_1_start, phys_sdram_1_size; > + u64 phys_sdram_2_start, phys_sdram_2_size; > int err; > > - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; > - end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; > + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, > + &phys_sdram_2_start, &phys_sdram_2_size); > > + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; > + end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size; > for (mr = 0; mr < 64 && i < CONFIG_NR_DRAM_BANKS; mr++) { > err = get_owned_memreg(mr, &start, &end); > if (!err) { > @@ -370,7 +397,7 @@ int dram_init_banksize(void) > if (start > end) /* Small memory region, no use it */ > continue; > > - if (start >= PHYS_SDRAM_1 && start <= end1) { > + if (start >= phys_sdram_1_start && start <= end1) { > gd->bd->bi_dram[i].start = start; > > if ((end + 1) <= end1) > @@ -381,7 +408,7 @@ int dram_init_banksize(void) > > dram_bank_sort(i); > i++; > - } else if (start >= PHYS_SDRAM_2 && start <= end2) { > + } else if (start >= phys_sdram_2_start && start <= end2) { > gd->bd->bi_dram[i].start = start; > > if ((end + 1) <= end2) > @@ -398,10 +425,10 @@ int dram_init_banksize(void) > > /* If error, set to the default value */ > if (!i) { > - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; > - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; > - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; > - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; > + gd->bd->bi_dram[0].start = phys_sdram_1_start; > + gd->bd->bi_dram[0].size = phys_sdram_1_size; > + gd->bd->bi_dram[1].start = phys_sdram_2_start; > + gd->bd->bi_dram[1].size = phys_sdram_2_size; > } > > return 0; > @@ -411,11 +438,16 @@ static u64 get_block_attrs(sc_faddr_t addr_start) > { > u64 attr = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | > PTE_BLOCK_PXN | PTE_BLOCK_UXN; > + u64 phys_sdram_1_start, phys_sdram_1_size; > + u64 phys_sdram_2_start, phys_sdram_2_size; > + > + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, > + &phys_sdram_2_start, &phys_sdram_2_size); > > - if ((addr_start >= PHYS_SDRAM_1 && > - addr_start <= ((sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) || > - (addr_start >= PHYS_SDRAM_2 && > - addr_start <= ((sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE))) > + if ((addr_start >= phys_sdram_1_start && > + addr_start <= ((sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size)) || > + (addr_start >= phys_sdram_2_start && > + addr_start <= ((sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size))) > return (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE); > > return attr; > @@ -424,14 +456,20 @@ static u64 get_block_attrs(sc_faddr_t addr_start) > static u64 get_block_size(sc_faddr_t addr_start, sc_faddr_t addr_end) > { > sc_faddr_t end1, end2; > + u64 phys_sdram_1_start, phys_sdram_1_size; > + u64 phys_sdram_2_start, phys_sdram_2_size; > + > + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, > + &phys_sdram_2_start, &phys_sdram_2_size); > + > > - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; > - end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; > + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; > + end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size; > > - if (addr_start >= PHYS_SDRAM_1 && addr_start <= end1) { > + if (addr_start >= phys_sdram_1_start && addr_start <= end1) { > if ((addr_end + 1) > end1) > return end1 - addr_start; > - } else if (addr_start >= PHYS_SDRAM_2 && addr_start <= end2) { > + } else if (addr_start >= phys_sdram_2_start && addr_start <= end2) { > if ((addr_end + 1) > end2) > return end2 - addr_start; > } > -- > 2.17.1 >
> From: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Introduce weak function board_mem_get_layout() which allows overriding > the memory layout from board code in runtime, useful for handling > different SKU versions. > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> > Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 5f0c1ae218..43eae6d796 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -183,6 +183,11 @@ void init_src(void); void init_snvs(void); void imx_wdog_disable_powerdown(void); +void board_mem_get_layout(u64 *phys_sdram_1_start, + u64 *phys_sdram_1_size, + u64 *phys_sdram_2_start, + u64 *phys_sdram_2_size); + int arch_auxiliary_core_check_up(u32 core_id); int board_mmc_get_env_dev(int devno); diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 38b2c0926f..911d6a51d1 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -260,14 +260,30 @@ static int get_owned_memreg(sc_rm_mr_t mr, sc_faddr_t *addr_start, return -EINVAL; } +__weak void board_mem_get_layout(u64 *phys_sdram_1_start, + u64 *phys_sdram_1_size, + u64 *phys_sdram_2_start, + u64 *phys_sdram_2_size) +{ + *phys_sdram_1_start = PHYS_SDRAM_1; + *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; + *phys_sdram_2_start = PHYS_SDRAM_2; + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; +} + phys_size_t get_effective_memsize(void) { sc_rm_mr_t mr; sc_faddr_t start, end, end1, start_aligned; + u64 phys_sdram_1_start, phys_sdram_1_size; + u64 phys_sdram_2_start, phys_sdram_2_size; int err; - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, + &phys_sdram_2_start, &phys_sdram_2_size); + + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; for (mr = 0; mr < 64; mr++) { err = get_owned_memreg(mr, &start, &end); if (!err) { @@ -277,29 +293,35 @@ phys_size_t get_effective_memsize(void) continue; /* Find the memory region runs the U-Boot */ - if (start >= PHYS_SDRAM_1 && start <= end1 && + if (start >= phys_sdram_1_start && start <= end1 && (start <= CONFIG_SYS_TEXT_BASE && end >= CONFIG_SYS_TEXT_BASE)) { - if ((end + 1) <= ((sc_faddr_t)PHYS_SDRAM_1 + - PHYS_SDRAM_1_SIZE)) - return (end - PHYS_SDRAM_1 + 1); + if ((end + 1) <= + ((sc_faddr_t)phys_sdram_1_start + + phys_sdram_1_size)) + return (end - phys_sdram_1_start + 1); else - return PHYS_SDRAM_1_SIZE; + return phys_sdram_1_size; } } } - return PHYS_SDRAM_1_SIZE; + return phys_sdram_1_size; } int dram_init(void) { sc_rm_mr_t mr; sc_faddr_t start, end, end1, end2; + u64 phys_sdram_1_start, phys_sdram_1_size; + u64 phys_sdram_2_start, phys_sdram_2_size; int err; - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; - end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, + &phys_sdram_2_start, &phys_sdram_2_size); + + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; + end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size; for (mr = 0; mr < 64; mr++) { err = get_owned_memreg(mr, &start, &end); if (!err) { @@ -308,12 +330,13 @@ int dram_init(void) if (start > end) continue; - if (start >= PHYS_SDRAM_1 && start <= end1) { + if (start >= phys_sdram_1_start && start <= end1) { if ((end + 1) <= end1) gd->ram_size += end - start + 1; else gd->ram_size += end1 - start; - } else if (start >= PHYS_SDRAM_2 && start <= end2) { + } else if (start >= phys_sdram_2_start && + start <= end2) { if ((end + 1) <= end2) gd->ram_size += end - start + 1; else @@ -324,8 +347,8 @@ int dram_init(void) /* If error, set to the default value */ if (!gd->ram_size) { - gd->ram_size = PHYS_SDRAM_1_SIZE; - gd->ram_size += PHYS_SDRAM_2_SIZE; + gd->ram_size = phys_sdram_1_size; + gd->ram_size += phys_sdram_2_size; } return 0; } @@ -358,11 +381,15 @@ int dram_init_banksize(void) sc_rm_mr_t mr; sc_faddr_t start, end, end1, end2; int i = 0; + u64 phys_sdram_1_start, phys_sdram_1_size; + u64 phys_sdram_2_start, phys_sdram_2_size; int err; - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; - end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, + &phys_sdram_2_start, &phys_sdram_2_size); + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; + end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size; for (mr = 0; mr < 64 && i < CONFIG_NR_DRAM_BANKS; mr++) { err = get_owned_memreg(mr, &start, &end); if (!err) { @@ -370,7 +397,7 @@ int dram_init_banksize(void) if (start > end) /* Small memory region, no use it */ continue; - if (start >= PHYS_SDRAM_1 && start <= end1) { + if (start >= phys_sdram_1_start && start <= end1) { gd->bd->bi_dram[i].start = start; if ((end + 1) <= end1) @@ -381,7 +408,7 @@ int dram_init_banksize(void) dram_bank_sort(i); i++; - } else if (start >= PHYS_SDRAM_2 && start <= end2) { + } else if (start >= phys_sdram_2_start && start <= end2) { gd->bd->bi_dram[i].start = start; if ((end + 1) <= end2) @@ -398,10 +425,10 @@ int dram_init_banksize(void) /* If error, set to the default value */ if (!i) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + gd->bd->bi_dram[0].start = phys_sdram_1_start; + gd->bd->bi_dram[0].size = phys_sdram_1_size; + gd->bd->bi_dram[1].start = phys_sdram_2_start; + gd->bd->bi_dram[1].size = phys_sdram_2_size; } return 0; @@ -411,11 +438,16 @@ static u64 get_block_attrs(sc_faddr_t addr_start) { u64 attr = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN; + u64 phys_sdram_1_start, phys_sdram_1_size; + u64 phys_sdram_2_start, phys_sdram_2_size; + + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, + &phys_sdram_2_start, &phys_sdram_2_size); - if ((addr_start >= PHYS_SDRAM_1 && - addr_start <= ((sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) || - (addr_start >= PHYS_SDRAM_2 && - addr_start <= ((sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE))) + if ((addr_start >= phys_sdram_1_start && + addr_start <= ((sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size)) || + (addr_start >= phys_sdram_2_start && + addr_start <= ((sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size))) return (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE); return attr; @@ -424,14 +456,20 @@ static u64 get_block_attrs(sc_faddr_t addr_start) static u64 get_block_size(sc_faddr_t addr_start, sc_faddr_t addr_end) { sc_faddr_t end1, end2; + u64 phys_sdram_1_start, phys_sdram_1_size; + u64 phys_sdram_2_start, phys_sdram_2_size; + + board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, + &phys_sdram_2_start, &phys_sdram_2_size); + - end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; - end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; + end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; + end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size; - if (addr_start >= PHYS_SDRAM_1 && addr_start <= end1) { + if (addr_start >= phys_sdram_1_start && addr_start <= end1) { if ((addr_end + 1) > end1) return end1 - addr_start; - } else if (addr_start >= PHYS_SDRAM_2 && addr_start <= end2) { + } else if (addr_start >= phys_sdram_2_start && addr_start <= end2) { if ((addr_end + 1) > end2) return end2 - addr_start; }