Message ID | 20201126105900.26658-1-aisheng.dong@nxp.com |
---|---|
Headers | show |
Series | arm64: dts: imx8: architecture improvement and adding imx8qm support | expand |
> -----Original Message----- > From: Aisheng Dong > Sent: 2020年11月26日 18:59 > To: devicetree@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org; dl-linux-imx <linux-imx@nxp.com>; > linux-mmc@vger.kernel.org; Aisheng Dong <aisheng.dong@nxp.com>; Rob > Herring <robh+dt@kernel.org>; Mark Rutland <mark.rutland@arm.com>; > Shawn Guo <shawnguo@kernel.org>; Sascha Hauer <kernel@pengutronix.de>; > Fabio Estevam <fabio.estevam@nxp.com> > Subject: [PATCH RESEND v4 13/18] arm64: dts: imx8qm: add conn ss support > > The CONN SS of MX8QM is mostly the same as MX8QXP except it has one more > USB HSIC module support. So we can fully reuse the exist CONN SS dtsi. > Add <soc>-ss-conn.dtsi with compatible string updated according to > imx8-ss-conn.dtsi. > > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: devicetree@vger.kernel.org > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Sascha Hauer <kernel@pengutronix.de> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> > --- > ChangeLog: > v2->v3: > * no changes > v1->v2: > * change to the new two cell scu clk binding > --- > .../boot/dts/freescale/imx8qm-ss-conn.dtsi | 21 +++++++++++++++++++ > 1 file changed, 21 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi > b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi > new file mode 100644 > index 000000000000..dc47c5c80eae > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi > @@ -0,0 +1,21 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2019-2020 NXP > + * Dong Aisheng <aisheng.dong@nxp.com> > + */ > + > +&fec1 { > + compatible = "fsl,imx8qm-fec", "fsl,imx6sx-fec"; }; > + > +&fec2 { > + compatible = "fsl,imx8qm-fec", "fsl,imx6sx-fec"; }; > + > +&usdhc1 { > + compatible = "fsl,imx8qm-usdhc", "fsl,imx7d-usdhc"; }; > + > +&usdhc2 { > + compatible = "fsl,imx8qm-usdhc", "fsl,imx7d-usdhc"; }; Hi Aisheng, For usdhc1 and usdhc2, the compatible setting should be like this: compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc"; Since imx8qm also support hs400es and command queue, The usdhc IP is the same with imx8qxp. Best Regards Haibo Chen > -- > 2.23.0
Hi Shawn, Could you please help take a look at this patch series? It's been without comments for months. Please let me know if you want me to resend now or I can resend later with new comments addressed if any. Regards Aisheng > From: Aisheng Dong <aisheng.dong@nxp.com> > Sent: Thursday, November 26, 2020 6:59 PM > > IMX SCU based platforms (e.g. MX8QM/MX8QXP) are comprised of a number > of SS (Subsystems), those SS may be shared between different SoCs while most > of them can be reused like Devices Resources, Clocks, Power domains and etc. > > This patch series aims to improve the MX8 architecture to comply with the HW > design to save a lot of duplicated codes and benefits us a better > maintainability and scalability in the future. > > ChangeLog: > v4-resend: > * no change except put three module binding patches first which are used > by this patchset. > v3->v4: > * mainly rebase to latest kernel except a few very minor changes like change > to use > new scu protocol binding which was not supported in last version > v2->v3: > * use clock-indices property instead of bit-offset property suggested by > Shawn Guo > * rebase to latest shawn/for-next > v1->v2: > * change to the new two cells scu clock binding, so original adding scu clocks > patches were removed. > * Move scu pd node above clk node > > > Dong Aisheng (18): > dt-bindings: mmc: imx: fix the wrongly dropped imx8qm compatible > string > dt-bindings: arm: fsl: add imx8qm boards compatible string > dt-bindings: mailbox: mu: add imx8qm support > arm64: dts: imx8qxp: add fallback compatible string for scu pd > arm64: dts: imx8qxp: move scu pd node before scu clock node > arm64: dts: imx8qxp: orginize dts in subsystems > arm64: dts: imx8: add lsio lpcg clocks > arm64: dts: imx8: add conn lpcg clocks > arm64: dts: imx8: add adma lpcg clocks > arm64: dts: imx8: switch to two cell scu clock binding > arm64: dts: imx8: switch to new lpcg clock binding > arm64: dts: imx8qm: add lsio ss support > arm64: dts: imx8qm: add conn ss support > arm64: dts: imx8: split adma ss into dma and audio ss > arm64: dts: imx8qm: add dma ss support > arm64: dts: imx: add imx8qm common dts file > arm64: dts: imx: add imx8qm mek support > arm64: defconfig: add imx8qm mek support > > .../devicetree/bindings/arm/fsl.yaml | 6 + > .../devicetree/bindings/mailbox/fsl,mu.yaml | 5 +- > .../bindings/mmc/fsl-imx-esdhc.yaml | 1 + > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../boot/dts/freescale/imx8-ss-adma.dtsi | 8 + > .../boot/dts/freescale/imx8-ss-audio.dtsi | 68 +++ > .../boot/dts/freescale/imx8-ss-conn.dtsi | 184 ++++++++ > .../arm64/boot/dts/freescale/imx8-ss-ddr.dtsi | 18 > + .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 202 +++++++++ > .../boot/dts/freescale/imx8-ss-lsio.dtsi | 311 +++++++++++++ > arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 144 ++++++ > .../boot/dts/freescale/imx8qm-ss-conn.dtsi | 21 + > .../boot/dts/freescale/imx8qm-ss-dma.dtsi | 51 +++ > .../boot/dts/freescale/imx8qm-ss-lsio.dtsi | 61 +++ > arch/arm64/boot/dts/freescale/imx8qm.dtsi | 176 ++++++++ > .../boot/dts/freescale/imx8qxp-ai_ml.dts | 20 +- > .../freescale/imx8qxp-colibri-eval-v3.dtsi | 8 +- > .../boot/dts/freescale/imx8qxp-colibri.dtsi | 12 +- > arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 50 +-- > .../boot/dts/freescale/imx8qxp-ss-adma.dtsi | 37 ++ > .../boot/dts/freescale/imx8qxp-ss-conn.dtsi | 25 ++ > .../boot/dts/freescale/imx8qxp-ss-lsio.dtsi | 61 +++ > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 423 ++---------------- > arch/arm64/configs/defconfig | 1 + > 24 files changed, 1455 insertions(+), 439 deletions(-) create mode 100644 > arch/arm64/boot/dts/freescale/imx8-ss-adma.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-ddr.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-mek.dts > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi > > -- > 2.23.0
On Fri, Feb 26, 2021 at 08:33:38AM +0000, Aisheng Dong wrote: > Hi Shawn, > > Could you please help take a look at this patch series? It's been without comments for months. > Please let me know if you want me to resend now or I can resend later with new comments addressed if any. I'm fine with the series, but there is a comment from Haibo on patch #13. And yes, you need to rebase and resend the series. Shawn