@@ -1109,11 +1109,11 @@
RS6000_BTM_P10, /* MASK */ \
(RS6000_BTC_ ## ATTR /* ATTR */ \
| RS6000_BTC_UNARY), \
CODE_FOR_ ## ICODE) /* ICODE */
-#define BU_P10_MISC_2(ENUM, NAME, ATTR, ICODE) \
+#define BU_P10_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_2 (P10_BUILTIN_ ## ENUM, /* ENUM */ \
"__builtin_" NAME, /* NAME */ \
RS6000_BTM_P10 \
| RS6000_BTM_POWERPC64, /* MASK */ \
(RS6000_BTC_ ## ATTR /* ATTR */ \
@@ -2725,15 +2725,15 @@ BU_P9_64BIT_2 (CMPEQB, "byte_in_set", CONST, cmpeqb)
BU_P9_OVERLOAD_2 (CMPRB, "byte_in_range")
BU_P9_OVERLOAD_2 (CMPRB2, "byte_in_either_range")
BU_P9_OVERLOAD_2 (CMPEQB, "byte_in_set")
/* Builtins for scalar instructions added in ISA 3.1 (power10). */
-BU_P10_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
-BU_P10_MISC_2 (CNTLZDM, "cntlzdm", CONST, cntlzdm)
-BU_P10_MISC_2 (CNTTZDM, "cnttzdm", CONST, cnttzdm)
-BU_P10_MISC_2 (PDEPD, "pdepd", CONST, pdepd)
-BU_P10_MISC_2 (PEXTD, "pextd", CONST, pextd)
+BU_P10_POWERPC64_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
+BU_P10_POWERPC64_MISC_2 (CNTLZDM, "cntlzdm", CONST, cntlzdm)
+BU_P10_POWERPC64_MISC_2 (CNTTZDM, "cnttzdm", CONST, cnttzdm)
+BU_P10_POWERPC64_MISC_2 (PDEPD, "pdepd", CONST, pdepd)
+BU_P10_POWERPC64_MISC_2 (PEXTD, "pextd", CONST, pextd)
/* Builtins for vector instructions added in ISA 3.1 (power10). */
BU_P10V_AV_2 (VCLRLB, "vclrlb", CONST, vclrlb)
BU_P10V_AV_2 (VCLRRB, "vclrrb", CONST, vclrrb)
BU_P10V_AV_2 (VCFUGED, "vcfuged", CONST, vcfuged)