| Message ID | 20200721115942.27009-1-Jet.Le@ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [linux,dev-5.7,v1] ARM: dts: aspeed: rainier: Add I2c buses for nvme use | expand |
Hi Jet, On 7/21/20 5:29 PM, Jet Li wrote: > From: Jet Li <Jet.Li@ibm.com> > > Adding pca9552 exposes the presence detect lines for the cards > and tca9554 exposes the presence details for the cards. > > Signed-off-by: Jet Li <Jet.Li@ibm.com> > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 105 +++++++++++++++++++++++++++ > 1 file changed, 105 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index 1ae119a..76a7e82 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -248,6 +248,21 @@ > compatible = "atmel,24c64"; > reg = <0x51>; > }; > + > + tca9554@40 { > + compatible = "ti,tca9554"; > + reg = <0x40>; > + gpio-controller; > + #gpio-cells = <2>; > + > + smbus0 { > + gpio-hog; > + gpios = <4 GPIO_ACTIVE_HIGH>; > + output-high; > + line-name = "smbus0"; > + }; > + }; > + This looks incorrect, I don't see such a device on I2C-0 in the system workbook. > }; > > &i2c1 { > @@ -562,6 +577,96 @@ > compatible = "atmel,24c64"; > reg = <0x51>; > }; > + > + pca1: pca9552@61 { > + compatible = "nxp,pca9552"; > + reg = <0x61>; > + #address-cells = <1>; > + #size-cells = <0>; > + gpio-controller; > + #gpio-cells = <2>; > + > + gpio@0 { > + reg = <0>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@1 { > + reg = <1>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@2 { > + reg = <2>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@3 { > + reg = <3>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@4 { > + reg = <4>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@5 { > + reg = <5>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@6 { > + reg = <6>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@7 { > + reg = <7>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@8 { > + reg = <8>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@9 { > + reg = <9>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@10 { > + reg = <10>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@11 { > + reg = <11>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@12 { > + reg = <12>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@13 { > + reg = <13>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@14 { > + reg = <14>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@15 { > + reg = <15>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + }; > + > }; > > &i2c9 {
On Tue, 2020-08-18 at 19:13 +0530, Santosh Puranik wrote: > Hi Jet, > > On 7/21/20 5:29 PM, Jet Li wrote: > > From: Jet Li <Jet.Li@ibm.com> > > > > Adding pca9552 exposes the presence detect lines for the cards > > and tca9554 exposes the presence details for the cards. > > > > Signed-off-by: Jet Li <Jet.Li@ibm.com> Actually 5.8 just went in, so this will need to be rebased and resubmitted.
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 1ae119a..76a7e82 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -248,6 +248,21 @@ compatible = "atmel,24c64"; reg = <0x51>; }; + + tca9554@40 { + compatible = "ti,tca9554"; + reg = <0x40>; + gpio-controller; + #gpio-cells = <2>; + + smbus0 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus0"; + }; + }; + }; &i2c1 { @@ -562,6 +577,96 @@ compatible = "atmel,24c64"; reg = <0x51>; }; + + pca1: pca9552@61 { + compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + + gpio@0 { + reg = <0>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@1 { + reg = <1>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@2 { + reg = <2>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@3 { + reg = <3>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@4 { + reg = <4>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@5 { + reg = <5>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@6 { + reg = <6>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@7 { + reg = <7>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@8 { + reg = <8>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@9 { + reg = <9>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@10 { + reg = <10>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@11 { + reg = <11>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@12 { + reg = <12>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@13 { + reg = <13>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@14 { + reg = <14>; + type = <PCA955X_TYPE_GPIO>; + }; + + gpio@15 { + reg = <15>; + type = <PCA955X_TYPE_GPIO>; + }; + }; + }; &i2c9 {