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[v32,0/6] Multicolor Framework v32

Message ID 20200722153146.8767-1-dmurphy@ti.com
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Series Multicolor Framework v32 | expand

Message

Dan Murphy July 22, 2020, 3:31 p.m. UTC
Hello

This is the remaining patches in the multicolor framework series.  Only the
LP50xx driver has been updated per the review comment here

https://lore.kernel.org/patchwork/patch/1274070/

In addition to these fixes fixes for the enable/disable and reset functions have
also been updated.

Summary:
Converted links from http->https
Fixed comment style
Fixed enable/disable function
Refactored probe_dt code
Fixed checkpatch style issues
Fixed issues when building with W=1 C=1


Dan Murphy (6):
  dt: bindings: lp50xx: Introduce the lp50xx family of RGB drivers
  leds: lp50xx: Add the LP50XX family of the RGB LED driver
  ARM: defconfig: u8500: Add LP55XX_COMMON config flag
  ARM: dts: n900: Add reg property to the LP5523 channel node
  ARM: dts: imx6dl-yapp4: Add reg property to the lp5562 channel node
  ARM: dts: ste-href: Add reg property to the LP5521 channel nodes

 .../devicetree/bindings/leds/leds-lp50xx.yaml | 130 +++
 arch/arm/boot/dts/imx6dl-yapp4-common.dtsi    |  14 +-
 arch/arm/boot/dts/omap3-n900.dts              |  29 +-
 arch/arm/boot/dts/ste-href.dtsi               |  22 +-
 arch/arm/configs/u8500_defconfig              |   1 +
 drivers/leds/Kconfig                          |  11 +
 drivers/leds/Makefile                         |   1 +
 drivers/leds/leds-lp50xx.c                    | 791 ++++++++++++++++++
 8 files changed, 980 insertions(+), 19 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/leds/leds-lp50xx.yaml
 create mode 100644 drivers/leds/leds-lp50xx.c

Comments

Dan Murphy July 28, 2020, 1:38 p.m. UTC | #1
Russel and Linus

On 7/22/20 10:31 AM, Dan Murphy wrote:
> The dependencies for the LP55XX LED drivers have been updated so that
> the child devices (i.e. LP5521) now depends on the LP55XX_COMMON config
> flag as opposed to the device selecting the LP55XX_COMMON flag.  The
> LP55XX_COMMON needs to be set in the defconfig.
>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
>   arch/arm/configs/u8500_defconfig | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
> index 28dd7cf56048..dea599e1c17e 100644
> --- a/arch/arm/configs/u8500_defconfig
> +++ b/arch/arm/configs/u8500_defconfig
> @@ -113,6 +113,7 @@ CONFIG_NEW_LEDS=y
>   CONFIG_LEDS_CLASS=y
>   CONFIG_LEDS_LM3530=y
>   CONFIG_LEDS_GPIO=y
> +CONFIG_LEDS_LP55XX_COMMON=y
>   CONFIG_LEDS_LP5521=y
>   CONFIG_LEDS_TRIGGER_HEARTBEAT=y
>   CONFIG_RTC_CLASS=y


I missed adding you to the patch.

Can you kindly review this change?

Dan
Linus Walleij Aug. 3, 2020, 11:14 p.m. UTC | #2
On Wed, Jul 22, 2020 at 5:32 PM Dan Murphy <dmurphy@ti.com> wrote:

> The dependencies for the LP55XX LED drivers have been updated so that
> the child devices (i.e. LP5521) now depends on the LP55XX_COMMON config
> flag as opposed to the device selecting the LP55XX_COMMON flag.  The
> LP55XX_COMMON needs to be set in the defconfig.
>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>

OK then I guess you have good reasons to have it like this.
Acked-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij
Pavel Machek Aug. 11, 2020, 10:29 a.m. UTC | #3
Hi!

> Introduce the LP5036/30/24/18/12/9 RGB LED driver.
> The difference in these parts are the number of
> LED outputs where the:
> 
> LP5036 can control 36 LEDs
> LP5030 can control 30 LEDs
> LP5024 can control 24 LEDs
> LP5018 can control 18 LEDs
> LP5012 can control 12 LEDs
> LP5009 can control 9 LEDs
> 
> The device has the ability to group LED outputs into control banks
> so that multiple LED banks can be controlled with the same mixing and
> brightness. Or the LED outputs can also be controlled independently.
> 

> diff --git a/drivers/leds/leds-lp50xx.c b/drivers/leds/leds-lp50xx.c
> new file mode 100644
> index 000000000000..f4ef9b7f21b2
> --- /dev/null
> +++ b/drivers/leds/leds-lp50xx.c
> @@ -0,0 +1,791 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// TI LP50XX LED chip family driver
> +// Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/

I assume 2018-2020


> +#define LP5012_OUT0_CLR		0x0b
> +#define LP5012_OUT1_CLR		0x0c
> +#define LP5012_OUT2_CLR		0x0d
> +#define LP5012_OUT3_CLR		0x0e
> +#define LP5012_OUT4_CLR		0x0f
> +#define LP5012_OUT5_CLR		0x10
> +#define LP5012_OUT6_CLR		0x11
> +#define LP5012_OUT7_CLR		0x12
> +#define LP5012_OUT8_CLR		0x13
> +#define LP5012_OUT9_CLR		0x14
> +#define LP5012_OUT10_CLR	0x15
> +#define LP5012_OUT11_CLR	0x16
> +
> +#define LP5024_OUT0_CLR		0x0f
> +#define LP5024_OUT1_CLR		0x10
> +#define LP5024_OUT2_CLR		0x11
> +#define LP5024_OUT3_CLR		0x12
> +#define LP5024_OUT4_CLR		0x13
> +#define LP5024_OUT5_CLR		0x14
> +#define LP5024_OUT6_CLR		0x15
> +#define LP5024_OUT7_CLR		0x16
> +#define LP5024_OUT8_CLR		0x17
> +#define LP5024_OUT9_CLR		0x18
> +#define LP5024_OUT10_CLR	0x19
> +#define LP5024_OUT11_CLR	0x1a
> +#define LP5024_OUT12_CLR	0x1b
> +#define LP5024_OUT13_CLR	0x1c
> +#define LP5024_OUT14_CLR	0x1d
> +#define LP5024_OUT15_CLR	0x1e
> +#define LP5024_OUT16_CLR	0x1f
> +#define LP5024_OUT17_CLR	0x20
> +#define LP5024_OUT18_CLR	0x21
> +#define LP5024_OUT19_CLR	0x22
> +#define LP5024_OUT20_CLR	0x23
> +#define LP5024_OUT21_CLR	0x24
> +#define LP5024_OUT22_CLR	0x25
> +#define LP5024_OUT23_CLR	0x26

> +#define LP5036_OUT0_CLR		0x14
> +#define LP5036_OUT1_CLR		0x15
> +#define LP5036_OUT2_CLR		0x16
> +#define LP5036_OUT3_CLR		0x17
> +#define LP5036_OUT4_CLR		0x18
> +#define LP5036_OUT5_CLR		0x19
> +#define LP5036_OUT6_CLR		0x1a
> +#define LP5036_OUT7_CLR		0x1b
> +#define LP5036_OUT8_CLR		0x1c
> +#define LP5036_OUT9_CLR		0x1d
> +#define LP5036_OUT10_CLR	0x1e
> +#define LP5036_OUT11_CLR	0x1f
> +#define LP5036_OUT12_CLR	0x20
> +#define LP5036_OUT13_CLR	0x21
> +#define LP5036_OUT14_CLR	0x22
> +#define LP5036_OUT15_CLR	0x23
> +#define LP5036_OUT16_CLR	0x24
> +#define LP5036_OUT17_CLR	0x25
> +#define LP5036_OUT18_CLR	0x26
> +#define LP5036_OUT19_CLR	0x27
> +#define LP5036_OUT20_CLR	0x28
> +#define LP5036_OUT21_CLR	0x29
> +#define LP5036_OUT22_CLR	0x2a
> +#define LP5036_OUT23_CLR	0x2b
> +#define LP5036_OUT24_CLR	0x2c
> +#define LP5036_OUT25_CLR	0x2d
> +#define LP5036_OUT26_CLR	0x2e
> +#define LP5036_OUT27_CLR	0x2f
> +#define LP5036_OUT28_CLR	0x30
> +#define LP5036_OUT29_CLR	0x31
> +#define LP5036_OUT30_CLR	0x32
> +#define LP5036_OUT31_CLR	0x33
> +#define LP5036_OUT32_CLR	0x34
> +#define LP5036_OUT33_CLR	0x35
> +#define LP5036_OUT34_CLR	0x36
> +#define LP5036_OUT35_CLR	0x37

These are really useless. Please get rid of them.

> +#define LP5009_MAX_LED_MODULES	2
> +#define LP5012_MAX_LED_MODULES	4
> +#define LP5018_MAX_LED_MODULES	6
> +#define LP5024_MAX_LED_MODULES	8
> +#define LP5030_MAX_LED_MODULES	10
> +#define LP5036_MAX_LED_MODULES	12
> +
> +#define LP5009_MAX_LEDS	(LP5009_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE)
> +#define LP5012_MAX_LEDS	(LP5012_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE)
> +#define LP5018_MAX_LEDS	(LP5018_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE)
> +#define LP5024_MAX_LEDS	(LP5024_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE)
> +#define LP5030_MAX_LEDS	(LP5030_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE)
> +#define LP5036_MAX_LEDS	(LP5036_MAX_LED_MODULES *  LP50XX_LEDS_PER_MODULE)

As are these. In general, when define is used just once, please think
if we really need it.

> +static int lp50xx_probe_dt(struct lp50xx *priv)
> +{
> +	struct fwnode_handle *child = NULL;
> +	struct fwnode_handle *led_node = NULL;
> +	struct led_init_data init_data = {};
> +	struct led_classdev *led_cdev;
> +	struct mc_subled *mc_led_info;
> +	struct lp50xx_led *led;
> +	int num_colors;
> +	u32 color_id;
> +	size_t i = 0;

No reason this has to be size_t. Int?

Best regards,
									Pavel
Pavel Machek Aug. 11, 2020, 10:31 a.m. UTC | #4
Hi!

> Introduce the LP5036/30/24/18/12/9 RGB LED driver.
> The difference in these parts are the number of
> LED outputs where the:
> 
> LP5036 can control 36 LEDs
> LP5030 can control 30 LEDs
> LP5024 can control 24 LEDs
> LP5018 can control 18 LEDs
> LP5012 can control 12 LEDs
> LP5009 can control 9 LEDs
> 

> +		fwnode_for_each_child_node(child, led_node) {
> +			ret = fwnode_property_read_u32(led_node, "color",
> +						       &color_id);
> +			if (ret) {
> +				dev_err(priv->dev, "Cannot read color\n");
> +				goto child_out;
> +			}
> +
> +			mc_led_info[num_colors].color_index = color_id;
> +			num_colors++;
> +		}
> +
> +		led->priv = priv;
> +		led->mc_cdev.num_colors = num_colors;
> +		led->mc_cdev.subled_info = mc_led_info;
> +		led_cdev = &led->mc_cdev.led_cdev;
> +		led_cdev->brightness_set_blocking = lp50xx_brightness_set;
> +
> +		fwnode_property_read_string(child, "linux,default-trigger",
> +					    &led_cdev->default_trigger);
> +
> +		ret = devm_led_classdev_multicolor_register_ext(&priv->client->dev,
> +						       &led->mc_cdev,
> +						       &init_data);
> +		if (ret) {
> +			dev_err(&priv->client->dev, "led register err: %d\n",
> +				ret);
> +			goto child_out;
> +		}
> +		i++;
> +	}
> +
> +	return 0;
> +
> +child_out:
> +	fwnode_handle_put(child);
> +	return ret;
> +}

Are you really sure fwnode_handle_put() handling is okay here? In
particular, where does that happen in non-error path?

Best regards,
									Pavel
Pavel Machek Aug. 11, 2020, 10:54 a.m. UTC | #5
Hi!

> +/* LP5009 and LP5012 registers */
> +#define LP5012_BNK_BRT		0x03
> +#define LP5012_BNKA_CLR		0x04
> +#define LP5012_BNKB_CLR		0x05
> +#define LP5012_BNKC_CLR		0x06
> +#define LP5012_LED0_BRT		0x07
> +#define LP5012_LED1_BRT		0x08
> +#define LP5012_LED2_BRT		0x09
> +#define LP5012_LED3_BRT		0x0a
> +#define LP5012_OUT0_CLR		0x0b
> +#define LP5012_OUT1_CLR		0x0c
> +#define LP5012_OUT2_CLR		0x0d
> +#define LP5012_OUT3_CLR		0x0e
> +#define LP5012_OUT4_CLR		0x0f
> +#define LP5012_OUT5_CLR		0x10
> +#define LP5012_OUT6_CLR		0x11
> +#define LP5012_OUT7_CLR		0x12
> +#define LP5012_OUT8_CLR		0x13
> +#define LP5012_OUT9_CLR		0x14
> +#define LP5012_OUT10_CLR	0x15
> +#define LP5012_OUT11_CLR	0x16
> +#define LP5012_RESET		0x17
> +
> +/* LP5018 and LP5024 registers */
> +#define LP5024_BNK_BRT		0x03
> +#define LP5024_BNKA_CLR		0x04
> +#define LP5024_BNKB_CLR		0x05
> +#define LP5024_BNKC_CLR		0x06
> +#define LP5024_LED0_BRT		0x07
> +#define LP5024_LED1_BRT		0x08
> +#define LP5024_LED2_BRT		0x09
> +#define LP5024_LED3_BRT		0x0a
> +#define LP5024_LED4_BRT		0x0b
> +#define LP5024_LED5_BRT		0x0c
> +#define LP5024_LED6_BRT		0x0d
> +#define LP5024_LED7_BRT		0x0e
> +
> +#define LP5024_OUT0_CLR		0x0f
> +#define LP5024_OUT1_CLR		0x10
> +#define LP5024_OUT2_CLR		0x11
> +#define LP5024_OUT3_CLR		0x12
> +#define LP5024_OUT4_CLR		0x13
> +#define LP5024_OUT5_CLR		0x14
> +#define LP5024_OUT6_CLR		0x15
> +#define LP5024_OUT7_CLR		0x16
> +#define LP5024_OUT8_CLR		0x17
> +#define LP5024_OUT9_CLR		0x18
> +#define LP5024_OUT10_CLR	0x19
> +#define LP5024_OUT11_CLR	0x1a
> +#define LP5024_OUT12_CLR	0x1b
> +#define LP5024_OUT13_CLR	0x1c
> +#define LP5024_OUT14_CLR	0x1d
> +#define LP5024_OUT15_CLR	0x1e
> +#define LP5024_OUT16_CLR	0x1f
> +#define LP5024_OUT17_CLR	0x20
> +#define LP5024_OUT18_CLR	0x21
> +#define LP5024_OUT19_CLR	0x22
> +#define LP5024_OUT20_CLR	0x23
> +#define LP5024_OUT21_CLR	0x24
> +#define LP5024_OUT22_CLR	0x25
> +#define LP5024_OUT23_CLR	0x26
> +#define LP5024_RESET		0x27
> +
> +/* LP5030 and LP5036 registers */
> +#define LP5036_LED_CFG1		0x03
> +#define LP5036_BNK_BRT		0x04
> +#define LP5036_BNKA_CLR		0x05
> +#define LP5036_BNKB_CLR		0x06
> +#define LP5036_BNKC_CLR		0x07
> +#define LP5036_LED0_BRT		0x08
> +#define LP5036_LED1_BRT		0x09
> +#define LP5036_LED2_BRT		0x0a
> +#define LP5036_LED3_BRT		0x0b
> +#define LP5036_LED4_BRT		0x0c
> +#define LP5036_LED5_BRT		0x0d
> +#define LP5036_LED6_BRT		0x0e
> +#define LP5036_LED7_BRT		0x0f
> +#define LP5036_LED8_BRT		0x10
> +#define LP5036_LED9_BRT		0x11
> +#define LP5036_LED10_BRT	0x12
> +#define LP5036_LED11_BRT	0x13
> +
> +#define LP5036_OUT0_CLR		0x14
> +#define LP5036_OUT1_CLR		0x15
> +#define LP5036_OUT2_CLR		0x16
> +#define LP5036_OUT3_CLR		0x17
> +#define LP5036_OUT4_CLR		0x18
> +#define LP5036_OUT5_CLR		0x19
> +#define LP5036_OUT6_CLR		0x1a
> +#define LP5036_OUT7_CLR		0x1b
> +#define LP5036_OUT8_CLR		0x1c
> +#define LP5036_OUT9_CLR		0x1d
> +#define LP5036_OUT10_CLR	0x1e
> +#define LP5036_OUT11_CLR	0x1f
> +#define LP5036_OUT12_CLR	0x20
> +#define LP5036_OUT13_CLR	0x21
> +#define LP5036_OUT14_CLR	0x22
> +#define LP5036_OUT15_CLR	0x23
> +#define LP5036_OUT16_CLR	0x24
> +#define LP5036_OUT17_CLR	0x25
> +#define LP5036_OUT18_CLR	0x26
> +#define LP5036_OUT19_CLR	0x27
> +#define LP5036_OUT20_CLR	0x28
> +#define LP5036_OUT21_CLR	0x29
> +#define LP5036_OUT22_CLR	0x2a
> +#define LP5036_OUT23_CLR	0x2b
> +#define LP5036_OUT24_CLR	0x2c
> +#define LP5036_OUT25_CLR	0x2d
> +#define LP5036_OUT26_CLR	0x2e
> +#define LP5036_OUT27_CLR	0x2f
> +#define LP5036_OUT28_CLR	0x30
> +#define LP5036_OUT29_CLR	0x31
> +#define LP5036_OUT30_CLR	0x32
> +#define LP5036_OUT31_CLR	0x33
> +#define LP5036_OUT32_CLR	0x34
> +#define LP5036_OUT33_CLR	0x35
> +#define LP5036_OUT34_CLR	0x36
> +#define LP5036_OUT35_CLR	0x37
> +#define LP5036_RESET		0x38

> +static const struct reg_default lp5012_reg_defs[] = {
...
> +	{LP5012_OUT1_CLR, 0x00},
> +	{LP5012_OUT2_CLR, 0x00},
> +	{LP5012_OUT3_CLR, 0x00},
> +	{LP5012_OUT4_CLR, 0x00},
> +	{LP5012_OUT5_CLR, 0x00},
> +	{LP5012_OUT6_CLR, 0x00},
> +	{LP5012_OUT7_CLR, 0x00},
> +	{LP5012_OUT8_CLR, 0x00},
> +	{LP5012_OUT9_CLR, 0x00},
> +	{LP5012_OUT10_CLR, 0x00},
> +	{LP5012_OUT11_CLR, 0x00},
> +	{LP5012_RESET, 0x00}
> +};
> +
> +static const struct reg_default lp5024_reg_defs[] = {
...
> +	{LP5024_OUT1_CLR, 0x00},
> +	{LP5024_OUT2_CLR, 0x00},
> +	{LP5024_OUT3_CLR, 0x00},
> +	{LP5024_OUT4_CLR, 0x00},
> +	{LP5024_OUT5_CLR, 0x00},
> +	{LP5024_OUT6_CLR, 0x00},
> +	{LP5024_OUT7_CLR, 0x00},
> +	{LP5024_OUT8_CLR, 0x00},
> +	{LP5024_OUT9_CLR, 0x00},
> +	{LP5024_OUT10_CLR, 0x00},
> +	{LP5024_OUT11_CLR, 0x00},
> +	{LP5024_OUT12_CLR, 0x00},
> +	{LP5024_OUT13_CLR, 0x00},
> +	{LP5024_OUT14_CLR, 0x00},
> +	{LP5024_OUT15_CLR, 0x00},
> +	{LP5024_OUT16_CLR, 0x00},
> +	{LP5024_OUT17_CLR, 0x00},
> +	{LP5024_OUT18_CLR, 0x00},
> +	{LP5024_OUT19_CLR, 0x00},
> +	{LP5024_OUT20_CLR, 0x00},
> +	{LP5024_OUT21_CLR, 0x00},
> +	{LP5024_OUT22_CLR, 0x00},
> +	{LP5024_OUT23_CLR, 0x00},
> +	{LP5024_RESET, 0x00}
> +};
> +
> +static const struct reg_default lp5036_reg_defs[] = {
> +	{LP5036_OUT1_CLR, 0x00},
> +	{LP5036_OUT2_CLR, 0x00},
> +	{LP5036_OUT3_CLR, 0x00},
> +	{LP5036_OUT4_CLR, 0x00},
> +	{LP5036_OUT5_CLR, 0x00},
> +	{LP5036_OUT6_CLR, 0x00},
> +	{LP5036_OUT7_CLR, 0x00},
> +	{LP5036_OUT8_CLR, 0x00},
> +	{LP5036_OUT9_CLR, 0x00},
> +	{LP5036_OUT10_CLR, 0x00},
> +	{LP5036_OUT11_CLR, 0x00},
> +	{LP5036_OUT12_CLR, 0x00},
> +	{LP5036_OUT13_CLR, 0x00},
> +	{LP5036_OUT14_CLR, 0x00},
> +	{LP5036_OUT15_CLR, 0x00},
> +	{LP5036_OUT16_CLR, 0x00},
> +	{LP5036_OUT17_CLR, 0x00},
> +	{LP5036_OUT18_CLR, 0x00},
> +	{LP5036_OUT19_CLR, 0x00},
> +	{LP5036_OUT20_CLR, 0x00},
> +	{LP5036_OUT21_CLR, 0x00},
> +	{LP5036_OUT22_CLR, 0x00},
> +	{LP5036_OUT23_CLR, 0x00},
> +	{LP5036_OUT24_CLR, 0x00},
> +	{LP5036_OUT25_CLR, 0x00},
> +	{LP5036_OUT26_CLR, 0x00},
> +	{LP5036_OUT27_CLR, 0x00},
> +	{LP5036_OUT28_CLR, 0x00},
> +	{LP5036_OUT29_CLR, 0x00},
> +	{LP5036_OUT30_CLR, 0x00},
> +	{LP5036_OUT31_CLR, 0x00},
> +	{LP5036_OUT32_CLR, 0x00},
> +	{LP5036_OUT33_CLR, 0x00},
> +	{LP5036_OUT34_CLR, 0x00},
> +	{LP5036_OUT35_CLR, 0x00},
> +	{LP5036_RESET, 0x00}
> +};

Actually... This is quite impressive ammount of code to
zero-initialize few registers. Could the regmap be told to set the
range to zero, or use loops to reduce ammount of code?

Thanks,
								Pavel
Dan Murphy Aug. 11, 2020, 5:27 p.m. UTC | #6
Hello

On 8/11/20 5:54 AM, Pavel Machek wrote:
> Hi!
>
>> +/* LP5009 and LP5012 registers */
>> +#define LP5012_BNK_BRT		0x03
>> +#define LP5012_BNKA_CLR		0x04
>> +#define LP5012_BNKB_CLR		0x05
>> +#define LP5012_BNKC_CLR		0x06
>> +#define LP5012_LED0_BRT		0x07
>> +#define LP5012_LED1_BRT		0x08
>> +#define LP5012_LED2_BRT		0x09
>> +#define LP5012_LED3_BRT		0x0a
>> +#define LP5012_OUT0_CLR		0x0b
>> +#define LP5012_OUT1_CLR		0x0c
>> +#define LP5012_OUT2_CLR		0x0d
>> +#define LP5012_OUT3_CLR		0x0e
>> +#define LP5012_OUT4_CLR		0x0f
>> +#define LP5012_OUT5_CLR		0x10
>> +#define LP5012_OUT6_CLR		0x11
>> +#define LP5012_OUT7_CLR		0x12
>> +#define LP5012_OUT8_CLR		0x13
>> +#define LP5012_OUT9_CLR		0x14
>> +#define LP5012_OUT10_CLR	0x15
>> +#define LP5012_OUT11_CLR	0x16
>> +#define LP5012_RESET		0x17
>> +
>> +/* LP5018 and LP5024 registers */
>> +#define LP5024_BNK_BRT		0x03
>> +#define LP5024_BNKA_CLR		0x04
>> +#define LP5024_BNKB_CLR		0x05
>> +#define LP5024_BNKC_CLR		0x06
>> +#define LP5024_LED0_BRT		0x07
>> +#define LP5024_LED1_BRT		0x08
>> +#define LP5024_LED2_BRT		0x09
>> +#define LP5024_LED3_BRT		0x0a
>> +#define LP5024_LED4_BRT		0x0b
>> +#define LP5024_LED5_BRT		0x0c
>> +#define LP5024_LED6_BRT		0x0d
>> +#define LP5024_LED7_BRT		0x0e
>> +
>> +#define LP5024_OUT0_CLR		0x0f
>> +#define LP5024_OUT1_CLR		0x10
>> +#define LP5024_OUT2_CLR		0x11
>> +#define LP5024_OUT3_CLR		0x12
>> +#define LP5024_OUT4_CLR		0x13
>> +#define LP5024_OUT5_CLR		0x14
>> +#define LP5024_OUT6_CLR		0x15
>> +#define LP5024_OUT7_CLR		0x16
>> +#define LP5024_OUT8_CLR		0x17
>> +#define LP5024_OUT9_CLR		0x18
>> +#define LP5024_OUT10_CLR	0x19
>> +#define LP5024_OUT11_CLR	0x1a
>> +#define LP5024_OUT12_CLR	0x1b
>> +#define LP5024_OUT13_CLR	0x1c
>> +#define LP5024_OUT14_CLR	0x1d
>> +#define LP5024_OUT15_CLR	0x1e
>> +#define LP5024_OUT16_CLR	0x1f
>> +#define LP5024_OUT17_CLR	0x20
>> +#define LP5024_OUT18_CLR	0x21
>> +#define LP5024_OUT19_CLR	0x22
>> +#define LP5024_OUT20_CLR	0x23
>> +#define LP5024_OUT21_CLR	0x24
>> +#define LP5024_OUT22_CLR	0x25
>> +#define LP5024_OUT23_CLR	0x26
>> +#define LP5024_RESET		0x27
>> +
>> +/* LP5030 and LP5036 registers */
>> +#define LP5036_LED_CFG1		0x03
>> +#define LP5036_BNK_BRT		0x04
>> +#define LP5036_BNKA_CLR		0x05
>> +#define LP5036_BNKB_CLR		0x06
>> +#define LP5036_BNKC_CLR		0x07
>> +#define LP5036_LED0_BRT		0x08
>> +#define LP5036_LED1_BRT		0x09
>> +#define LP5036_LED2_BRT		0x0a
>> +#define LP5036_LED3_BRT		0x0b
>> +#define LP5036_LED4_BRT		0x0c
>> +#define LP5036_LED5_BRT		0x0d
>> +#define LP5036_LED6_BRT		0x0e
>> +#define LP5036_LED7_BRT		0x0f
>> +#define LP5036_LED8_BRT		0x10
>> +#define LP5036_LED9_BRT		0x11
>> +#define LP5036_LED10_BRT	0x12
>> +#define LP5036_LED11_BRT	0x13
>> +
>> +#define LP5036_OUT0_CLR		0x14
>> +#define LP5036_OUT1_CLR		0x15
>> +#define LP5036_OUT2_CLR		0x16
>> +#define LP5036_OUT3_CLR		0x17
>> +#define LP5036_OUT4_CLR		0x18
>> +#define LP5036_OUT5_CLR		0x19
>> +#define LP5036_OUT6_CLR		0x1a
>> +#define LP5036_OUT7_CLR		0x1b
>> +#define LP5036_OUT8_CLR		0x1c
>> +#define LP5036_OUT9_CLR		0x1d
>> +#define LP5036_OUT10_CLR	0x1e
>> +#define LP5036_OUT11_CLR	0x1f
>> +#define LP5036_OUT12_CLR	0x20
>> +#define LP5036_OUT13_CLR	0x21
>> +#define LP5036_OUT14_CLR	0x22
>> +#define LP5036_OUT15_CLR	0x23
>> +#define LP5036_OUT16_CLR	0x24
>> +#define LP5036_OUT17_CLR	0x25
>> +#define LP5036_OUT18_CLR	0x26
>> +#define LP5036_OUT19_CLR	0x27
>> +#define LP5036_OUT20_CLR	0x28
>> +#define LP5036_OUT21_CLR	0x29
>> +#define LP5036_OUT22_CLR	0x2a
>> +#define LP5036_OUT23_CLR	0x2b
>> +#define LP5036_OUT24_CLR	0x2c
>> +#define LP5036_OUT25_CLR	0x2d
>> +#define LP5036_OUT26_CLR	0x2e
>> +#define LP5036_OUT27_CLR	0x2f
>> +#define LP5036_OUT28_CLR	0x30
>> +#define LP5036_OUT29_CLR	0x31
>> +#define LP5036_OUT30_CLR	0x32
>> +#define LP5036_OUT31_CLR	0x33
>> +#define LP5036_OUT32_CLR	0x34
>> +#define LP5036_OUT33_CLR	0x35
>> +#define LP5036_OUT34_CLR	0x36
>> +#define LP5036_OUT35_CLR	0x37
>> +#define LP5036_RESET		0x38
>> +static const struct reg_default lp5012_reg_defs[] = {
> ...
>> +	{LP5012_OUT1_CLR, 0x00},
>> +	{LP5012_OUT2_CLR, 0x00},
>> +	{LP5012_OUT3_CLR, 0x00},
>> +	{LP5012_OUT4_CLR, 0x00},
>> +	{LP5012_OUT5_CLR, 0x00},
>> +	{LP5012_OUT6_CLR, 0x00},
>> +	{LP5012_OUT7_CLR, 0x00},
>> +	{LP5012_OUT8_CLR, 0x00},
>> +	{LP5012_OUT9_CLR, 0x00},
>> +	{LP5012_OUT10_CLR, 0x00},
>> +	{LP5012_OUT11_CLR, 0x00},
>> +	{LP5012_RESET, 0x00}
>> +};
>> +
>> +static const struct reg_default lp5024_reg_defs[] = {
> ...
>> +	{LP5024_OUT1_CLR, 0x00},
>> +	{LP5024_OUT2_CLR, 0x00},
>> +	{LP5024_OUT3_CLR, 0x00},
>> +	{LP5024_OUT4_CLR, 0x00},
>> +	{LP5024_OUT5_CLR, 0x00},
>> +	{LP5024_OUT6_CLR, 0x00},
>> +	{LP5024_OUT7_CLR, 0x00},
>> +	{LP5024_OUT8_CLR, 0x00},
>> +	{LP5024_OUT9_CLR, 0x00},
>> +	{LP5024_OUT10_CLR, 0x00},
>> +	{LP5024_OUT11_CLR, 0x00},
>> +	{LP5024_OUT12_CLR, 0x00},
>> +	{LP5024_OUT13_CLR, 0x00},
>> +	{LP5024_OUT14_CLR, 0x00},
>> +	{LP5024_OUT15_CLR, 0x00},
>> +	{LP5024_OUT16_CLR, 0x00},
>> +	{LP5024_OUT17_CLR, 0x00},
>> +	{LP5024_OUT18_CLR, 0x00},
>> +	{LP5024_OUT19_CLR, 0x00},
>> +	{LP5024_OUT20_CLR, 0x00},
>> +	{LP5024_OUT21_CLR, 0x00},
>> +	{LP5024_OUT22_CLR, 0x00},
>> +	{LP5024_OUT23_CLR, 0x00},
>> +	{LP5024_RESET, 0x00}
>> +};
>> +
>> +static const struct reg_default lp5036_reg_defs[] = {
>> +	{LP5036_OUT1_CLR, 0x00},
>> +	{LP5036_OUT2_CLR, 0x00},
>> +	{LP5036_OUT3_CLR, 0x00},
>> +	{LP5036_OUT4_CLR, 0x00},
>> +	{LP5036_OUT5_CLR, 0x00},
>> +	{LP5036_OUT6_CLR, 0x00},
>> +	{LP5036_OUT7_CLR, 0x00},
>> +	{LP5036_OUT8_CLR, 0x00},
>> +	{LP5036_OUT9_CLR, 0x00},
>> +	{LP5036_OUT10_CLR, 0x00},
>> +	{LP5036_OUT11_CLR, 0x00},
>> +	{LP5036_OUT12_CLR, 0x00},
>> +	{LP5036_OUT13_CLR, 0x00},
>> +	{LP5036_OUT14_CLR, 0x00},
>> +	{LP5036_OUT15_CLR, 0x00},
>> +	{LP5036_OUT16_CLR, 0x00},
>> +	{LP5036_OUT17_CLR, 0x00},
>> +	{LP5036_OUT18_CLR, 0x00},
>> +	{LP5036_OUT19_CLR, 0x00},
>> +	{LP5036_OUT20_CLR, 0x00},
>> +	{LP5036_OUT21_CLR, 0x00},
>> +	{LP5036_OUT22_CLR, 0x00},
>> +	{LP5036_OUT23_CLR, 0x00},
>> +	{LP5036_OUT24_CLR, 0x00},
>> +	{LP5036_OUT25_CLR, 0x00},
>> +	{LP5036_OUT26_CLR, 0x00},
>> +	{LP5036_OUT27_CLR, 0x00},
>> +	{LP5036_OUT28_CLR, 0x00},
>> +	{LP5036_OUT29_CLR, 0x00},
>> +	{LP5036_OUT30_CLR, 0x00},
>> +	{LP5036_OUT31_CLR, 0x00},
>> +	{LP5036_OUT32_CLR, 0x00},
>> +	{LP5036_OUT33_CLR, 0x00},
>> +	{LP5036_OUT34_CLR, 0x00},
>> +	{LP5036_OUT35_CLR, 0x00},
>> +	{LP5036_RESET, 0x00}
>> +};
> Actually... This is quite impressive ammount of code to
> zero-initialize few registers. Could the regmap be told to set the
> range to zero, or use loops to reduce ammount of code?

I am not aware of any regmap calls that will set a range of registers to 
a certain value.

Well it depends on where we want to create the default cache values.

Either we run through a for..loop during driver probe and delay device 
start up or we keep the simple arrays and increase the driver total size.

I am not seeing an advantage or disadvantage of one over the other.  
This is a simpler and more clear way to init the registers versus a loop.

Dan

> Thanks,
> 								Pavel
>
>
Pavel Machek Aug. 11, 2020, 10:01 p.m. UTC | #7
Hi!

> >Actually... This is quite impressive ammount of code to
> >zero-initialize few registers. Could the regmap be told to set the
> >range to zero, or use loops to reduce ammount of code?
> 
> I am not aware of any regmap calls that will set a range of registers to a
> certain value.
> 
> Well it depends on where we want to create the default cache values.
> 
> Either we run through a for..loop during driver probe and delay device start
> up or we keep the simple arrays and increase the driver total size.

for loop will be better.

Plus, REGCACHE_RBTREE is very likely overkill.

Best regards,

									Pavel
Dan Murphy Aug. 11, 2020, 10:16 p.m. UTC | #8
Pavel

On 8/11/20 5:01 PM, Pavel Machek wrote:
> Hi!
>
>>> Actually... This is quite impressive ammount of code to
>>> zero-initialize few registers. Could the regmap be told to set the
>>> range to zero, or use loops to reduce ammount of code?
>> I am not aware of any regmap calls that will set a range of registers to a
>> certain value.
>>
>> Well it depends on where we want to create the default cache values.
>>
>> Either we run through a for..loop during driver probe and delay device start
>> up or we keep the simple arrays and increase the driver total size.
> for loop will be better.
>
> Plus, REGCACHE_RBTREE is very likely overkill.

Well if I eliminate the reg_cache then I can eliminate the defaults too.

Dan

> Best regards,
>
> 									Pavel
Pavel Machek Aug. 11, 2020, 10:26 p.m. UTC | #9
Hi!

> >>Well it depends on where we want to create the default cache values.
> >>
> >>Either we run through a for..loop during driver probe and delay device start
> >>up or we keep the simple arrays and increase the driver total size.
> >for loop will be better.
> >
> >Plus, REGCACHE_RBTREE is very likely overkill.
> 
> Well if I eliminate the reg_cache then I can eliminate the defaults too.

I'm not asking for that. But please investigate REGCACHE_FLAT.

									Pavel
Dan Murphy Aug. 12, 2020, 4 p.m. UTC | #10
Pavel

On 8/11/20 5:26 PM, Pavel Machek wrote:
> Hi!
>
>>>> Well it depends on where we want to create the default cache values.
>>>>
>>>> Either we run through a for..loop during driver probe and delay device start
>>>> up or we keep the simple arrays and increase the driver total size.
>>> for loop will be better.
>>>
>>> Plus, REGCACHE_RBTREE is very likely overkill.
>> Well if I eliminate the reg_cache then I can eliminate the defaults too.
> I'm not asking for that. But please investigate REGCACHE_FLAT.
>
> 									Pavel

After looking at this a loop makes no sense here.  The regmap call back 
values are determined at build time not during runtime.

Adding a loop here makes the code more complex just to reduce the 
overall LoC.  In adding the loop the reg_default array will have to be 
re-allocated and copied at run time and then be expanded to include the 
additional values.

And the regmap defaults call backs will need to be updated to reflect 
the new values.  And these are part of a const struct because the 
devm_regmap_init declares the config as a const.

     .reg_defaults = lp5012_reg_defs,
     .num_reg_defaults = ARRAY_SIZE(lp5012_reg_defs),

So I am not sure that adding a loop here just to eliminate some LoC is 
adding any value here.  I can remove the #defines for the unused runtime 
registers and hard code the additional register addresses in the default 
array.  That will at least eliminate some LoC and reduce the object size.

I have no issue with using the REGCACHE_FLAT so I will make that change.

Dan