| Message ID | 20200430185522.4116-2-james.quinlan@broadcom.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/5] PCI: brcmstb: don't clk_put() a managed clock | expand |
On 4/30/20 11:55 AM, Jim Quinlan wrote: > From: Jim Quinlan <jquinlan@broadcom.com> > > The oubound memory window registers were being referenced > with an incorrect offset. This probably wasn't noticed > previously as there was likely only one such outbound window. > > Signed-off-by: Jim Quinlan <jquinlan@broadcom.com> Fixes: c0452137034b ("PCI: brcmstb: Add Broadcom STB PCIe host controller driver") Acked-by: Florian Fainelli <f.fainelli@gmail.com>
On Thu, Apr 30, 2020 at 02:55:19PM -0400, Jim Quinlan wrote: > From: Jim Quinlan <jquinlan@broadcom.com> > > The oubound memory window registers were being referenced > with an incorrect offset. This probably wasn't noticed > previously as there was likely only one such outbound window. If you repost these for any other reason: Capitalize the first word of all the subject lines to match history. s/oubound/outbound/ > Signed-off-by: Jim Quinlan <jquinlan@broadcom.com> > --- > drivers/pci/controller/pcie-brcmstb.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c > index 454917ee9241..5b0dec5971b8 100644 > --- a/drivers/pci/controller/pcie-brcmstb.c > +++ b/drivers/pci/controller/pcie-brcmstb.c > @@ -54,11 +54,11 @@ > > #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c > #define PCIE_MEM_WIN0_LO(win) \ > - PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4) > + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 8) > > #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 > #define PCIE_MEM_WIN0_HI(win) \ > - PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4) > + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 8) > > #define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c > #define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f > -- > 2.17.1 >
diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 454917ee9241..5b0dec5971b8 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -54,11 +54,11 @@ #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c #define PCIE_MEM_WIN0_LO(win) \ - PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4) + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 8) #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 #define PCIE_MEM_WIN0_HI(win) \ - PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4) + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 8) #define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c #define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f