| Message ID | 20200414181012.114905-3-robert.marko@sartura.hr |
|---|---|
| State | Changes Requested |
| Delegated to: | David Miller |
| Headers | show |
| Series | [v2,1/3] net: phy: mdio: add IPQ40xx MDIO driver | expand |
On 4/14/2020 11:10 AM, Robert Marko wrote: > This patch adds the necessary MDIO interface node > to the Qualcomm IPQ4019 DTSI. > > Built-in QCA8337N switch is managed using it, > and since we have a driver for it lets add it. > > Signed-off-by: Christian Lamparter <chunkeey@gmail.com> > Signed-off-by: Robert Marko <robert.marko@sartura.hr> > Cc: Luka Perkov <luka.perkov@sartura.hr> > --- > arch/arm/boot/dts/qcom-ipq4019.dtsi | 28 ++++++++++++++++++++++++++++ > 1 file changed, 28 insertions(+) Earlier contributions to that file seem to suggest that the preferred subject is: ARM: dts: qcom: <subject>
On Tue, Apr 14, 2020 at 11:13 PM Florian Fainelli <f.fainelli@gmail.com> wrote: > > > > On 4/14/2020 11:10 AM, Robert Marko wrote: > > This patch adds the necessary MDIO interface node > > to the Qualcomm IPQ4019 DTSI. > > > > Built-in QCA8337N switch is managed using it, > > and since we have a driver for it lets add it. > > > > Signed-off-by: Christian Lamparter <chunkeey@gmail.com> > > Signed-off-by: Robert Marko <robert.marko@sartura.hr> > > Cc: Luka Perkov <luka.perkov@sartura.hr> > > --- > > arch/arm/boot/dts/qcom-ipq4019.dtsi | 28 ++++++++++++++++++++++++++++ > > 1 file changed, 28 insertions(+) > > Earlier contributions to that file seem to suggest that the preferred > subject is: > > ARM: dts: qcom: <subject> Will be changed in v3. Thanks > -- > Florian
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index b4803a428340..80d0a69e9fed 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -578,6 +578,34 @@ wifi1: wifi@a800000 { status = "disabled"; }; + mdio: mdio@90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,ipq40xx-mdio"; + reg = <0x90000 0x64>; + status = "disabled"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + + ethphy2: ethernet-phy@2 { + reg = <2>; + }; + + ethphy3: ethernet-phy@3 { + reg = <3>; + }; + + ethphy4: ethernet-phy@4 { + reg = <4>; + }; + }; + usb3_ss_phy: ssphy@9a000 { compatible = "qcom,usb-ss-ipq4019-phy"; #phy-cells = <0>;