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[PATCHv2,1/4] dt-bindings: watchdog: Add support for TI K3 RTI watchdog

Message ID 20200302200426.6492-2-t-kristo@ti.com
State Changes Requested, archived
Headers show
Series [PATCHv2,1/4] dt-bindings: watchdog: Add support for TI K3 RTI watchdog | expand

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robh/dt-meta-schema success

Commit Message

Tero Kristo March 2, 2020, 8:04 p.m. UTC
TI K3 SoCs contain an RTI (Real Time Interrupt) module which can be
used to implement a windowed watchdog functionality. Windowed watchdog
will generate an error if it is petted outside the time window, either
too early or too late.

Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 .../bindings/watchdog/ti,rti-wdt.yaml         | 52 +++++++++++++++++++
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml

Comments

Rob Herring March 10, 2020, 7:37 p.m. UTC | #1
On Mon, Mar 02, 2020 at 10:04:23PM +0200, Tero Kristo wrote:
> TI K3 SoCs contain an RTI (Real Time Interrupt) module which can be
> used to implement a windowed watchdog functionality. Windowed watchdog
> will generate an error if it is petted outside the time window, either
> too early or too late.
> 
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
>  .../bindings/watchdog/ti,rti-wdt.yaml         | 52 +++++++++++++++++++
>  1 file changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
> new file mode 100644
> index 000000000000..3813f59fb6c3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license new bindings please:

(GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments K3 SoC Watchdog Timer
> +
> +maintainers:
> +  - Tero Kristo <t-kristo@ti.com>
> +
> +description: |+

You can drop '|+' as there's no formatting to preserve.

> +  The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
> +  Interrupt) IP module. This timer adds a support for windowed watchdog
> +  mode, which will signal an error if it is pinged outside the watchdog
> +  time window, meaning either too early or too late. The error signal
> +  generated can be routed to either interrupt a safety controller or
> +  to directly reset the SoC.
> +

Reference the common watchdog.yaml schema.

> +properties:
> +  compatible:
> +    enum:
> +      - ti,rti-wdt

Should be SoC specific possibly with a fallback.

> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +
> +examples:
> +  - |
> +    /*
> +     * RTI WDT in main domain on J721e SoC. Assigned clocks are used to
> +     * select the source clock for the watchdog, forcing it to tick with
> +     * a 32kHz clock in this case.
> +     */
> +    #include <dt-bindings/soc/ti,sci_pm_domain.h>
> +
> +    main_rti0: rti@2200000 {

watchdog@...

> +        compatible = "ti,rti-wdt";
> +        reg = <0x0 0x2200000 0x0 0x100>;
> +        clocks = <&k3_clks 252 1>;
> +        power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;

Not documented.

> +        assigned-clocks = <&k3_clks 252 1>;
> +        assigned-clock-parents = <&k3_clks 252 5>;

Not documented.

> +    };
> -- 
> 2.17.1
> 
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Tero Kristo March 11, 2020, 7:48 a.m. UTC | #2
On 10/03/2020 21:37, Rob Herring wrote:
> On Mon, Mar 02, 2020 at 10:04:23PM +0200, Tero Kristo wrote:
>> TI K3 SoCs contain an RTI (Real Time Interrupt) module which can be
>> used to implement a windowed watchdog functionality. Windowed watchdog
>> will generate an error if it is petted outside the time window, either
>> too early or too late.
>>
>> Cc: Rob Herring <robh@kernel.org>
>> Cc: devicetree@vger.kernel.org
>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>> ---
>>   .../bindings/watchdog/ti,rti-wdt.yaml         | 52 +++++++++++++++++++
>>   1 file changed, 52 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
>> new file mode 100644
>> index 000000000000..3813f59fb6c3
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
>> @@ -0,0 +1,52 @@
>> +# SPDX-License-Identifier: GPL-2.0
> 
> Dual license new bindings please:
> 
> (GPL-2.0-only OR BSD-2-Clause)

Ok, will fix this.

> 
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Texas Instruments K3 SoC Watchdog Timer
>> +
>> +maintainers:
>> +  - Tero Kristo <t-kristo@ti.com>
>> +
>> +description: |+
> 
> You can drop '|+' as there's no formatting to preserve.

Ok.

> 
>> +  The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
>> +  Interrupt) IP module. This timer adds a support for windowed watchdog
>> +  mode, which will signal an error if it is pinged outside the watchdog
>> +  time window, meaning either too early or too late. The error signal
>> +  generated can be routed to either interrupt a safety controller or
>> +  to directly reset the SoC.
>> +
> 
> Reference the common watchdog.yaml schema.

I believe you mean just adding:

allOf:
   - $ref: "watchdog.yaml#"


> 
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - ti,rti-wdt
> 
> Should be SoC specific possibly with a fallback.

Ok, will change this.

> 
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - clocks
>> +
>> +examples:
>> +  - |
>> +    /*
>> +     * RTI WDT in main domain on J721e SoC. Assigned clocks are used to
>> +     * select the source clock for the watchdog, forcing it to tick with
>> +     * a 32kHz clock in this case.
>> +     */
>> +    #include <dt-bindings/soc/ti,sci_pm_domain.h>
>> +
>> +    main_rti0: rti@2200000 {
> 
> watchdog@...

Right.

> 
>> +        compatible = "ti,rti-wdt";
>> +        reg = <0x0 0x2200000 0x0 0x100>;
>> +        clocks = <&k3_clks 252 1>;
>> +        power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
> 
> Not documented.

For this and assigned-clocks below...

> 
>> +        assigned-clocks = <&k3_clks 252 1>;
>> +        assigned-clock-parents = <&k3_clks 252 5>;
> 
> Not documented.

Ok will fix these, I was grepping for examples under the yaml files and 
some seem to document these standard props, some not. But, I guess 
everything listed in the examples should be documented.

Sorry all this yaml stuff is still pretty new to me. >.<

-Tero

> 
>> +    };
>> -- 
>> 2.17.1
>>
>> --

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
new file mode 100644
index 000000000000..3813f59fb6c3
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
@@ -0,0 +1,52 @@ 
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 SoC Watchdog Timer
+
+maintainers:
+  - Tero Kristo <t-kristo@ti.com>
+
+description: |+
+  The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
+  Interrupt) IP module. This timer adds a support for windowed watchdog
+  mode, which will signal an error if it is pinged outside the watchdog
+  time window, meaning either too early or too late. The error signal
+  generated can be routed to either interrupt a safety controller or
+  to directly reset the SoC.
+
+properties:
+  compatible:
+    enum:
+      - ti,rti-wdt
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+
+examples:
+  - |
+    /*
+     * RTI WDT in main domain on J721e SoC. Assigned clocks are used to
+     * select the source clock for the watchdog, forcing it to tick with
+     * a 32kHz clock in this case.
+     */
+    #include <dt-bindings/soc/ti,sci_pm_domain.h>
+
+    main_rti0: rti@2200000 {
+        compatible = "ti,rti-wdt";
+        reg = <0x0 0x2200000 0x0 0x100>;
+        clocks = <&k3_clks 252 1>;
+        power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
+        assigned-clocks = <&k3_clks 252 1>;
+        assigned-clock-parents = <&k3_clks 252 5>;
+    };