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[resend,0/2] spi: add driver for ar934x spi controller

Message ID 20200206084443.209719-1-gch981213@gmail.com
Headers show
Series spi: add driver for ar934x spi controller | expand

Message

Chuanhong Guo Feb. 6, 2020, 8:44 a.m. UTC
This controller is a superset of the already supported qca,ar7100-spi.
Besides the bit-bang mode in spi-ath79.c, this new controller added
a new "shift register" mode, allowing faster spi operations.
This mode doesn't need all the bit-bang code in spi-ath79.c and needs
a different clock setup, so I decided to write a new driver for it
instead of extending current spi-ath79 driver.

Resend the patchset because I forgot to CC documentation maintainers
Chuanhong Guo (2):
  spi: add driver for ar934x spi controller
  dt-binding: spi: add bindings for spi-ar934x

 .../bindings/spi/qca,ar934x-spi.yaml          |  40 +++
 drivers/spi/Kconfig                           |   7 +
 drivers/spi/Makefile                          |   1 +
 drivers/spi/spi-ar934x.c                      | 230 ++++++++++++++++++
 4 files changed, 278 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml
 create mode 100644 drivers/spi/spi-ar934x.c

Comments

Mark Brown Feb. 6, 2020, 11:31 a.m. UTC | #1
On Thu, Feb 06, 2020 at 04:44:42PM +0800, Chuanhong Guo wrote:

This looks good, just a couple of comments below:

> --- /dev/null
> +++ b/drivers/spi/spi-ar934x.c
> @@ -0,0 +1,230 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs

Please make the entire comment block a C++ one so things look
more intentional.

> +static int ar934x_spi_transfer_one(struct spi_controller *master,
> +				   struct spi_message *m)
> +{
> +	struct ar934x_spi *sp = spi_controller_get_devdata(master);
> +	struct spi_transfer *t = NULL;

...

> +
> +	m->actual_length = 0;
> +	list_for_each_entry(t, &m->transfers, transfer_list) {

It looks like this could just be a transfer_one() operation
instead of transfer_one_message() (which is what this is in spite
of the name)?  There's nothing custom outside this loop that I
can see.
Chuanhong Guo Feb. 6, 2020, 12:30 p.m. UTC | #2
On Thu, Feb 6, 2020 at 7:31 PM Mark Brown <broonie@kernel.org> wrote:
>
> On Thu, Feb 06, 2020 at 04:44:42PM +0800, Chuanhong Guo wrote:
>
> This looks good, just a couple of comments below:
>
> > --- /dev/null
> > +++ b/drivers/spi/spi-ar934x.c
> > @@ -0,0 +1,230 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs
>
> Please make the entire comment block a C++ one so things look
> more intentional.

Got it. I'll do this in v2.

>
> > +static int ar934x_spi_transfer_one(struct spi_controller *master,
> > +                                struct spi_message *m)
> > +{
> > +     struct ar934x_spi *sp = spi_controller_get_devdata(master);
> > +     struct spi_transfer *t = NULL;
>
> ...
>
> > +
> > +     m->actual_length = 0;
> > +     list_for_each_entry(t, &m->transfers, transfer_list) {
>
> It looks like this could just be a transfer_one() operation
> instead of transfer_one_message() (which is what this is in spite
> of the name)?  There's nothing custom outside this loop that I
> can see.

Chipselect is also handled during transfer. Controller asserts
corresponding chipselect in SHIFT_CTRL register, and if SHIFT_TERM bit
is set, controller will deassert chipselect after current transfer is
done. I need to know whether this is the last transfer and set
SHIFT_TERM accordingly.

Regards,
Chuanhong Guo
Chuanhong Guo Feb. 6, 2020, 12:33 p.m. UTC | #3
On Thu, Feb 6, 2020 at 8:30 PM Chuanhong Guo <gch981213@gmail.com> wrote:
> > It looks like this could just be a transfer_one() operation
> > instead of transfer_one_message() (which is what this is in spite
> > of the name)?  There's nothing custom outside this loop that I
> > can see.
>
> Chipselect is also handled during transfer. Controller asserts
> corresponding chipselect in SHIFT_CTRL register, and if SHIFT_TERM bit
> is set, controller will deassert chipselect after current transfer is
> done. I need to know whether this is the last transfer and set
> SHIFT_TERM accordingly.

Oh, I remembered that I saw transfer_one function name somewhere and
thought maybe I could shorten the function name a bit. I'll correct
this back to ar934x_spi_transfer_one_message in v2.

Regards,
Chuanhong Guo
Mark Brown Feb. 6, 2020, 1:54 p.m. UTC | #4
On Thu, Feb 06, 2020 at 08:33:33PM +0800, Chuanhong Guo wrote:
> On Thu, Feb 6, 2020 at 8:30 PM Chuanhong Guo <gch981213@gmail.com> wrote:

> > Chipselect is also handled during transfer. Controller asserts
> > corresponding chipselect in SHIFT_CTRL register, and if SHIFT_TERM bit
> > is set, controller will deassert chipselect after current transfer is
> > done. I need to know whether this is the last transfer and set
> > SHIFT_TERM accordingly.

> Oh, I remembered that I saw transfer_one function name somewhere and
> thought maybe I could shorten the function name a bit. I'll correct
> this back to ar934x_spi_transfer_one_message in v2.

OK, sounds good - I see the chip select handling now.