[v2,1/2] dt-bindings: net: dp83869: Add TI dp83869 phy

Add dt bindings for the TI dp83869 Gigabit ethernet phy
device.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
CC: Rob Herring <robh+dt@kernel.org>
---

v2 - No changes 

 .../devicetree/bindings/net/ti,dp83869.yaml   | 84 +++++++++++++++++++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/ti,dp83869.yaml

On Thu, Nov 07, 2019 at 11:40:01AM -0600, Dan Murphy wrote:
> Add dt bindings for the TI dp83869 Gigabit ethernet phy
> device.
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> CC: Rob Herring <robh+dt@kernel.org>
> ---
> 
> v2 - No changes 
> 
>  .../devicetree/bindings/net/ti,dp83869.yaml   | 84 +++++++++++++++++++
>  1 file changed, 84 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/ti,dp83869.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/ti,dp83869.yaml b/Documentation/devicetree/bindings/net/ti,dp83869.yaml
> new file mode 100644
> index 000000000000..6fe3e451da8a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/ti,dp83869.yaml
> @@ -0,0 +1,84 @@
> +# SPDX-License-Identifier: GPL-2.0
> +# Copyright (C) 2019 Texas Instruments Incorporated
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/net/ti,dp83869.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: TI DP83869 ethernet PHY
> +
> +allOf:
> +  - $ref: "ethernet-controller.yaml#"
> +
> +maintainers:
> +  - Dan Murphy <dmurphy@ti.com>
> +
> +description: |
> +  The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
> +  with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
> +  1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
> +  100BASE-FX Fiber protocols.
> +  This device interfaces to the MAC layer through Reduced GMII (RGMII) and
> +  SGMII The DP83869HM supports Media Conversion in Managed mode. In this mode,
> +  the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
> +  conversions.  The DP83869HM can also support Bridge Conversion from RGMII to
> +  SGMII and SGMII to RGMII.
> +
> +  Specifications about the charger can be found at:
> +    http://www.ti.com/lit/ds/symlink/dp83869hm.pdf
> +
> +properties:
> +  reg:
> +    maxItems: 1
> +
> +  ti,min-output-impedance:
> +    type: boolean
> +    description: |
> +       MAC Interface Impedance control to set the programmable output impedance
> +       to a minimum value (35 ohms).
> +
> +  ti,max-output-impedance:
> +    type: boolean
> +    description: |
> +       MAC Interface Impedance control to set the programmable output impedance
> +       to a maximum value (70 ohms).
> +
> +  tx-fifo-depth:
> +    $ref: /schemas/types.yaml#definitions/uint32
> +    description: |
> +       Transmitt FIFO depth see dt-bindings/net/ti-dp83869.h for values
> +
> +  rx-fifo-depth:
> +    $ref: /schemas/types.yaml#definitions/uint32
> +    description: |
> +       Receive FIFO depth see dt-bindings/net/ti-dp83869.h for values
> +
> +  ti,clk-output-sel:
> +    $ref: /schemas/types.yaml#definitions/uint32
> +    description: |
> +       Muxing option for CLK_OUT pin see dt-bindings/net/ti-dp83869.h for values.
> +
> +  ti,op-mode:
> +    $ref: /schemas/types.yaml#definitions/uint32
> +    description: |
> +       Operational mode for the PHY.  If this is not set then the operational
> +       mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values
> +
> +required:
> +  - reg
> +
> +examples:
> +  - |
> +    #include <dt-bindings/net/ti-dp83869.h>

The header above does not exist until patch 2 is applied.
Which means that make dtbs_check fails.

Perhaps adding the header could be moved into this patch?

> +    mdio0 {
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +      ethphy0: ethernet-phy@0 {
> +        reg = <0>;
> +        tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
> +        rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
> +        ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>;
> +        ti,max-output-impedance = "true";
> +        ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
> +      };
> +    };
> -- 
> 2.22.0.214.g8dca754b1e
>