Message ID | 20191022210717.23949-1-tjaalton@ubuntu.com |
---|---|
State | New |
Headers | show |
Series | [SRU,E] x86/cpu: Add Comet Lake to the Intel CPU models header | expand |
Clean cherry-pick, change limited to specific processor.
Acked-by: Po-Hsu Lin <po-hsu.lin@canonical.com>
On 10/22/19 2:07 PM, Timo Aaltonen wrote: > From: Kan Liang <kan.liang@linux.intel.com> > > BugLink: http://bugs.launchpad.net/bugs/1843794 > > Comet Lake is the new 10th Gen Intel processor. Add two new CPU model > numbers to the Intel family list. > > The CPU model numbers are not published in the SDM yet but they come > from an authoritative internal source. > > [ bp: Touch up commit message. ] > > Signed-off-by: Kan Liang <kan.liang@linux.intel.com> > Signed-off-by: Borislav Petkov <bp@suse.de> > Reviewed-by: Tony Luck <tony.luck@intel.com> > Cc: ak@linux.intel.com > Cc: "H. Peter Anvin" <hpa@zytor.com> > Cc: Ingo Molnar <mingo@kernel.org> > Cc: Peter Zijlstra <peterz@infradead.org> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: x86-ml <x86@kernel.org> > Link: https://lkml.kernel.org/r/1570549810-25049-2-git-send-email-kan.liang@linux.intel.com > (cherry picked from commit 8d7c6ac3b2371eb1cbc9925a88f4d10efff374de) > Signed-off-by: Timo Aaltonen <timo.aaltonen@canonical.com> Acked-by: Connor Kuehl <connor.kuehl@canonical.com> > --- > arch/x86/include/asm/intel-family.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h > index 9ae1c0f05fd2..3525014c71da 100644 > --- a/arch/x86/include/asm/intel-family.h > +++ b/arch/x86/include/asm/intel-family.h > @@ -76,6 +76,9 @@ > #define INTEL_FAM6_TIGERLAKE_L 0x8C > #define INTEL_FAM6_TIGERLAKE 0x8D > > +#define INTEL_FAM6_COMETLAKE 0xA5 > +#define INTEL_FAM6_COMETLAKE_L 0xA6 > + > /* "Small Core" Processors (Atom) */ > > #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ >
On 2019-10-23 00:07:17 , Timo Aaltonen wrote: > From: Kan Liang <kan.liang@linux.intel.com> > > BugLink: http://bugs.launchpad.net/bugs/1843794 > > Comet Lake is the new 10th Gen Intel processor. Add two new CPU model > numbers to the Intel family list. > > The CPU model numbers are not published in the SDM yet but they come > from an authoritative internal source. > > [ bp: Touch up commit message. ] > > Signed-off-by: Kan Liang <kan.liang@linux.intel.com> > Signed-off-by: Borislav Petkov <bp@suse.de> > Reviewed-by: Tony Luck <tony.luck@intel.com> > Cc: ak@linux.intel.com > Cc: "H. Peter Anvin" <hpa@zytor.com> > Cc: Ingo Molnar <mingo@kernel.org> > Cc: Peter Zijlstra <peterz@infradead.org> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: x86-ml <x86@kernel.org> > Link: https://lkml.kernel.org/r/1570549810-25049-2-git-send-email-kan.liang@linux.intel.com > (cherry picked from commit 8d7c6ac3b2371eb1cbc9925a88f4d10efff374de) > Signed-off-by: Timo Aaltonen <timo.aaltonen@canonical.com> > --- > arch/x86/include/asm/intel-family.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h > index 9ae1c0f05fd2..3525014c71da 100644 > --- a/arch/x86/include/asm/intel-family.h > +++ b/arch/x86/include/asm/intel-family.h > @@ -76,6 +76,9 @@ > #define INTEL_FAM6_TIGERLAKE_L 0x8C > #define INTEL_FAM6_TIGERLAKE 0x8D > > +#define INTEL_FAM6_COMETLAKE 0xA5 > +#define INTEL_FAM6_COMETLAKE_L 0xA6 > + > /* "Small Core" Processors (Atom) */ > > #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ > -- > 2.20.1 > > > -- > kernel-team mailing list > kernel-team@lists.ubuntu.com > https://lists.ubuntu.com/mailman/listinfo/kernel-team
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index 9ae1c0f05fd2..3525014c71da 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -76,6 +76,9 @@ #define INTEL_FAM6_TIGERLAKE_L 0x8C #define INTEL_FAM6_TIGERLAKE 0x8D +#define INTEL_FAM6_COMETLAKE 0xA5 +#define INTEL_FAM6_COMETLAKE_L 0xA6 + /* "Small Core" Processors (Atom) */ #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */