net: dsa: microchip: Always set regmap stride to 1

The regmap stride is set to 1 for regmap describing 8bit registers already.
However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
is not correct, as the switch protocol supports unaligned register reads
and writes and the KSZ87xx even uses such unaligned register accesses to
read e.g. MIB counter.

This patch fixes MIB counter access on KSZ87xx.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Tristram Ha <Tristram.Ha@microchip.com>
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: Woojung Huh <woojung.huh@microchip.com>
---
 drivers/net/dsa/microchip/ksz_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

On 9/21/2019 10:53 AM, Marek Vasut wrote:
> The regmap stride is set to 1 for regmap describing 8bit registers already.
> However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
> is not correct, as the switch protocol supports unaligned register reads
> and writes and the KSZ87xx even uses such unaligned register accesses to
> read e.g. MIB counter.
> 
> This patch fixes MIB counter access on KSZ87xx.

Should that be having the following Fixes tag(s):

Fixes: 46558d601cb6 ("net: dsa: microchip: Initial SPI regmap support")

and where relevant:

Fixes: 255b59ad0db2 ("net: dsa: microchip: Factor out regmap config
generation into common header")


> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: George McCollister <george.mccollister@gmail.com>
> Cc: Tristram Ha <Tristram.Ha@microchip.com>
> Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
> Cc: Woojung Huh <woojung.huh@microchip.com>
> ---
>  drivers/net/dsa/microchip/ksz_common.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h
> index a24d8e61fbe7..dd60d0837fc6 100644
> --- a/drivers/net/dsa/microchip/ksz_common.h
> +++ b/drivers/net/dsa/microchip/ksz_common.h
> @@ -303,7 +303,7 @@ static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
>  	{								\
>  		.name = #width,						\
>  		.val_bits = (width),					\
> -		.reg_stride = (width) / 8,				\
> +		.reg_stride = 1,					\
>  		.reg_bits = (regbits) + (regalign),			\
>  		.pad_bits = (regpad),					\
>  		.max_register = BIT(regbits) - 1,			\
>

From: Marek Vasut <marex@denx.de>
Date: Sat, 21 Sep 2019 19:53:09 +0200

> The regmap stride is set to 1 for regmap describing 8bit registers already.
> However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
> is not correct, as the switch protocol supports unaligned register reads
> and writes and the KSZ87xx even uses such unaligned register accesses to
> read e.g. MIB counter.
> 
> This patch fixes MIB counter access on KSZ87xx.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Please resubmit with an appropriate Fixes: tag as per Florian's feedback.

Thank you.

On 9/25/19 1:44 PM, David Miller wrote:
> From: Marek Vasut <marex@denx.de>
> Date: Sat, 21 Sep 2019 19:53:09 +0200
> 
>> The regmap stride is set to 1 for regmap describing 8bit registers already.
>> However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
>> is not correct, as the switch protocol supports unaligned register reads
>> and writes and the KSZ87xx even uses such unaligned register accesses to
>> read e.g. MIB counter.
>>
>> This patch fixes MIB counter access on KSZ87xx.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
> 
> Please resubmit with an appropriate Fixes: tag as per Florian's feedback.

Done