mbox series

[v7,0/7] Unify CPU topology across ARM & RISC-V

Message ID 20190617185920.29581-1-atish.patra@wdc.com
Headers show
Series Unify CPU topology across ARM & RISC-V | expand

Message

Atish Patra June 17, 2019, 6:59 p.m. UTC
The cpu-map DT entry in ARM can describe the CPU topology in much better
way compared to other existing approaches. RISC-V can easily adopt this
binding to represent its own CPU topology. Thus, both cpu-map DT
binding and topology parsing code can be moved to a common location so
that RISC-V or any other architecture can leverage that.

The relevant discussion regarding unifying cpu topology can be found in
[1].

arch_topology seems to be a perfect place to move the common code. I
have not introduced any significant functional changes in the moved code.
The only downside in this approach is that the capacity code will be
executed for RISC-V as well. But, it will exit immediately after not
able to find the appropriate DT node. If the overhead is considered too
much, we can always compile out capacity related functions under a
different config for the architectures that do not support them.

There was an opportunity to unify topology data structure for ARM32 done
by patch 3/4. But, I refrained from making any other changes as I am not
very well versed with original intention for some functions that
are present in arch_topology.c. I hope this patch series can be served
as a baseline for such changes in the future.

The patches have been tested for RISC-V and compile tested for ARM64,
ARM32 & x86.

From Jeremy,

"I applied these to 5.2rc2, along with my PPTT/MT change and verified the 
system & scheduler topology/etc on DAWN and ThunderX2 using ACPI on arm64.
They appear to be working correctly.

so for the series,
Tested-by: Jeremy Linton <jeremy.linton@arm.com>"

The socket change[2] is also now part of this series.

[1] https://lkml.org/lkml/2018/11/6/19
[2] https://lkml.org/lkml/2018/11/7/918

QEMU changes for RISC-V topology are available at

https://github.com/atishp04/qemu/tree/riscv_topology_dt

HiFive Unleashed DT with topology node is available here.
https://github.com/atishp04/opensbi/tree/HiFive_unleashed_topology

It can be verified with OpenSBI with following additional compile time
option.

FW_PAYLOAD_FDT="unleashed_topology.dtb"

Changes from v6->v7
1. Added socket to HiFive Unleashed topology example.
2. Added Acked-by & Reviewed-by.

Changes from v5->v6
1. Added two more patches from Sudeep about maintainership of arch_topology.c
   and Kconfig update.
2. Added Tested-by & Reviewed-by
3. Fixed a nit (reordering of variables)

Changes from v4-v5
1. Removed the arch_topology.h header inclusion from topology.c and arch_topology.c
file. Added it in linux/topology.h.
2. core_id is set to -1 upon reset. Otherwise, ARM topology store function does not
work.

Changes from v3->v4
1. Get rid of ARM32 specific information in topology structure.
2. Remove redundant functions from ARM32 and use common code instead. 

Changes from v2->v3
1. Cover letter update with experiment DT for topology changes.
2. Added the patch for [2].

Changes from v1->v2
1. ARM32 can now use the common code as well.

Atish Patra (4):
dt-binding: cpu-topology: Move cpu-map to a common binding.
cpu-topology: Move cpu topology code to common code.
arm: Use common cpu_topology structure and functions.
RISC-V: Parse cpu topology during boot.

Sudeep Holla (3):
Documentation: DT: arm: add support for sockets defining package
boundaries
base: arch_topology: update Kconfig help description
MAINTAINERS: Add an entry for generic architecture topology

.../topology.txt => cpu/cpu-topology.txt}     | 136 ++++++--
MAINTAINERS                                   |   7 +
arch/arm/include/asm/topology.h               |  20 --
arch/arm/kernel/topology.c                    |  60 +---
arch/arm64/include/asm/topology.h             |  23 --
arch/arm64/kernel/topology.c                  | 303 +-----------------
arch/riscv/Kconfig                            |   1 +
arch/riscv/kernel/smpboot.c                   |   3 +
drivers/base/Kconfig                          |   2 +-
drivers/base/arch_topology.c                  | 298 +++++++++++++++++
include/linux/arch_topology.h                 |  26 ++
include/linux/topology.h                      |   1 +
12 files changed, 454 insertions(+), 426 deletions(-)
rename Documentation/devicetree/bindings/{arm/topology.txt => cpu/cpu-topology.txt} (66%)

--
2.21.0

Comments

Sudeep Holla June 19, 2019, 12:10 p.m. UTC | #1
Hi Russell,

On Mon, Jun 17, 2019 at 11:59:17AM -0700, Atish Patra wrote:
> Currently, ARM32 and ARM64 uses different data structures to represent
> their cpu topologies. Since, we are moving the ARM64 topology to common
> code to be used by other architectures, we can reuse that for ARM32 as
> well.
> 
> Take this opprtunity to remove the redundant functions from ARM32 and
> reuse the common code instead.
> 
> To: Russell King <linux@armlinux.org.uk>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> Tested-by: Sudeep Holla <sudeep.holla@arm.com> (on TC2)
> Reviewed-by : Sudeep Holla <sudeep.holla@arm.com>
> 
> ---
> Hi Russell,
> Can we get a ACK for this patch ? We are hoping that the entire
> series can be merged at one go.

It would be nice to get this in for v5.3 as it's almost there.
Are you fine with these changes ?

--
Regards,
Sudeep
Greg Kroah-Hartman June 19, 2019, 5:37 p.m. UTC | #2
On Mon, Jun 17, 2019 at 11:59:20AM -0700, Atish Patra wrote:
> From: Sudeep Holla <sudeep.holla@arm.com>
> 
> arm and arm64 shared lot of CPU topology related code. This was
> consolidated under driver/base/arch_topology.c by Juri. Now RISC-V
> is also started sharing the same code pulling more code from arm64
> into arch_topology.c
> 
> Since I was involved in the review from the beginning, I would like
> to assume maintenance for the same.
> 
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Acked-by: Juri Lelli <juri.lelli@redhat.com>
> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Greg Kroah-Hartman June 19, 2019, 5:38 p.m. UTC | #3
On Mon, Jun 17, 2019 at 11:59:16AM -0700, Atish Patra wrote:
> Both RISC-V & ARM64 are using cpu-map device tree to describe
> their cpu topology. It's better to move the relevant code to
> a common place instead of duplicate code.
> 
> To: Will Deacon <will.deacon@arm.com>
> To: Catalin Marinas <catalin.marinas@arm.com>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> [Tested on QDF2400]
> Tested-by: Jeffrey Hugo <jhugo@codeaurora.org>
> [Tested on Juno and other embedded platforms.]
> Tested-by: Sudeep Holla <sudeep.holla@arm.com>
> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
> Acked-by: Will Deacon <will.deacon@arm.com>

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Atish Patra June 21, 2019, 10:31 p.m. UTC | #4
On Wed, 2019-06-19 at 19:38 +0200, Greg Kroah-Hartman wrote:
> On Mon, Jun 17, 2019 at 11:59:16AM -0700, Atish Patra wrote:
> > Both RISC-V & ARM64 are using cpu-map device tree to describe
> > their cpu topology. It's better to move the relevant code to
> > a common place instead of duplicate code.
> > 
> > To: Will Deacon <will.deacon@arm.com>
> > To: Catalin Marinas <catalin.marinas@arm.com>
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > [Tested on QDF2400]
> > Tested-by: Jeffrey Hugo <jhugo@codeaurora.org>
> > [Tested on Juno and other embedded platforms.]
> > Tested-by: Sudeep Holla <sudeep.holla@arm.com>
> > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
> > Acked-by: Will Deacon <will.deacon@arm.com>
> 
> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Hi Paul,
I guess Greg has acked the series assuming that it will go through some
other tree. Can you take it through RISC-V tree ?

Sorry for the confusion.

Note: We are still waiting for RMK's ACK on arm patch before it can be
sent as a PR.

Regards,
Atish
Paul Walmsley June 23, 2019, 5:51 p.m. UTC | #5
Hi Atish, Russell,

On Fri, 21 Jun 2019, Atish Patra wrote:

> On Wed, 2019-06-19 at 19:38 +0200, Greg Kroah-Hartman wrote:
> > On Mon, Jun 17, 2019 at 11:59:16AM -0700, Atish Patra wrote:
> > > Both RISC-V & ARM64 are using cpu-map device tree to describe
> > > their cpu topology. It's better to move the relevant code to
> > > a common place instead of duplicate code.

[ ... ]

> I guess Greg has acked the series assuming that it will go through some
> other tree. Can you take it through RISC-V tree ?
> 
> Sorry for the confusion.
> 
> Note: We are still waiting for RMK's ACK on arm patch before it can be
> sent as a PR.

I'm fine to take it through the RISC-V tree, once Russell acks the 
arch/arm patch.


- Paul
Sudeep Holla June 24, 2019, 3:06 p.m. UTC | #6
On Wed, Jun 19, 2019 at 01:10:57PM +0100, Sudeep Holla wrote:
> Hi Russell,
>
> On Mon, Jun 17, 2019 at 11:59:17AM -0700, Atish Patra wrote:
> > Currently, ARM32 and ARM64 uses different data structures to represent
> > their cpu topologies. Since, we are moving the ARM64 topology to common
> > code to be used by other architectures, we can reuse that for ARM32 as
> > well.
> >
> > Take this opprtunity to remove the redundant functions from ARM32 and
> > reuse the common code instead.
> >
> > To: Russell King <linux@armlinux.org.uk>
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > Tested-by: Sudeep Holla <sudeep.holla@arm.com> (on TC2)
> > Reviewed-by : Sudeep Holla <sudeep.holla@arm.com>
> >
> > ---
> > Hi Russell,
> > Can we get a ACK for this patch ? We are hoping that the entire
> > series can be merged at one go.
>
> It would be nice to get this in for v5.3 as it's almost there.
> Are you fine with these changes ?
>

Do you have any objections with this patch ? We plan to merge through
RISC-V tree, please let us know. It has been acked-by all the other
maintainers.

--
Regards,
Sudeep
Russell King (Oracle) June 24, 2019, 3:30 p.m. UTC | #7
On Mon, Jun 24, 2019 at 04:06:58PM +0100, Sudeep Holla wrote:
> On Wed, Jun 19, 2019 at 01:10:57PM +0100, Sudeep Holla wrote:
> > Hi Russell,
> >
> > On Mon, Jun 17, 2019 at 11:59:17AM -0700, Atish Patra wrote:
> > > Currently, ARM32 and ARM64 uses different data structures to represent
> > > their cpu topologies. Since, we are moving the ARM64 topology to common
> > > code to be used by other architectures, we can reuse that for ARM32 as
> > > well.
> > >
> > > Take this opprtunity to remove the redundant functions from ARM32 and
> > > reuse the common code instead.
> > >
> > > To: Russell King <linux@armlinux.org.uk>
> > > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > > Tested-by: Sudeep Holla <sudeep.holla@arm.com> (on TC2)
> > > Reviewed-by : Sudeep Holla <sudeep.holla@arm.com>
> > >
> > > ---
> > > Hi Russell,
> > > Can we get a ACK for this patch ? We are hoping that the entire
> > > series can be merged at one go.
> >
> > It would be nice to get this in for v5.3 as it's almost there.
> > Are you fine with these changes ?
> >
> 
> Do you have any objections with this patch ? We plan to merge through
> RISC-V tree, please let us know. It has been acked-by all the other
> maintainers.

I have no interest in the CPU topology code; as far as I know I have
no systems that are able to exercise this code in any way.  Therefore,
I don't know this code, I have no way to test it, and so it is not
appropriate for me to ack patches for it.
Sudeep Holla June 24, 2019, 3:33 p.m. UTC | #8
On Mon, Jun 24, 2019 at 04:30:33PM +0100, Russell King - ARM Linux admin wrote:
> On Mon, Jun 24, 2019 at 04:06:58PM +0100, Sudeep Holla wrote:
> > On Wed, Jun 19, 2019 at 01:10:57PM +0100, Sudeep Holla wrote:
> > > Hi Russell,
> > >
> > > On Mon, Jun 17, 2019 at 11:59:17AM -0700, Atish Patra wrote:
> > > > Currently, ARM32 and ARM64 uses different data structures to represent
> > > > their cpu topologies. Since, we are moving the ARM64 topology to common
> > > > code to be used by other architectures, we can reuse that for ARM32 as
> > > > well.
> > > >
> > > > Take this opprtunity to remove the redundant functions from ARM32 and
> > > > reuse the common code instead.
> > > >
> > > > To: Russell King <linux@armlinux.org.uk>
> > > > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > > > Tested-by: Sudeep Holla <sudeep.holla@arm.com> (on TC2)
> > > > Reviewed-by : Sudeep Holla <sudeep.holla@arm.com>
> > > >
> > > > ---
> > > > Hi Russell,
> > > > Can we get a ACK for this patch ? We are hoping that the entire
> > > > series can be merged at one go.
> > >
> > > It would be nice to get this in for v5.3 as it's almost there.
> > > Are you fine with these changes ?
> > >
> >
> > Do you have any objections with this patch ? We plan to merge through
> > RISC-V tree, please let us know. It has been acked-by all the other
> > maintainers.
>
> I have no interest in the CPU topology code; as far as I know I have
> no systems that are able to exercise this code in any way.  Therefore,
> I don't know this code, I have no way to test it, and so it is not
> appropriate for me to ack patches for it.
>

I completely understand that and we can take care of testing. As along
as you don't have objections to this, that should be fine I believe.

--
Regards,
Sudeep