diff mbox series

[U-Boot,v6,5/5] mmc: fsl_esdhc_imx: drop useless code

Message ID 20190619042430.37881-6-yangbo.lu@nxp.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series Split fsl_esdhc driver for i.MX | expand

Commit Message

Yangbo Lu June 19, 2019, 4:24 a.m. UTC 
Dropped useless code for i.MX eSDHC driver.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
Changes for v2:
	- Added this patch.
Changes for v3:
	- None.
Changes for v4:
	- Dropped PPC code introduced recently.
Changes for v5:
	- Kept MCF5441x code.
Changes for v6:
	- None.
---
 drivers/mmc/fsl_esdhc_imx.c | 65 +++------------------------------------------
 include/fsl_esdhc_imx.h     |  4 ---
 2 files changed, 4 insertions(+), 65 deletions(-)

Comments

Lukasz Majewski June 19, 2019, 6:48 a.m. UTC | #1 
On Wed, 19 Jun 2019 12:24:30 +0800
Yangbo Lu <yangbo.lu@nxp.com> wrote:

> Dropped useless code for i.MX eSDHC driver.
> 
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> ---
> Changes for v2:
> 	- Added this patch.
> Changes for v3:
> 	- None.
> Changes for v4:
> 	- Dropped PPC code introduced recently.
> Changes for v5:
> 	- Kept MCF5441x code.
> Changes for v6:
> 	- None.
> ---
>  drivers/mmc/fsl_esdhc_imx.c | 65
> +++------------------------------------------
> include/fsl_esdhc_imx.h     |  4 --- 2 files changed, 4
> insertions(+), 65 deletions(-)
> 
> diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
> index 1474e2c..2c0ad18 100644
> --- a/drivers/mmc/fsl_esdhc_imx.c
> +++ b/drivers/mmc/fsl_esdhc_imx.c
> @@ -261,8 +261,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv
> *priv, struct mmc *mmc, {
>  	int timeout;
>  	struct fsl_esdhc *regs = priv->esdhc_regs;
> -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> defined(CONFIG_IMX8M) dma_addr_t addr;
>  #endif
>  	uint wml_value;
> @@ -275,8 +274,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv
> *priv, struct mmc *mmc, 
>  		esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK,
> wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
> -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest));
>  		if (upper_32_bits(addr))
>  			printf("Error found for upper 32 bits\n");
> @@ -312,8 +310,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv
> *priv, struct mmc *mmc, esdhc_clrsetbits32(&regs->wml,
> WML_WR_WML_MASK, wml_value << 16);
>  #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
> -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src));
>  		if (upper_32_bits(addr))
>  			printf("Error found for upper 32 bits\n");
> @@ -378,8 +375,7 @@ static void check_and_invalidate_dcache_range
>  	unsigned end = 0;
>  	unsigned size = roundup(ARCH_DMA_MINALIGN,
>  				data->blocks*data->blocksize);
> -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> defined(CONFIG_IMX8M) dma_addr_t addr;
>  
>  	addr = virt_to_phys((void *)(data->dest));
> @@ -1364,45 +1360,6 @@ int fsl_esdhc_mmc_init(bd_t *bis)
>  }
>  #endif
>  
> -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
> -void mmc_adapter_card_type_ident(void)
> -{
> -	u8 card_id;
> -	u8 value;
> -
> -	card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
> -	gd->arch.sdhc_adapter = card_id;
> -
> -	switch (card_id) {
> -	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
> -		value = QIXIS_READ(brdcfg[5]);
> -		value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
> -		QIXIS_WRITE(brdcfg[5], value);
> -		break;
> -	case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
> -		value = QIXIS_READ(pwr_ctl[1]);
> -		value |= QIXIS_EVDD_BY_SDHC_VS;
> -		QIXIS_WRITE(pwr_ctl[1], value);
> -		break;
> -	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
> -		value = QIXIS_READ(brdcfg[5]);
> -		value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
> -		QIXIS_WRITE(brdcfg[5], value);
> -		break;
> -	case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
> -		break;
> -	case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
> -		break;
> -	case QIXIS_ESDHC_ADAPTER_TYPE_SD:
> -		break;
> -	case QIXIS_ESDHC_NO_ADAPTER:
> -		break;
> -	default:
> -		break;
> -	}
> -}
> -#endif
> -
>  #ifdef CONFIG_OF_LIBFDT
>  __weak int esdhc_status_fixup(void *blob, const char *compat)
>  {
> @@ -1430,17 +1387,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
>  	do_fixup_by_compat_u32(blob, compat, "clock-frequency",
>  			       gd->arch.sdhc_clk, 1);
>  #endif
> -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
> -	do_fixup_by_compat_u32(blob, compat, "adapter-type",
> -			       (u32)(gd->arch.sdhc_adapter), 1);
> -#endif
>  }
>  #endif
>  
>  #if CONFIG_IS_ENABLED(DM_MMC)
> -#ifndef CONFIG_PPC
>  #include <asm/arch/clock.h>
> -#endif
>  __weak void init_clk_usdhc(u32 index)
>  {
>  }
> @@ -1465,11 +1416,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
>  	addr = dev_read_addr(dev);
>  	if (addr == FDT_ADDR_T_NONE)
>  		return -EINVAL;
> -#ifdef CONFIG_PPC
> -	priv->esdhc_regs = (struct fsl_esdhc *)lower_32_bits(addr);
> -#else
>  	priv->esdhc_regs = (struct fsl_esdhc *)addr;
> -#endif
>  	priv->dev = dev;
>  	priv->mode = -1;
>  	if (data) {
> @@ -1576,11 +1523,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
>  
>  		priv->sdhc_clk = clk_get_rate(&priv->per_clk);
>  	} else {
> -#ifndef CONFIG_PPC
>  		priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK +
> dev->seq); -#else
> -		priv->sdhc_clk = gd->arch.sdhc_clk;
> -#endif
>  		if (priv->sdhc_clk <= 0) {
>  			dev_err(dev, "Unable to get clk for %s\n",
> dev->name); return -EINVAL;
> diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h
> index 67fd289..33c6d52 100644
> --- a/include/fsl_esdhc_imx.h
> +++ b/include/fsl_esdhc_imx.h
> @@ -19,10 +19,6 @@
>  /* needed for the mmc_cfg definition */
>  #include <mmc.h>
>  
> -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
> -#include "../board/freescale/common/qixis.h"
> -#endif
> -
>  /* FSL eSDHC-specific constants */
>  #define SYSCTL			0x0002e02c
>  #define SYSCTL_INITA		0x08000000

Thanks for cleaning up this driver. Splitting it will definitely make
maintenance easier in the future.

Reviewed-by: Lukasz Majewski <lukma@denx.de>

Just one more request - as this patch is quite intrusive.

I suppose that you tested it on all archs with Travis-CI?

Also, even more important - have you used buildman tool:

./tools/buildman/buildman.py --branch=HEAD imx
--show_errors --force-build --count=5 --output-dir=../BUILD/

where the imx covers all the i.MX machines (you can also used only e.g.
mx6 or qoriq).

This will check if the U-Boot builds after applying each commit, which
is important for bisecting.


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Yangbo Lu June 20, 2019, 3:33 a.m. UTC | #2 
> -----Original Message-----
> From: Lukasz Majewski <lukma@denx.de>
> Sent: 2019年6月19日 14:48
> To: Y.b. Lu <yangbo.lu@nxp.com>
> Cc: u-boot@lists.denx.de; Stefano Babic <sbabic@denx.de>; Fabio Estevam
> <festevam@gmail.com>; dl-uboot-imx <uboot-imx@nxp.com>; Albert Aribaud
> <albert.u.boot@aribaud.net>; Eddy Petrișor <eddy.petrisor@gmail.com>;
> Akshay Bhat <akshaybhat@timesys.com>; Ken Lin
> <Ken.Lin@advantech.com.tw>; Heiko Schocher <hs@denx.de>; Christian
> Gmeiner <christian.gmeiner@gmail.com>; Stefan Roese <sr@denx.de>; Patrick
> Bruenn <p.bruenn@beckhoff.com>; Troy Kisky
> <troy.kisky@boundarydevices.com>; Uri Mashiach
> <uri.mashiach@compulab.co.il>; Nikita Kiryanov <nikita@compulab.co.il>;
> Otavio Salvador <otavio@ossystems.com.br>; Andreas Geisreiter
> <ageisreiter@dh-electronics.de>; Ludwig Zenz <lzenz@dh-electronics.de>;
> Peng Fan <peng.fan@nxp.com>; Jason Liu <jason.hui.liu@nxp.com>; Ye Li
> <ye.li@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; Alison Wang
> <alison.wang@nxp.com>; tharvey@gateworks.com; Ian Ray
> <ian.ray@ge.com>; Marcin Niestroj <m.niestroj@grinn-global.com>; Andrej
> Rosano <andrej@inversepath.com>; Marek Vasut <marex@denx.de>; Adam
> Ford <aford173@gmail.com>; Olaf Mandel <o.mandel@menlosystems.com>;
> Martyn Welch <martyn.welch@collabora.com>; Ingo Schroeck
> <open-source@samtec.de>; Soeren Moch <smoch@web.de>; Richard Hu
> <richard.hu@technexion.com>; Vanessa Maegima
> <vanessa.maegima@nxp.com>; Max Krummenacher
> <max.krummenacher@toradex.com>; Stefan Agner
> <stefan.agner@toradex.com>; Markus Niebel <Markus.Niebel@tq-group.com>;
> Breno Matheus Lima <breno.lima@nxp.com>; Francesco Montefoschi
> <francesco.montefoschi@udoo.org>; Parthiban Nallathambi
> <parthitce@gmail.com>; Albert ARIBAUD <albert.aribaud@3adev.fr>; Jagan
> Teki <jagan@amarulasolutions.com>; Raffaele RECALCATI
> <raffaele.recalcati@bticino.it>; Simone CIANNI <simone.cianni@bticino.it>;
> Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>;
> Antti Mäentausta <antti.maentausta@ge.com>
> Subject: Re: [v6, 5/5] mmc: fsl_esdhc_imx: drop useless code
> 
> On Wed, 19 Jun 2019 12:24:30 +0800
> Yangbo Lu <yangbo.lu@nxp.com> wrote:
> 
> > Dropped useless code for i.MX eSDHC driver.
> >
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
> > Reviewed-by: Peng Fan <peng.fan@nxp.com>
> > ---
> > Changes for v2:
> > 	- Added this patch.
> > Changes for v3:
> > 	- None.
> > Changes for v4:
> > 	- Dropped PPC code introduced recently.
> > Changes for v5:
> > 	- Kept MCF5441x code.
> > Changes for v6:
> > 	- None.
> > ---
> >  drivers/mmc/fsl_esdhc_imx.c | 65
> > +++------------------------------------------
> > include/fsl_esdhc_imx.h     |  4 --- 2 files changed, 4
> > insertions(+), 65 deletions(-)
> >
> > diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
> > index 1474e2c..2c0ad18 100644
> > --- a/drivers/mmc/fsl_esdhc_imx.c
> > +++ b/drivers/mmc/fsl_esdhc_imx.c
> > @@ -261,8 +261,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv
> > *priv, struct mmc *mmc, {
> >  	int timeout;
> >  	struct fsl_esdhc *regs = priv->esdhc_regs; -#if
> > defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > defined(CONFIG_IMX8M) dma_addr_t addr;  #endif
> >  	uint wml_value;
> > @@ -275,8 +274,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv
> > *priv, struct mmc *mmc,
> >  		esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value);
> #ifndef
> > CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) ||
> > defined(CONFIG_S32V234) || \
> > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest));
> >  		if (upper_32_bits(addr))
> >  			printf("Error found for upper 32 bits\n"); @@ -312,8 +310,7
> @@
> > static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc
> > *mmc, esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK, wml_value
> <<
> > 16);  #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if
> > defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src));
> >  		if (upper_32_bits(addr))
> >  			printf("Error found for upper 32 bits\n"); @@ -378,8 +375,7
> @@
> > static void check_and_invalidate_dcache_range
> >  	unsigned end = 0;
> >  	unsigned size = roundup(ARCH_DMA_MINALIGN,
> >  				data->blocks*data->blocksize);
> > -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > defined(CONFIG_IMX8M) dma_addr_t addr;
> >
> >  	addr = virt_to_phys((void *)(data->dest)); @@ -1364,45 +1360,6 @@
> > int fsl_esdhc_mmc_init(bd_t *bis)  }  #endif
> >
> > -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void
> > mmc_adapter_card_type_ident(void) -{
> > -	u8 card_id;
> > -	u8 value;
> > -
> > -	card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
> > -	gd->arch.sdhc_adapter = card_id;
> > -
> > -	switch (card_id) {
> > -	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
> > -		value = QIXIS_READ(brdcfg[5]);
> > -		value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
> > -		QIXIS_WRITE(brdcfg[5], value);
> > -		break;
> > -	case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
> > -		value = QIXIS_READ(pwr_ctl[1]);
> > -		value |= QIXIS_EVDD_BY_SDHC_VS;
> > -		QIXIS_WRITE(pwr_ctl[1], value);
> > -		break;
> > -	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
> > -		value = QIXIS_READ(brdcfg[5]);
> > -		value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
> > -		QIXIS_WRITE(brdcfg[5], value);
> > -		break;
> > -	case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
> > -		break;
> > -	case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
> > -		break;
> > -	case QIXIS_ESDHC_ADAPTER_TYPE_SD:
> > -		break;
> > -	case QIXIS_ESDHC_NO_ADAPTER:
> > -		break;
> > -	default:
> > -		break;
> > -	}
> > -}
> > -#endif
> > -
> >  #ifdef CONFIG_OF_LIBFDT
> >  __weak int esdhc_status_fixup(void *blob, const char *compat)  { @@
> > -1430,17 +1387,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
> >  	do_fixup_by_compat_u32(blob, compat, "clock-frequency",
> >  			       gd->arch.sdhc_clk, 1);
> >  #endif
> > -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
> > -	do_fixup_by_compat_u32(blob, compat, "adapter-type",
> > -			       (u32)(gd->arch.sdhc_adapter), 1);
> > -#endif
> >  }
> >  #endif
> >
> >  #if CONFIG_IS_ENABLED(DM_MMC)
> > -#ifndef CONFIG_PPC
> >  #include <asm/arch/clock.h>
> > -#endif
> >  __weak void init_clk_usdhc(u32 index)  {  } @@ -1465,11 +1416,7 @@
> > static int fsl_esdhc_probe(struct udevice *dev)
> >  	addr = dev_read_addr(dev);
> >  	if (addr == FDT_ADDR_T_NONE)
> >  		return -EINVAL;
> > -#ifdef CONFIG_PPC
> > -	priv->esdhc_regs = (struct fsl_esdhc *)lower_32_bits(addr);
> > -#else
> >  	priv->esdhc_regs = (struct fsl_esdhc *)addr; -#endif
> >  	priv->dev = dev;
> >  	priv->mode = -1;
> >  	if (data) {
> > @@ -1576,11 +1523,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
> >
> >  		priv->sdhc_clk = clk_get_rate(&priv->per_clk);
> >  	} else {
> > -#ifndef CONFIG_PPC
> >  		priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK +
> > dev->seq); -#else
> > -		priv->sdhc_clk = gd->arch.sdhc_clk;
> > -#endif
> >  		if (priv->sdhc_clk <= 0) {
> >  			dev_err(dev, "Unable to get clk for %s\n",
> > dev->name); return -EINVAL;
> > diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index
> > 67fd289..33c6d52 100644
> > --- a/include/fsl_esdhc_imx.h
> > +++ b/include/fsl_esdhc_imx.h
> > @@ -19,10 +19,6 @@
> >  /* needed for the mmc_cfg definition */  #include <mmc.h>
> >
> > -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include
> > "../board/freescale/common/qixis.h"
> > -#endif
> > -
> >  /* FSL eSDHC-specific constants */
> >  #define SYSCTL			0x0002e02c
> >  #define SYSCTL_INITA		0x08000000
> 
> Thanks for cleaning up this driver. Splitting it will definitely make maintenance
> easier in the future.
> 
> Reviewed-by: Lukasz Majewski <lukma@denx.de>
> 
> Just one more request - as this patch is quite intrusive.
> 
> I suppose that you tested it on all archs with Travis-CI?
> 
> Also, even more important - have you used buildman tool:
> 
> ./tools/buildman/buildman.py --branch=HEAD imx --show_errors --force-build
> --count=5 --output-dir=../BUILD/
> 
> where the imx covers all the i.MX machines (you can also used only e.g.
> mx6 or qoriq).
> 
> This will check if the U-Boot builds after applying each commit, which is
> important for bisecting.

[Y.b. Lu] Sorry. I didn’t notice u-boot had been moved to gitlab. I had to rebase it again.
I sent out v7. Buildman test seemed to be fine.

$ ./tools/buildman/buildman.py --branch=HEAD imx --show_errors --force-build --count=5 --output-dir=../BUILD/
Building 5 commits for 17 boards (4 threads, 1 job per thread)
   50   35    0 /85     imx6ul_geam_nand

And Travis-CI is in progress. I think the result will be fine since I tested for previous version patch-set.
https://travis-ci.org/yangbolu1991/u-boot-test/builds/548009687


> 
> 
> Best regards,
> 
> Lukasz Majewski
> 
> --
> 
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> lukma@denx.de
Yangbo Lu June 20, 2019, 4:03 a.m. UTC | #3 
> -----Original Message-----
> From: Y.b. Lu
> Sent: 2019年6月20日 11:34
> To: Lukasz Majewski <lukma@denx.de>
> Cc: u-boot@lists.denx.de; Stefano Babic <sbabic@denx.de>; Fabio Estevam
> <festevam@gmail.com>; dl-uboot-imx <uboot-imx@nxp.com>; Albert Aribaud
> <albert.u.boot@aribaud.net>; Eddy Petrișor <eddy.petrisor@gmail.com>;
> Akshay Bhat <akshaybhat@timesys.com>; Ken Lin
> <Ken.Lin@advantech.com.tw>; Heiko Schocher <hs@denx.de>; Christian
> Gmeiner <christian.gmeiner@gmail.com>; Stefan Roese <sr@denx.de>; Patrick
> Bruenn <p.bruenn@beckhoff.com>; Troy Kisky
> <troy.kisky@boundarydevices.com>; Uri Mashiach
> <uri.mashiach@compulab.co.il>; Nikita Kiryanov <nikita@compulab.co.il>;
> Otavio Salvador <otavio@ossystems.com.br>; Andreas Geisreiter
> <ageisreiter@dh-electronics.de>; Ludwig Zenz <lzenz@dh-electronics.de>;
> Peng Fan <peng.fan@nxp.com>; Jason Liu <jason.hui.liu@nxp.com>; Ye Li
> <ye.li@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; Alison Wang
> <alison.wang@nxp.com>; tharvey@gateworks.com; Ian Ray
> <ian.ray@ge.com>; Marcin Niestroj <m.niestroj@grinn-global.com>; Andrej
> Rosano <andrej@inversepath.com>; Marek Vasut <marex@denx.de>; Adam
> Ford <aford173@gmail.com>; Olaf Mandel <o.mandel@menlosystems.com>;
> Martyn Welch <martyn.welch@collabora.com>; Ingo Schroeck
> <open-source@samtec.de>; Soeren Moch <smoch@web.de>; Richard Hu
> <richard.hu@technexion.com>; Vanessa Maegima
> <vanessa.maegima@nxp.com>; Max Krummenacher
> <max.krummenacher@toradex.com>; Stefan Agner
> <stefan.agner@toradex.com>; Markus Niebel <Markus.Niebel@tq-group.com>;
> Breno Matheus Lima <breno.lima@nxp.com>; Francesco Montefoschi
> <francesco.montefoschi@udoo.org>; Parthiban Nallathambi
> <parthitce@gmail.com>; Albert ARIBAUD <albert.aribaud@3adev.fr>; Jagan
> Teki <jagan@amarulasolutions.com>; Raffaele RECALCATI
> <raffaele.recalcati@bticino.it>; Simone CIANNI <simone.cianni@bticino.it>;
> Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>;
> Antti Mäentausta <antti.maentausta@ge.com>
> Subject: RE: [v6, 5/5] mmc: fsl_esdhc_imx: drop useless code
> 
> 
> 
> > -----Original Message-----
> > From: Lukasz Majewski <lukma@denx.de>
> > Sent: 2019年6月19日 14:48
> > To: Y.b. Lu <yangbo.lu@nxp.com>
> > Cc: u-boot@lists.denx.de; Stefano Babic <sbabic@denx.de>; Fabio
> > Estevam <festevam@gmail.com>; dl-uboot-imx <uboot-imx@nxp.com>;
> Albert
> > Aribaud <albert.u.boot@aribaud.net>; Eddy Petrișor
> > <eddy.petrisor@gmail.com>; Akshay Bhat <akshaybhat@timesys.com>; Ken
> > Lin <Ken.Lin@advantech.com.tw>; Heiko Schocher <hs@denx.de>; Christian
> > Gmeiner <christian.gmeiner@gmail.com>; Stefan Roese <sr@denx.de>;
> > Patrick Bruenn <p.bruenn@beckhoff.com>; Troy Kisky
> > <troy.kisky@boundarydevices.com>; Uri Mashiach
> > <uri.mashiach@compulab.co.il>; Nikita Kiryanov
> > <nikita@compulab.co.il>; Otavio Salvador <otavio@ossystems.com.br>;
> > Andreas Geisreiter <ageisreiter@dh-electronics.de>; Ludwig Zenz
> > <lzenz@dh-electronics.de>; Peng Fan <peng.fan@nxp.com>; Jason Liu
> > <jason.hui.liu@nxp.com>; Ye Li <ye.li@nxp.com>; Adrian Alonso
> > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>;
> > tharvey@gateworks.com; Ian Ray <ian.ray@ge.com>; Marcin Niestroj
> > <m.niestroj@grinn-global.com>; Andrej Rosano <andrej@inversepath.com>;
> > Marek Vasut <marex@denx.de>; Adam Ford <aford173@gmail.com>; Olaf
> > Mandel <o.mandel@menlosystems.com>; Martyn Welch
> > <martyn.welch@collabora.com>; Ingo Schroeck <open-source@samtec.de>;
> > Soeren Moch <smoch@web.de>; Richard Hu <richard.hu@technexion.com>;
> > Vanessa Maegima <vanessa.maegima@nxp.com>; Max Krummenacher
> > <max.krummenacher@toradex.com>; Stefan Agner
> > <stefan.agner@toradex.com>; Markus Niebel
> > <Markus.Niebel@tq-group.com>; Breno Matheus Lima
> <breno.lima@nxp.com>;
> > Francesco Montefoschi <francesco.montefoschi@udoo.org>; Parthiban
> > Nallathambi <parthitce@gmail.com>; Albert ARIBAUD
> > <albert.aribaud@3adev.fr>; Jagan Teki <jagan@amarulasolutions.com>;
> > Raffaele RECALCATI <raffaele.recalcati@bticino.it>; Simone CIANNI
> > <simone.cianni@bticino.it>; Bhaskar Upadhaya
> > <bhaskar.upadhaya@nxp.com>; Prabhakar Kushwaha
> > <prabhakar.kushwaha@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>;
> > Antti Mäentausta <antti.maentausta@ge.com>
> > Subject: Re: [v6, 5/5] mmc: fsl_esdhc_imx: drop useless code
> >
> > On Wed, 19 Jun 2019 12:24:30 +0800
> > Yangbo Lu <yangbo.lu@nxp.com> wrote:
> >
> > > Dropped useless code for i.MX eSDHC driver.
> > >
> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
> > > Reviewed-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > > Changes for v2:
> > > 	- Added this patch.
> > > Changes for v3:
> > > 	- None.
> > > Changes for v4:
> > > 	- Dropped PPC code introduced recently.
> > > Changes for v5:
> > > 	- Kept MCF5441x code.
> > > Changes for v6:
> > > 	- None.
> > > ---
> > >  drivers/mmc/fsl_esdhc_imx.c | 65
> > > +++------------------------------------------
> > > include/fsl_esdhc_imx.h     |  4 --- 2 files changed, 4
> > > insertions(+), 65 deletions(-)
> > >
> > > diff --git a/drivers/mmc/fsl_esdhc_imx.c
> > > b/drivers/mmc/fsl_esdhc_imx.c index 1474e2c..2c0ad18 100644
> > > --- a/drivers/mmc/fsl_esdhc_imx.c
> > > +++ b/drivers/mmc/fsl_esdhc_imx.c
> > > @@ -261,8 +261,7 @@ static int esdhc_setup_data(struct
> > > fsl_esdhc_priv *priv, struct mmc *mmc, {
> > >  	int timeout;
> > >  	struct fsl_esdhc *regs = priv->esdhc_regs; -#if
> > > defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> > > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > > defined(CONFIG_IMX8M) dma_addr_t addr;  #endif
> > >  	uint wml_value;
> > > @@ -275,8 +274,7 @@ static int esdhc_setup_data(struct
> > > fsl_esdhc_priv *priv, struct mmc *mmc,
> > >  		esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK,
> wml_value);
> > #ifndef
> > > CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE)
> ||
> > > defined(CONFIG_S32V234) || \
> > > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > > defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest));
> > >  		if (upper_32_bits(addr))
> > >  			printf("Error found for upper 32 bits\n"); @@ -312,8
> +310,7
> > @@
> > > static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc
> > > *mmc, esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,
> wml_value
> > <<
> > > 16);  #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if
> > > defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> > > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > > defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src));
> > >  		if (upper_32_bits(addr))
> > >  			printf("Error found for upper 32 bits\n"); @@ -378,8
> +375,7
> > @@
> > > static void check_and_invalidate_dcache_range
> > >  	unsigned end = 0;
> > >  	unsigned size = roundup(ARCH_DMA_MINALIGN,
> > >  				data->blocks*data->blocksize);
> > > -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
> > > -	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
> > > +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) ||
> > > defined(CONFIG_IMX8M) dma_addr_t addr;
> > >
> > >  	addr = virt_to_phys((void *)(data->dest)); @@ -1364,45 +1360,6
> @@
> > > int fsl_esdhc_mmc_init(bd_t *bis)  }  #endif
> > >
> > > -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void
> > > mmc_adapter_card_type_ident(void) -{
> > > -	u8 card_id;
> > > -	u8 value;
> > > -
> > > -	card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
> > > -	gd->arch.sdhc_adapter = card_id;
> > > -
> > > -	switch (card_id) {
> > > -	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
> > > -		value = QIXIS_READ(brdcfg[5]);
> > > -		value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
> > > -		QIXIS_WRITE(brdcfg[5], value);
> > > -		break;
> > > -	case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
> > > -		value = QIXIS_READ(pwr_ctl[1]);
> > > -		value |= QIXIS_EVDD_BY_SDHC_VS;
> > > -		QIXIS_WRITE(pwr_ctl[1], value);
> > > -		break;
> > > -	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
> > > -		value = QIXIS_READ(brdcfg[5]);
> > > -		value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
> > > -		QIXIS_WRITE(brdcfg[5], value);
> > > -		break;
> > > -	case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
> > > -		break;
> > > -	case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
> > > -		break;
> > > -	case QIXIS_ESDHC_ADAPTER_TYPE_SD:
> > > -		break;
> > > -	case QIXIS_ESDHC_NO_ADAPTER:
> > > -		break;
> > > -	default:
> > > -		break;
> > > -	}
> > > -}
> > > -#endif
> > > -
> > >  #ifdef CONFIG_OF_LIBFDT
> > >  __weak int esdhc_status_fixup(void *blob, const char *compat)  { @@
> > > -1430,17 +1387,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
> > >  	do_fixup_by_compat_u32(blob, compat, "clock-frequency",
> > >  			       gd->arch.sdhc_clk, 1);
> > >  #endif
> > > -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
> > > -	do_fixup_by_compat_u32(blob, compat, "adapter-type",
> > > -			       (u32)(gd->arch.sdhc_adapter), 1);
> > > -#endif
> > >  }
> > >  #endif
> > >
> > >  #if CONFIG_IS_ENABLED(DM_MMC)
> > > -#ifndef CONFIG_PPC
> > >  #include <asm/arch/clock.h>
> > > -#endif
> > >  __weak void init_clk_usdhc(u32 index)  {  } @@ -1465,11 +1416,7 @@
> > > static int fsl_esdhc_probe(struct udevice *dev)
> > >  	addr = dev_read_addr(dev);
> > >  	if (addr == FDT_ADDR_T_NONE)
> > >  		return -EINVAL;
> > > -#ifdef CONFIG_PPC
> > > -	priv->esdhc_regs = (struct fsl_esdhc *)lower_32_bits(addr);
> > > -#else
> > >  	priv->esdhc_regs = (struct fsl_esdhc *)addr; -#endif
> > >  	priv->dev = dev;
> > >  	priv->mode = -1;
> > >  	if (data) {
> > > @@ -1576,11 +1523,7 @@ static int fsl_esdhc_probe(struct udevice
> > > *dev)
> > >
> > >  		priv->sdhc_clk = clk_get_rate(&priv->per_clk);
> > >  	} else {
> > > -#ifndef CONFIG_PPC
> > >  		priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK +
> > > dev->seq); -#else
> > > -		priv->sdhc_clk = gd->arch.sdhc_clk;
> > > -#endif
> > >  		if (priv->sdhc_clk <= 0) {
> > >  			dev_err(dev, "Unable to get clk for %s\n",
> > > dev->name); return -EINVAL;
> > > diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index
> > > 67fd289..33c6d52 100644
> > > --- a/include/fsl_esdhc_imx.h
> > > +++ b/include/fsl_esdhc_imx.h
> > > @@ -19,10 +19,6 @@
> > >  /* needed for the mmc_cfg definition */  #include <mmc.h>
> > >
> > > -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include
> > > "../board/freescale/common/qixis.h"
> > > -#endif
> > > -
> > >  /* FSL eSDHC-specific constants */
> > >  #define SYSCTL			0x0002e02c
> > >  #define SYSCTL_INITA		0x08000000
> >
> > Thanks for cleaning up this driver. Splitting it will definitely make
> > maintenance easier in the future.
> >
> > Reviewed-by: Lukasz Majewski <lukma@denx.de>
> >
> > Just one more request - as this patch is quite intrusive.
> >
> > I suppose that you tested it on all archs with Travis-CI?
> >
> > Also, even more important - have you used buildman tool:
> >
> > ./tools/buildman/buildman.py --branch=HEAD imx --show_errors
> > --force-build
> > --count=5 --output-dir=../BUILD/
> >
> > where the imx covers all the i.MX machines (you can also used only e.g.
> > mx6 or qoriq).
> >
> > This will check if the U-Boot builds after applying each commit, which
> > is important for bisecting.
> 
> [Y.b. Lu] Sorry. I didn’t notice u-boot had been moved to gitlab. I had to
> rebase it again.
> I sent out v7. Buildman test seemed to be fine.
> 
> $ ./tools/buildman/buildman.py --branch=HEAD imx --show_errors
> --force-build --count=5 --output-dir=../BUILD/ Building 5 commits for 17 boards
> (4 threads, 1 job per thread)
>    50   35    0 /85     imx6ul_geam_nand
> 
> And Travis-CI is in progress. I think the result will be fine since I tested for
> previous version patch-set.
> https://travis-ci.org/yangbolu1991/u-boot-test/builds/548009687
> 

[Y.b. Lu] Sorry. There are some issues.
I should have noticed several platforms introduced config option in header files but not defconfig.

$ grep -r 'FSL_ESDHC$' include/configs/
include/configs/colibri-imx8x.h:#define CONFIG_FSL_ESDHC
include/configs/ls1028a_common.h:#define CONFIG_FSL_ESDHC
include/configs/ls1028a_common.h:#define CONFIG_FSL_ESDHC
include/configs/apalis-imx8.h:#define CONFIG_FSL_ESDHC

Let me rework the patch-set again ☹

> 
> >
> >
> > Best regards,
> >
> > Lukasz Majewski
> >
> > --
> >
> > DENX Software Engineering GmbH,      Managing Director: Wolfgang
> Denk
> > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> > Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> > lukma@denx.de
diff mbox series

Patch

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 1474e2c..2c0ad18 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -261,8 +261,7 @@  static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 {
 	int timeout;
 	struct fsl_esdhc *regs = priv->esdhc_regs;
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
-	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
 	dma_addr_t addr;
 #endif
 	uint wml_value;
@@ -275,8 +274,7 @@  static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 
 		esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value);
 #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
-	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
 		addr = virt_to_phys((void *)(data->dest));
 		if (upper_32_bits(addr))
 			printf("Error found for upper 32 bits\n");
@@ -312,8 +310,7 @@  static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 		esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,
 					wml_value << 16);
 #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
-	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
 		addr = virt_to_phys((void *)(data->src));
 		if (upper_32_bits(addr))
 			printf("Error found for upper 32 bits\n");
@@ -378,8 +375,7 @@  static void check_and_invalidate_dcache_range
 	unsigned end = 0;
 	unsigned size = roundup(ARCH_DMA_MINALIGN,
 				data->blocks*data->blocksize);
-#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
-	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
 	dma_addr_t addr;
 
 	addr = virt_to_phys((void *)(data->dest));
@@ -1364,45 +1360,6 @@  int fsl_esdhc_mmc_init(bd_t *bis)
 }
 #endif
 
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-void mmc_adapter_card_type_ident(void)
-{
-	u8 card_id;
-	u8 value;
-
-	card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
-	gd->arch.sdhc_adapter = card_id;
-
-	switch (card_id) {
-	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
-		value = QIXIS_READ(brdcfg[5]);
-		value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
-		QIXIS_WRITE(brdcfg[5], value);
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
-		value = QIXIS_READ(pwr_ctl[1]);
-		value |= QIXIS_EVDD_BY_SDHC_VS;
-		QIXIS_WRITE(pwr_ctl[1], value);
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
-		value = QIXIS_READ(brdcfg[5]);
-		value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
-		QIXIS_WRITE(brdcfg[5], value);
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_SD:
-		break;
-	case QIXIS_ESDHC_NO_ADAPTER:
-		break;
-	default:
-		break;
-	}
-}
-#endif
-
 #ifdef CONFIG_OF_LIBFDT
 __weak int esdhc_status_fixup(void *blob, const char *compat)
 {
@@ -1430,17 +1387,11 @@  void fdt_fixup_esdhc(void *blob, bd_t *bd)
 	do_fixup_by_compat_u32(blob, compat, "clock-frequency",
 			       gd->arch.sdhc_clk, 1);
 #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-	do_fixup_by_compat_u32(blob, compat, "adapter-type",
-			       (u32)(gd->arch.sdhc_adapter), 1);
-#endif
 }
 #endif
 
 #if CONFIG_IS_ENABLED(DM_MMC)
-#ifndef CONFIG_PPC
 #include <asm/arch/clock.h>
-#endif
 __weak void init_clk_usdhc(u32 index)
 {
 }
@@ -1465,11 +1416,7 @@  static int fsl_esdhc_probe(struct udevice *dev)
 	addr = dev_read_addr(dev);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
-#ifdef CONFIG_PPC
-	priv->esdhc_regs = (struct fsl_esdhc *)lower_32_bits(addr);
-#else
 	priv->esdhc_regs = (struct fsl_esdhc *)addr;
-#endif
 	priv->dev = dev;
 	priv->mode = -1;
 	if (data) {
@@ -1576,11 +1523,7 @@  static int fsl_esdhc_probe(struct udevice *dev)
 
 		priv->sdhc_clk = clk_get_rate(&priv->per_clk);
 	} else {
-#ifndef CONFIG_PPC
 		priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
-#else
-		priv->sdhc_clk = gd->arch.sdhc_clk;
-#endif
 		if (priv->sdhc_clk <= 0) {
 			dev_err(dev, "Unable to get clk for %s\n", dev->name);
 			return -EINVAL;
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h
index 67fd289..33c6d52 100644
--- a/include/fsl_esdhc_imx.h
+++ b/include/fsl_esdhc_imx.h
@@ -19,10 +19,6 @@ 
 /* needed for the mmc_cfg definition */
 #include <mmc.h>
 
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-#include "../board/freescale/common/qixis.h"
-#endif
-
 /* FSL eSDHC-specific constants */
 #define SYSCTL			0x0002e02c
 #define SYSCTL_INITA		0x08000000