| Message ID | 26018013-bd5b-94d5-6796-ecb3d71add16@ubuntu.com |
|---|---|
| State | New |
| Headers | show |
| Series | [SRU,OEM-OSP1-B,PULL] drm/i915: Add support for Ice lake, take 1 | expand |
Acked-by: Hui Wang <hui.wang@canonical.com> On 2019/6/12 下午5:12, Timo Aaltonen wrote: > BugLink: http://bugs.launchpad.net/bugs/1825940 > > [Impact] > Ice Lake (ICL) graphics needs to be enabled for OEM OSP1 image which is based on 18.04.3 graphics stack with linux-oem-osp1 kernel. > > [Test case] > The usual desktop usage, graphics tests etc. > > [Regression potential] > Linux-oem-osp1 kernel is a new kernel used only on new OEM enablements, and it can't regress any currently running system. > > > The following changes since commit 3e73c1d558edf70f0186fd03cebd7892df4081b1: > > UBUNTU: Ubuntu-oem-osp1-5.0.0-1008.9 (2019-05-26 21:58:43 +0300) > > are available in the Git repository at: > > https://git.launchpad.net/~tjaalton/ubuntu/+source/linux icl5 > > for you to fetch changes up to 1f44f47ac4c715df1e1dafcd9de1697f5732106b: > > drm/i915: Remove the fragile array index -> link rate mapping (2019-06-12 11:52:04 +0300) > > ---------------------------------------------------------------- > Aditya Swarup (3): > drm/i915: Make combo PHY DDI macro definitions consistent for ICL and CNL > drm/i915: Make MG PHY macros semantically consistent > drm/i915/icl: Fix CRC mismatch error for DP link layer compliance > > Bob Paauwe (1): > drm/i915: DFSM pipe disable is valid from gen9 onwards (v2) > > Chris Wilson (11): > drm/i915/selftests: Check we can recover a wedged device > drm/i915/selftests: Verify we can perform resets from atomic context > drm/i915: Limit the for_each_set_bit() to the valid range > drm/i915: Use b->irq_enable() as predicate for mock engine > drm/i915: Restrict PSMI context load w/a to Haswell GT1 > drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation > drm/i915: Refactor out intel_context_init() > drm/i915: De-inline intel_context_init() > drm/i915: Push EMIT_INVALIDATE at request start to backends > drm/i915: Reduce i915_request_alloc retirement to local context > drm/i915: Fix Cherryview oops on boot > > Clint Taylor (1): > drm/i915/hdmi: SCDC Scrambling enable without CTS mode > > Daniele Ceraolo Spurio (1): > drm/i915/icl: do a posting read after irq install > > Imre Deak (10): > drm/i915/icl: Add a debug print for TypeC port disconnection > drm/i915/bios: Parse the VBT TypeC and Thunderbolt port flags > drm/i915/icl: Fix HPD handling for TypeC legacy ports > drm/i915/icl: Add fallback detection method for TypeC legacy ports > drm/i915/ddi: Move DDI port detection to the corresponding helper > drm/i915/icl: Detect port F presence via VBT > drm/i915/icl: Work around broken VBTs for port F detection > drm/i915/icl: Add TypeC ports only if VBT is present > drm/i915/icl: Prevent incorrect DBuf enabling > drm/i915/icl: Fix MG_DP_MODE() register programming > > Jani Nikula (25): > drm/i915: small isolated c99 types to kernel types switch > drm/i915/crt: switch to kernel types > drm/i915/lspcon: switch to kernel types > drm/i915/debugfs: switch to kernel types > drm/i915/irq: switch to kernel types > drm/i915/cdclk: switch to kernel types > drm/i915/dpll_mgr: switch to kernel types > drm/i915/dp: switch to kernel types > drm/i915/sprite: switch to kernel types > drm/i915/ddi: switch to kernel types > drm/i915/pm: switch to kernel types > drm/i915/i915_drv.h: switch to kernel types > drm/i915: start moving runtime device info to a separate struct > drm/i915/reg: abstract display_mmio_offset access > drm/i915: pass dev_priv to intel_device_info_runtime_init() > drm/i915: always use INTEL_INFO() to access device info > drm/i915: drop intel_device_info_dump() > drm/i915: rename dev_priv info to __info to avoid usage > drm/i915/color: switch to kernel types > drm/i915/crt: split out intel_crt_present() to platform specific setup > drm/i915/lvds: only call intel_lvds_init() on platforms that might have LVDS > drm/i915/lvds: nuke intel_lvds_supported() > drm/i915/tv: only call intel_tv_init() on platforms that might have TV > drm/i915: rename has_edp_a() to ilk_has_edp_a() > drm/i915: introduce REG_BIT() and REG_GENMASK() to define register contents > > José Roberto de Souza (15): > drm: Add the PSR SU granularity registers offsets > drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 > drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block > drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch > drm/i915/icl: Do not change reserved registers related to PSR2 > drm/i915: Remove old PSR2 FIXME about frontbuffer tracking > drm/i915/psr: Check if resolution is supported by default SU granularity > drm/i915/psr: Check if source supports sink specific SU granularity > drm/i915/icl: Fix VEBOX mismatch BUG_ON() > drm/i915: Call MG_DP_MODE() macro with the right parameters order > drm/i915/icl: Remove alpha support protection > drm/i915: Add new ICL PCI ID > drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time > drm/i915/psr: Move logic to get TPS registers values to another function > drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR1 > > Juha-Pekka Heikkila (3): > drm/i915: Add P010, P012, P016 plane control definitions > drm/i915: Preparations for enabling P010, P012, P016 formats > drm/i915: Enable P010, P012, P016 formats for primary and sprite planes > > Kevin Strasser (3): > drm/fourcc: Add 64 bpp half float formats > drm/i915: Refactor icl_is_hdr_plane > drm/i915/icl: Implement half float formats > > Lionel Landwerlin (2): > drm/i915: Record the sseu configuration per-context & engine > drm/i915/perf: lock powergating configuration to default when active > > Lucas De Marchi (22): > drm/i915: Rename IS_GEN to IS_GEN_RANGE > drm/i915: replace IS_GEN<N> with IS_GEN(..., N) > drm/i915: merge gen checks to use range > drm/i915: initialize unused MOCS entries to PTE > drm/i915: Simplify MOCS table definition > drm/i915: use a macro to define MOCS entries > drm/i915: keep track of used entries in MOCS table > drm/i915: cache number of MOCS entries > drm/i915/icl: use tc_port in MG_PLL macros > drm/i915/icl: remove dpll from clk_sel > drm/i915/icl: keep track of unused pll while looping > drm/i915/icl: move MG pll hw_state readout > drm/i915/skl: use previous pll hw readout > drm/i915/bxt: make bxt_calc_pll_link() similar to skl > drm/i915/cnl: use previous pll hw readout > drm/i915/icl: use previous pll hw readout > drm/i915/icl: reduce pll_id scope and use enum type > drm/i915/icl: split combo and mg pll enable > drm/i915/icl: split pll enable in three steps > drm/i915/icl: split combo and mg pll disable > drm/i915/icl: split combo and tbt pll funcs > drm/i915/icl: remove intel_dpll_is_combophy() > > Matt Roper (9): > drm: Add color management LUT validation helper (v4) > drm/i915: Validate userspace-provided color management LUT's (v4) > drm/i915: Use intel_ types more consistently for watermark code (v2) > drm/i915: Use intel_ types more consistently for color management code (v2) > drm/i915: Don't use DDB allocation when choosing gen9 watermark method > drm/i915: Switch to level-based DDB allocation algorithm (v5) > drm/i915: Don't forget to reset blocks when testing lower wm levels > drm/i915: Force background color to black for gen9+ (v2) > drm/i915: Apply LUT validation checks to platforms more accurately (v3) > > Michał Winiarski (1): > drm/i915/icl: Default to Thread Group preemption for compute workloads > > Mika Kuoppala (11): > drm/i915/icl: Forcibly evict stale csb entries > drm/i915/icl: Handle rps interrupts without irq lock > drm/i915/icl: Don't warn on spurious interrupts > drm/i915: Use dedicated rc6 enabling sequence for gen11 > drm/i915/icl: Apply a recommended rc6 threshold > drm/i915/icl: Enable media sampler powergate > drm/i915/icl: Disable video turbo mode for rp control > drm/i915: Use Engine1 instance for gen11 pm interrupts > drm/i915: Prepare for larger CSB status FIFO size > drm/i915/icl: Switch to using 12 deep CSB status FIFO > drm/i915: Disable read only ppgtt support for gen11 > > Oscar Mateo (2): > drm/i915/icl: Record the valid VDBoxes with SFC capability > drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines > > Paulo Zanoni (1): > drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ > > Randy Li (1): > drm/fourcc: Add new P010, P016 video format > > Rodrigo Vivi (2): > drm/i915: Yet another if/else sort of newer to older platforms. > drm/i915/gen11+: First assume next platforms will inherit stuff > > Swati Sharma (3): > drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc > drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions > drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes > > Talha Nassar (1): > drm/i915/icl: restore WaEnableFloatBlendOptimization > > Thomas Preston (1): > drm/i915/bios: assume eDP is present on port A when there is no VBT > > Tomasz Lis (2): > drm/i915/skl: Rework MOCS tables to keep common part in a define > drm/i915/icl: Define MOCS table for Icelake > > Tvrtko Ursulin (7): > drm/i915: Move workaround infrastructure code up > drm/i915: Save some lines of source code in workarounds > drm/i915/execlists: Move RPCS setup to context pin > drm/i915: Add timeline barrier support > drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) > drm/i915/selftests: Context SSEU reconfiguration tests > drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 > > Uma Shankar (8): > drm/i915/glk: Fix degamma lut programming > drm/i915/icl: Add icl pipe degamma and gamma support > drm/i915/icl: Enable ICL Pipe CSC block > drm/i915/icl: Enable pipe output csc > drm/i915/icl: Add degamma and gamma lut size to gen11 caps > drm/i915/icl: Drop redundant gamma mode mask > drm/i915: Fix GCMAX color register programming > drm/i915: Program EXT2 GC MAX registers > > Vandita Kulkarni (2): > drm/i915/icl: Ungate ddi clocks before IO enable > drm/i915/icl: Fix port disable sequence for mipi-dsi > > Ville Syrjälä (90): > drm: Constify drm_color_lut_check() > drm/i915: Use explicit old crtc state in skl_compute_wm() > drm/i915: Remove bogus FIXME from SKL wm computation > drm/i915: Remove dead update_wm_pre assignment from SKL wm code > drm/i915: Don't ignore level 0 lines watermark for glk+ > drm/i915: Reinstate an early latency==0 check for skl+ > drm/i915: Fix bits vs. bytes mixup in dbuf block size computation > drm/i915: Fix > vs >= mismatch in watermark/ddb calculations > drm/i915: Account for minimum ddb allocation restrictions > drm/i915: Pass dev_priv to skl_needs_memory_bw_wa() > drm/i915: Drop the definite article in front of SAGV > drm/i915: Drop the pointless linetime==0 check > drm/i915: Use IS_GEN9_LP() for the linetime w/a check > drm/i915: Don't use the second dbuf slice on icl > drm/i915: Pick the first unused PLL once again > drm/i915: Fix wm latency==0 disable on skl+ > drm/i915: Extract icl_set_pipe_chicken() > drm/i915: Setup PIPE_CHICKEN for fastsets too > drm/i915: Bump skl+ wm blocks to 11 bits > drm/i915: Just use icl+ definition for PLANE_WM blocks field > drm/i915: Don't set update_wm_post on g4x+ > drm/i915: Split the gamma/csc enable bits from the plane_ctl() function > drm/i915: Precompute gamma_mode > drm/i915: Constify the state arguments to the color management stuff > drm/i915: Pull GAMMA_MODE write out from haswell_load_luts() > drm/i915: Split color mgmt based on single vs. double buffered registers > drm/i915: Move LUT programming to happen after vblank waits > drm/i915: Populate gamma_mode for all platforms > drm/i915: Track pipe gamma enable/disable in crtc state > drm/i915: Track pipe csc enable in crtc state > drm/i915: Turn off pipe gamma when it's not needed > drm/i915: Turn off pipe CSC when it's not needed > drm/i915: Clean up intel_plane_atomic_check_with_state() > drm/i915: Disable pipe gamma when C8 pixel format is used > drm/i915: Update DSPCNTR gamma/csc bits during crtc_enable() > drm/i915: Dump skl+ watermark changes > drm/i915: Include "ignore lines" in skl+ wm state > drm/i915: Implement new w/a for underruns with wm1+ disabled > drm/i915: Remove the "pf" crc source > drm/i915: Use named initializers for the crc source name array > drm/i915: Remove the broken DP CRC support for g4x > drm/i915: Extend skl+ crc sources with more planes > drm/i915: Finalize Wa_1408961008:icl > drm/i915: Fix the state checker for ICL Y planes > drm/i915: Store DIMM rank information as a number > drm/i915: Extract functions to derive SKL+ DIMM info > drm/i915: Polish skl_is_16gb_dimm() > drm/i915: Extract BXT DIMM helpers > drm/i915: Fix DRAM size reporting for BXT > drm/i915: Extract DIMM info on GLK too > drm/i915: Use dram_dimm_info more > drm/i915: Generalize intel_is_dram_symmetric() > drm/i914: s/l_info/dimm_l/ etc. > drm/i915: Clean up intel_get_dram_info() a bit > drm/i915: Extract DIMM info on cnl+ > drm/i915: Read out memory type > drm/i915: Fix legacy gamma mode for ICL > drm/i915: Turn off the CUS when turning off a HDR plane > drm/i915: Nuke icl_calc_dp_combo_pll_link() > drm/i915: Readout and check csc_mode > drm/i915: Precompute/readout/check CHV CGM mode > drm/i915: Extract ilk_csc_limited_range() > drm/i915: Clean up ilk/icl pipe/output CSC programming > drm/i915: Extract ilk_csc_convert_ctm() > drm/i915: Clean the csc limited range/identity programming > drm/i915: Split ilk vs. icl csc matrix handling > drm/i915: Extract check_luts() > drm/i915: Turn intel_color_check() into a vfunc > drm/i915: Extract i9xx_color_check() > drm/i915: Extract chv_color_check() > drm/i915: Extract icl_color_check() > drm/i915: Extract glk_color_check() > drm/i915: Extract bdw_color_check() > drm/i915: Extract ilk_color_check() > drm/i915: Drop the pointless linear legacy LUT load on CHV > drm/i915: Skip the linear degamma LUT load on ICL+ > drm/i915: Suppress spurious combo PHY B warning > drm/i915: Fix ICL output CSC programming > drm/i915: Don't pass crtc to intel_find_shared_dpll() > drm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll() > drm/i915: Pass crtc_state down to skl dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from skl_get_dpll() > drm/i915: Pass crtc_state down to bxt dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from bxt_get_dpll() > drm/i915: Pass crtc_state down to cnl dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from cnl_get_dpll() > drm/i915: Pass crtc_state down to icl dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from icl_get_dpll() > drm/i915: Fix readout for cnl DPLL kdiv==3 > drm/i915: Remove the fragile array index -> link rate mapping > > drivers/gpu/drm/drm_color_mgmt.c | 43 ++ > drivers/gpu/drm/drm_fourcc.c | 19 + > drivers/gpu/drm/i915/gvt/vgpu.c | 4 +- > drivers/gpu/drm/i915/i915_cmd_parser.c | 2 +- > drivers/gpu/drm/i915/i915_debugfs.c | 83 ++-- > drivers/gpu/drm/i915/i915_drv.c | 479 ++++++++++++++------- > drivers/gpu/drm/i915/i915_drv.h | 363 ++++++++-------- > drivers/gpu/drm/i915/i915_gem.c | 32 +- > drivers/gpu/drm/i915/i915_gem_context.c | 367 +++++++++++++++- > drivers/gpu/drm/i915/i915_gem_context.h | 24 ++ > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 +- > drivers/gpu/drm/i915/i915_gem_fence_reg.c | 18 +- > drivers/gpu/drm/i915/i915_gem_gtt.c | 17 +- > drivers/gpu/drm/i915/i915_gem_stolen.c | 7 +- > drivers/gpu/drm/i915/i915_gem_tiling.c | 4 +- > drivers/gpu/drm/i915/i915_gpu_error.c | 37 +- > drivers/gpu/drm/i915/i915_gpu_error.h | 1 + > drivers/gpu/drm/i915/i915_irq.c | 192 +++++---- > drivers/gpu/drm/i915/i915_pci.c | 14 +- > drivers/gpu/drm/i915/i915_perf.c | 77 ++-- > drivers/gpu/drm/i915/i915_query.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 625 +++++++++++++++++---------- > drivers/gpu/drm/i915/i915_request.c | 197 +++------ > drivers/gpu/drm/i915/i915_suspend.c | 12 +- > drivers/gpu/drm/i915/i915_timeline.c | 21 + > drivers/gpu/drm/i915/i915_timeline.h | 26 +- > drivers/gpu/drm/i915/i915_trace.h | 29 -- > drivers/gpu/drm/i915/icl_dsi.c | 21 +- > drivers/gpu/drm/i915/intel_atomic.c | 9 +- > drivers/gpu/drm/i915/intel_atomic_plane.c | 45 +- > drivers/gpu/drm/i915/intel_audio.c | 2 +- > drivers/gpu/drm/i915/intel_bios.c | 59 ++- > drivers/gpu/drm/i915/intel_breadcrumbs.c | 17 +- > drivers/gpu/drm/i915/intel_cdclk.c | 92 ++-- > drivers/gpu/drm/i915/intel_color.c | 1146 ++++++++++++++++++++++++++++++++++--------------- > drivers/gpu/drm/i915/intel_combo_phy.c | 3 +- > drivers/gpu/drm/i915/intel_crt.c | 28 +- > drivers/gpu/drm/i915/intel_ddi.c | 396 ++++++++--------- > drivers/gpu/drm/i915/intel_device_info.c | 105 +++-- > drivers/gpu/drm/i915/intel_device_info.h | 32 +- > drivers/gpu/drm/i915/intel_display.c | 654 ++++++++++++++++++++-------- > drivers/gpu/drm/i915/intel_display.h | 6 +- > drivers/gpu/drm/i915/intel_dp.c | 227 +++++----- > drivers/gpu/drm/i915/intel_dp_link_training.c | 32 +- > drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- > drivers/gpu/drm/i915/intel_dpio_phy.c | 18 +- > drivers/gpu/drm/i915/intel_dpll_mgr.c | 939 ++++++++++++++++++++-------------------- > drivers/gpu/drm/i915/intel_dpll_mgr.h | 58 ++- > drivers/gpu/drm/i915/intel_drv.h | 53 ++- > drivers/gpu/drm/i915/intel_dsi_vbt.c | 6 +- > drivers/gpu/drm/i915/intel_engine_cs.c | 85 ++-- > drivers/gpu/drm/i915/intel_fbc.c | 26 +- > drivers/gpu/drm/i915/intel_fifo_underrun.c | 18 +- > drivers/gpu/drm/i915/intel_guc_fw.c | 2 +- > drivers/gpu/drm/i915/intel_hangcheck.c | 157 +------ > drivers/gpu/drm/i915/intel_hdcp.c | 4 +- > drivers/gpu/drm/i915/intel_hdmi.c | 4 +- > drivers/gpu/drm/i915/intel_lrc.c | 156 +++++-- > drivers/gpu/drm/i915/intel_lrc.h | 15 +- > drivers/gpu/drm/i915/intel_lspcon.c | 20 +- > drivers/gpu/drm/i915/intel_lvds.c | 27 +- > drivers/gpu/drm/i915/intel_mocs.c | 408 +++++++++++------- > drivers/gpu/drm/i915/intel_overlay.c | 10 +- > drivers/gpu/drm/i915/intel_panel.c | 8 +- > drivers/gpu/drm/i915/intel_pipe_crc.c | 201 ++++----- > drivers/gpu/drm/i915/intel_pm.c | 1256 +++++++++++++++++++++++++++++------------------------- > drivers/gpu/drm/i915/intel_psr.c | 139 ++++-- > drivers/gpu/drm/i915/intel_ringbuffer.c | 183 +------- > drivers/gpu/drm/i915/intel_ringbuffer.h | 72 +--- > drivers/gpu/drm/i915/intel_runtime_pm.c | 36 +- > drivers/gpu/drm/i915/intel_sprite.c | 320 +++++++++++--- > drivers/gpu/drm/i915/intel_uc.c | 2 +- > drivers/gpu/drm/i915/intel_uncore.c | 147 ++++++- > drivers/gpu/drm/i915/intel_vbt_defs.h | 3 + > drivers/gpu/drm/i915/intel_wopcm.c | 4 +- > drivers/gpu/drm/i915/intel_workarounds.c | 158 +++---- > drivers/gpu/drm/i915/selftests/i915_gem_context.c | 470 +++++++++++++++++++- > drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 197 +++++++++ > drivers/gpu/drm/i915/selftests/intel_lrc.c | 4 +- > drivers/gpu/drm/i915/selftests/mock_context.c | 7 +- > drivers/gpu/drm/i915/selftests/mock_engine.c | 1 - > drivers/gpu/drm/i915/selftests/mock_timeline.c | 1 + > include/drm/drm_color_mgmt.h | 28 ++ > include/drm/drm_dp_helper.h | 4 + > include/drm/i915_pciids.h | 3 +- > include/uapi/drm/drm_fourcc.h | 48 +++ > include/uapi/drm/i915_drm.h | 64 +++ > 87 files changed, 6806 insertions(+), 4131 deletions(-) > >
On Wed, 12 Jun 2019 at 17:13, Timo Aaltonen <tjaalton@ubuntu.com> wrote: > > > BugLink: http://bugs.launchpad.net/bugs/1825940 > > [Impact] > Ice Lake (ICL) graphics needs to be enabled for OEM OSP1 image which is based on 18.04.3 graphics stack with linux-oem-osp1 kernel. > > [Test case] > The usual desktop usage, graphics tests etc. > > [Regression potential] > Linux-oem-osp1 kernel is a new kernel used only on new OEM enablements, and it can't regress any currently running system. > > > The following changes since commit 3e73c1d558edf70f0186fd03cebd7892df4081b1: > > UBUNTU: Ubuntu-oem-osp1-5.0.0-1008.9 (2019-05-26 21:58:43 +0300) > > are available in the Git repository at: > > https://git.launchpad.net/~tjaalton/ubuntu/+source/linux icl5 > > for you to fetch changes up to 1f44f47ac4c715df1e1dafcd9de1697f5732106b: > > drm/i915: Remove the fragile array index -> link rate mapping (2019-06-12 11:52:04 +0300) > > ---------------------------------------------------------------- > Aditya Swarup (3): > drm/i915: Make combo PHY DDI macro definitions consistent for ICL and CNL > drm/i915: Make MG PHY macros semantically consistent > drm/i915/icl: Fix CRC mismatch error for DP link layer compliance > > Bob Paauwe (1): > drm/i915: DFSM pipe disable is valid from gen9 onwards (v2) > > Chris Wilson (11): > drm/i915/selftests: Check we can recover a wedged device > drm/i915/selftests: Verify we can perform resets from atomic context > drm/i915: Limit the for_each_set_bit() to the valid range > drm/i915: Use b->irq_enable() as predicate for mock engine > drm/i915: Restrict PSMI context load w/a to Haswell GT1 > drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation > drm/i915: Refactor out intel_context_init() > drm/i915: De-inline intel_context_init() > drm/i915: Push EMIT_INVALIDATE at request start to backends > drm/i915: Reduce i915_request_alloc retirement to local context > drm/i915: Fix Cherryview oops on boot > > Clint Taylor (1): > drm/i915/hdmi: SCDC Scrambling enable without CTS mode > > Daniele Ceraolo Spurio (1): > drm/i915/icl: do a posting read after irq install > > Imre Deak (10): > drm/i915/icl: Add a debug print for TypeC port disconnection > drm/i915/bios: Parse the VBT TypeC and Thunderbolt port flags > drm/i915/icl: Fix HPD handling for TypeC legacy ports > drm/i915/icl: Add fallback detection method for TypeC legacy ports > drm/i915/ddi: Move DDI port detection to the corresponding helper > drm/i915/icl: Detect port F presence via VBT > drm/i915/icl: Work around broken VBTs for port F detection > drm/i915/icl: Add TypeC ports only if VBT is present > drm/i915/icl: Prevent incorrect DBuf enabling > drm/i915/icl: Fix MG_DP_MODE() register programming > > Jani Nikula (25): > drm/i915: small isolated c99 types to kernel types switch > drm/i915/crt: switch to kernel types > drm/i915/lspcon: switch to kernel types > drm/i915/debugfs: switch to kernel types > drm/i915/irq: switch to kernel types > drm/i915/cdclk: switch to kernel types > drm/i915/dpll_mgr: switch to kernel types > drm/i915/dp: switch to kernel types > drm/i915/sprite: switch to kernel types > drm/i915/ddi: switch to kernel types > drm/i915/pm: switch to kernel types > drm/i915/i915_drv.h: switch to kernel types > drm/i915: start moving runtime device info to a separate struct > drm/i915/reg: abstract display_mmio_offset access > drm/i915: pass dev_priv to intel_device_info_runtime_init() > drm/i915: always use INTEL_INFO() to access device info > drm/i915: drop intel_device_info_dump() > drm/i915: rename dev_priv info to __info to avoid usage > drm/i915/color: switch to kernel types > drm/i915/crt: split out intel_crt_present() to platform specific setup > drm/i915/lvds: only call intel_lvds_init() on platforms that might have LVDS > drm/i915/lvds: nuke intel_lvds_supported() > drm/i915/tv: only call intel_tv_init() on platforms that might have TV > drm/i915: rename has_edp_a() to ilk_has_edp_a() > drm/i915: introduce REG_BIT() and REG_GENMASK() to define register contents > > José Roberto de Souza (15): > drm: Add the PSR SU granularity registers offsets > drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 > drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block > drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch > drm/i915/icl: Do not change reserved registers related to PSR2 > drm/i915: Remove old PSR2 FIXME about frontbuffer tracking > drm/i915/psr: Check if resolution is supported by default SU granularity > drm/i915/psr: Check if source supports sink specific SU granularity > drm/i915/icl: Fix VEBOX mismatch BUG_ON() > drm/i915: Call MG_DP_MODE() macro with the right parameters order > drm/i915/icl: Remove alpha support protection > drm/i915: Add new ICL PCI ID > drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time > drm/i915/psr: Move logic to get TPS registers values to another function > drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR1 > > Juha-Pekka Heikkila (3): > drm/i915: Add P010, P012, P016 plane control definitions > drm/i915: Preparations for enabling P010, P012, P016 formats > drm/i915: Enable P010, P012, P016 formats for primary and sprite planes > > Kevin Strasser (3): > drm/fourcc: Add 64 bpp half float formats > drm/i915: Refactor icl_is_hdr_plane > drm/i915/icl: Implement half float formats > > Lionel Landwerlin (2): > drm/i915: Record the sseu configuration per-context & engine > drm/i915/perf: lock powergating configuration to default when active > > Lucas De Marchi (22): > drm/i915: Rename IS_GEN to IS_GEN_RANGE > drm/i915: replace IS_GEN<N> with IS_GEN(..., N) > drm/i915: merge gen checks to use range > drm/i915: initialize unused MOCS entries to PTE > drm/i915: Simplify MOCS table definition > drm/i915: use a macro to define MOCS entries > drm/i915: keep track of used entries in MOCS table > drm/i915: cache number of MOCS entries > drm/i915/icl: use tc_port in MG_PLL macros > drm/i915/icl: remove dpll from clk_sel > drm/i915/icl: keep track of unused pll while looping > drm/i915/icl: move MG pll hw_state readout > drm/i915/skl: use previous pll hw readout > drm/i915/bxt: make bxt_calc_pll_link() similar to skl > drm/i915/cnl: use previous pll hw readout > drm/i915/icl: use previous pll hw readout > drm/i915/icl: reduce pll_id scope and use enum type > drm/i915/icl: split combo and mg pll enable > drm/i915/icl: split pll enable in three steps > drm/i915/icl: split combo and mg pll disable > drm/i915/icl: split combo and tbt pll funcs > drm/i915/icl: remove intel_dpll_is_combophy() > > Matt Roper (9): > drm: Add color management LUT validation helper (v4) > drm/i915: Validate userspace-provided color management LUT's (v4) > drm/i915: Use intel_ types more consistently for watermark code (v2) > drm/i915: Use intel_ types more consistently for color management code (v2) > drm/i915: Don't use DDB allocation when choosing gen9 watermark method > drm/i915: Switch to level-based DDB allocation algorithm (v5) > drm/i915: Don't forget to reset blocks when testing lower wm levels > drm/i915: Force background color to black for gen9+ (v2) > drm/i915: Apply LUT validation checks to platforms more accurately (v3) > > Michał Winiarski (1): > drm/i915/icl: Default to Thread Group preemption for compute workloads > > Mika Kuoppala (11): > drm/i915/icl: Forcibly evict stale csb entries > drm/i915/icl: Handle rps interrupts without irq lock > drm/i915/icl: Don't warn on spurious interrupts > drm/i915: Use dedicated rc6 enabling sequence for gen11 > drm/i915/icl: Apply a recommended rc6 threshold > drm/i915/icl: Enable media sampler powergate > drm/i915/icl: Disable video turbo mode for rp control > drm/i915: Use Engine1 instance for gen11 pm interrupts > drm/i915: Prepare for larger CSB status FIFO size > drm/i915/icl: Switch to using 12 deep CSB status FIFO > drm/i915: Disable read only ppgtt support for gen11 > > Oscar Mateo (2): > drm/i915/icl: Record the valid VDBoxes with SFC capability > drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines > > Paulo Zanoni (1): > drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ > > Randy Li (1): > drm/fourcc: Add new P010, P016 video format > > Rodrigo Vivi (2): > drm/i915: Yet another if/else sort of newer to older platforms. > drm/i915/gen11+: First assume next platforms will inherit stuff > > Swati Sharma (3): > drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc > drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions > drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes > > Talha Nassar (1): > drm/i915/icl: restore WaEnableFloatBlendOptimization > > Thomas Preston (1): > drm/i915/bios: assume eDP is present on port A when there is no VBT > > Tomasz Lis (2): > drm/i915/skl: Rework MOCS tables to keep common part in a define > drm/i915/icl: Define MOCS table for Icelake > > Tvrtko Ursulin (7): > drm/i915: Move workaround infrastructure code up > drm/i915: Save some lines of source code in workarounds > drm/i915/execlists: Move RPCS setup to context pin > drm/i915: Add timeline barrier support > drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) > drm/i915/selftests: Context SSEU reconfiguration tests > drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 > > Uma Shankar (8): > drm/i915/glk: Fix degamma lut programming > drm/i915/icl: Add icl pipe degamma and gamma support > drm/i915/icl: Enable ICL Pipe CSC block > drm/i915/icl: Enable pipe output csc > drm/i915/icl: Add degamma and gamma lut size to gen11 caps > drm/i915/icl: Drop redundant gamma mode mask > drm/i915: Fix GCMAX color register programming > drm/i915: Program EXT2 GC MAX registers > > Vandita Kulkarni (2): > drm/i915/icl: Ungate ddi clocks before IO enable > drm/i915/icl: Fix port disable sequence for mipi-dsi > > Ville Syrjälä (90): > drm: Constify drm_color_lut_check() > drm/i915: Use explicit old crtc state in skl_compute_wm() > drm/i915: Remove bogus FIXME from SKL wm computation > drm/i915: Remove dead update_wm_pre assignment from SKL wm code > drm/i915: Don't ignore level 0 lines watermark for glk+ > drm/i915: Reinstate an early latency==0 check for skl+ > drm/i915: Fix bits vs. bytes mixup in dbuf block size computation > drm/i915: Fix > vs >= mismatch in watermark/ddb calculations > drm/i915: Account for minimum ddb allocation restrictions > drm/i915: Pass dev_priv to skl_needs_memory_bw_wa() > drm/i915: Drop the definite article in front of SAGV > drm/i915: Drop the pointless linetime==0 check > drm/i915: Use IS_GEN9_LP() for the linetime w/a check > drm/i915: Don't use the second dbuf slice on icl > drm/i915: Pick the first unused PLL once again > drm/i915: Fix wm latency==0 disable on skl+ > drm/i915: Extract icl_set_pipe_chicken() > drm/i915: Setup PIPE_CHICKEN for fastsets too > drm/i915: Bump skl+ wm blocks to 11 bits > drm/i915: Just use icl+ definition for PLANE_WM blocks field > drm/i915: Don't set update_wm_post on g4x+ > drm/i915: Split the gamma/csc enable bits from the plane_ctl() function > drm/i915: Precompute gamma_mode > drm/i915: Constify the state arguments to the color management stuff > drm/i915: Pull GAMMA_MODE write out from haswell_load_luts() > drm/i915: Split color mgmt based on single vs. double buffered registers > drm/i915: Move LUT programming to happen after vblank waits > drm/i915: Populate gamma_mode for all platforms > drm/i915: Track pipe gamma enable/disable in crtc state > drm/i915: Track pipe csc enable in crtc state > drm/i915: Turn off pipe gamma when it's not needed > drm/i915: Turn off pipe CSC when it's not needed > drm/i915: Clean up intel_plane_atomic_check_with_state() > drm/i915: Disable pipe gamma when C8 pixel format is used > drm/i915: Update DSPCNTR gamma/csc bits during crtc_enable() > drm/i915: Dump skl+ watermark changes > drm/i915: Include "ignore lines" in skl+ wm state > drm/i915: Implement new w/a for underruns with wm1+ disabled > drm/i915: Remove the "pf" crc source > drm/i915: Use named initializers for the crc source name array > drm/i915: Remove the broken DP CRC support for g4x > drm/i915: Extend skl+ crc sources with more planes > drm/i915: Finalize Wa_1408961008:icl > drm/i915: Fix the state checker for ICL Y planes > drm/i915: Store DIMM rank information as a number > drm/i915: Extract functions to derive SKL+ DIMM info > drm/i915: Polish skl_is_16gb_dimm() > drm/i915: Extract BXT DIMM helpers > drm/i915: Fix DRAM size reporting for BXT > drm/i915: Extract DIMM info on GLK too > drm/i915: Use dram_dimm_info more > drm/i915: Generalize intel_is_dram_symmetric() > drm/i914: s/l_info/dimm_l/ etc. > drm/i915: Clean up intel_get_dram_info() a bit > drm/i915: Extract DIMM info on cnl+ > drm/i915: Read out memory type > drm/i915: Fix legacy gamma mode for ICL > drm/i915: Turn off the CUS when turning off a HDR plane > drm/i915: Nuke icl_calc_dp_combo_pll_link() > drm/i915: Readout and check csc_mode > drm/i915: Precompute/readout/check CHV CGM mode > drm/i915: Extract ilk_csc_limited_range() > drm/i915: Clean up ilk/icl pipe/output CSC programming > drm/i915: Extract ilk_csc_convert_ctm() > drm/i915: Clean the csc limited range/identity programming > drm/i915: Split ilk vs. icl csc matrix handling > drm/i915: Extract check_luts() > drm/i915: Turn intel_color_check() into a vfunc > drm/i915: Extract i9xx_color_check() > drm/i915: Extract chv_color_check() > drm/i915: Extract icl_color_check() > drm/i915: Extract glk_color_check() > drm/i915: Extract bdw_color_check() > drm/i915: Extract ilk_color_check() > drm/i915: Drop the pointless linear legacy LUT load on CHV > drm/i915: Skip the linear degamma LUT load on ICL+ > drm/i915: Suppress spurious combo PHY B warning > drm/i915: Fix ICL output CSC programming > drm/i915: Don't pass crtc to intel_find_shared_dpll() > drm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll() > drm/i915: Pass crtc_state down to skl dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from skl_get_dpll() > drm/i915: Pass crtc_state down to bxt dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from bxt_get_dpll() > drm/i915: Pass crtc_state down to cnl dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from cnl_get_dpll() > drm/i915: Pass crtc_state down to icl dpll funcs > drm/i915: Remove redundant on stack dpll_hw_state from icl_get_dpll() > drm/i915: Fix readout for cnl DPLL kdiv==3 > drm/i915: Remove the fragile array index -> link rate mapping > > drivers/gpu/drm/drm_color_mgmt.c | 43 ++ > drivers/gpu/drm/drm_fourcc.c | 19 + > drivers/gpu/drm/i915/gvt/vgpu.c | 4 +- > drivers/gpu/drm/i915/i915_cmd_parser.c | 2 +- > drivers/gpu/drm/i915/i915_debugfs.c | 83 ++-- > drivers/gpu/drm/i915/i915_drv.c | 479 ++++++++++++++------- > drivers/gpu/drm/i915/i915_drv.h | 363 ++++++++-------- > drivers/gpu/drm/i915/i915_gem.c | 32 +- > drivers/gpu/drm/i915/i915_gem_context.c | 367 +++++++++++++++- > drivers/gpu/drm/i915/i915_gem_context.h | 24 ++ > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 +- > drivers/gpu/drm/i915/i915_gem_fence_reg.c | 18 +- > drivers/gpu/drm/i915/i915_gem_gtt.c | 17 +- > drivers/gpu/drm/i915/i915_gem_stolen.c | 7 +- > drivers/gpu/drm/i915/i915_gem_tiling.c | 4 +- > drivers/gpu/drm/i915/i915_gpu_error.c | 37 +- > drivers/gpu/drm/i915/i915_gpu_error.h | 1 + > drivers/gpu/drm/i915/i915_irq.c | 192 +++++---- > drivers/gpu/drm/i915/i915_pci.c | 14 +- > drivers/gpu/drm/i915/i915_perf.c | 77 ++-- > drivers/gpu/drm/i915/i915_query.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 625 +++++++++++++++++---------- > drivers/gpu/drm/i915/i915_request.c | 197 +++------ > drivers/gpu/drm/i915/i915_suspend.c | 12 +- > drivers/gpu/drm/i915/i915_timeline.c | 21 + > drivers/gpu/drm/i915/i915_timeline.h | 26 +- > drivers/gpu/drm/i915/i915_trace.h | 29 -- > drivers/gpu/drm/i915/icl_dsi.c | 21 +- > drivers/gpu/drm/i915/intel_atomic.c | 9 +- > drivers/gpu/drm/i915/intel_atomic_plane.c | 45 +- > drivers/gpu/drm/i915/intel_audio.c | 2 +- > drivers/gpu/drm/i915/intel_bios.c | 59 ++- > drivers/gpu/drm/i915/intel_breadcrumbs.c | 17 +- > drivers/gpu/drm/i915/intel_cdclk.c | 92 ++-- > drivers/gpu/drm/i915/intel_color.c | 1146 ++++++++++++++++++++++++++++++++++--------------- > drivers/gpu/drm/i915/intel_combo_phy.c | 3 +- > drivers/gpu/drm/i915/intel_crt.c | 28 +- > drivers/gpu/drm/i915/intel_ddi.c | 396 ++++++++--------- > drivers/gpu/drm/i915/intel_device_info.c | 105 +++-- > drivers/gpu/drm/i915/intel_device_info.h | 32 +- > drivers/gpu/drm/i915/intel_display.c | 654 ++++++++++++++++++++-------- > drivers/gpu/drm/i915/intel_display.h | 6 +- > drivers/gpu/drm/i915/intel_dp.c | 227 +++++----- > drivers/gpu/drm/i915/intel_dp_link_training.c | 32 +- > drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- > drivers/gpu/drm/i915/intel_dpio_phy.c | 18 +- > drivers/gpu/drm/i915/intel_dpll_mgr.c | 939 ++++++++++++++++++++-------------------- > drivers/gpu/drm/i915/intel_dpll_mgr.h | 58 ++- > drivers/gpu/drm/i915/intel_drv.h | 53 ++- > drivers/gpu/drm/i915/intel_dsi_vbt.c | 6 +- > drivers/gpu/drm/i915/intel_engine_cs.c | 85 ++-- > drivers/gpu/drm/i915/intel_fbc.c | 26 +- > drivers/gpu/drm/i915/intel_fifo_underrun.c | 18 +- > drivers/gpu/drm/i915/intel_guc_fw.c | 2 +- > drivers/gpu/drm/i915/intel_hangcheck.c | 157 +------ > drivers/gpu/drm/i915/intel_hdcp.c | 4 +- > drivers/gpu/drm/i915/intel_hdmi.c | 4 +- > drivers/gpu/drm/i915/intel_lrc.c | 156 +++++-- > drivers/gpu/drm/i915/intel_lrc.h | 15 +- > drivers/gpu/drm/i915/intel_lspcon.c | 20 +- > drivers/gpu/drm/i915/intel_lvds.c | 27 +- > drivers/gpu/drm/i915/intel_mocs.c | 408 +++++++++++------- > drivers/gpu/drm/i915/intel_overlay.c | 10 +- > drivers/gpu/drm/i915/intel_panel.c | 8 +- > drivers/gpu/drm/i915/intel_pipe_crc.c | 201 ++++----- > drivers/gpu/drm/i915/intel_pm.c | 1256 +++++++++++++++++++++++++++++------------------------- > drivers/gpu/drm/i915/intel_psr.c | 139 ++++-- > drivers/gpu/drm/i915/intel_ringbuffer.c | 183 +------- > drivers/gpu/drm/i915/intel_ringbuffer.h | 72 +--- > drivers/gpu/drm/i915/intel_runtime_pm.c | 36 +- > drivers/gpu/drm/i915/intel_sprite.c | 320 +++++++++++--- > drivers/gpu/drm/i915/intel_uc.c | 2 +- > drivers/gpu/drm/i915/intel_uncore.c | 147 ++++++- > drivers/gpu/drm/i915/intel_vbt_defs.h | 3 + > drivers/gpu/drm/i915/intel_wopcm.c | 4 +- > drivers/gpu/drm/i915/intel_workarounds.c | 158 +++---- > drivers/gpu/drm/i915/selftests/i915_gem_context.c | 470 +++++++++++++++++++- > drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 197 +++++++++ > drivers/gpu/drm/i915/selftests/intel_lrc.c | 4 +- > drivers/gpu/drm/i915/selftests/mock_context.c | 7 +- > drivers/gpu/drm/i915/selftests/mock_engine.c | 1 - > drivers/gpu/drm/i915/selftests/mock_timeline.c | 1 + > include/drm/drm_color_mgmt.h | 28 ++ > include/drm/drm_dp_helper.h | 4 + > include/drm/i915_pciids.h | 3 +- > include/uapi/drm/drm_fourcc.h | 48 +++ > include/uapi/drm/i915_drm.h | 64 +++ > 87 files changed, 6806 insertions(+), 4131 deletions(-) Needed by new platforms and ICL graphics is the purpose of this new kernel. Acked-by: Anthony Wong <anthony.wong@canonical.com>
On 12.6.2019 12.12, Timo Aaltonen wrote: > > BugLink: http://bugs.launchpad.net/bugs/1825940 > > [Impact] > Ice Lake (ICL) graphics needs to be enabled for OEM OSP1 image which is based on 18.04.3 graphics stack with linux-oem-osp1 kernel. this was applied..
BugLink: http://bugs.launchpad.net/bugs/1825940 [Impact] Ice Lake (ICL) graphics needs to be enabled for OEM OSP1 image which is based on 18.04.3 graphics stack with linux-oem-osp1 kernel. [Test case] The usual desktop usage, graphics tests etc. [Regression potential] Linux-oem-osp1 kernel is a new kernel used only on new OEM enablements, and it can't regress any currently running system. The following changes since commit 3e73c1d558edf70f0186fd03cebd7892df4081b1: UBUNTU: Ubuntu-oem-osp1-5.0.0-1008.9 (2019-05-26 21:58:43 +0300) are available in the Git repository at: https://git.launchpad.net/~tjaalton/ubuntu/+source/linux icl5 for you to fetch changes up to 1f44f47ac4c715df1e1dafcd9de1697f5732106b: drm/i915: Remove the fragile array index -> link rate mapping (2019-06-12 11:52:04 +0300) ---------------------------------------------------------------- Aditya Swarup (3): drm/i915: Make combo PHY DDI macro definitions consistent for ICL and CNL drm/i915: Make MG PHY macros semantically consistent drm/i915/icl: Fix CRC mismatch error for DP link layer compliance Bob Paauwe (1): drm/i915: DFSM pipe disable is valid from gen9 onwards (v2) Chris Wilson (11): drm/i915/selftests: Check we can recover a wedged device drm/i915/selftests: Verify we can perform resets from atomic context drm/i915: Limit the for_each_set_bit() to the valid range drm/i915: Use b->irq_enable() as predicate for mock engine drm/i915: Restrict PSMI context load w/a to Haswell GT1 drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation drm/i915: Refactor out intel_context_init() drm/i915: De-inline intel_context_init() drm/i915: Push EMIT_INVALIDATE at request start to backends drm/i915: Reduce i915_request_alloc retirement to local context drm/i915: Fix Cherryview oops on boot Clint Taylor (1): drm/i915/hdmi: SCDC Scrambling enable without CTS mode Daniele Ceraolo Spurio (1): drm/i915/icl: do a posting read after irq install Imre Deak (10): drm/i915/icl: Add a debug print for TypeC port disconnection drm/i915/bios: Parse the VBT TypeC and Thunderbolt port flags drm/i915/icl: Fix HPD handling for TypeC legacy ports drm/i915/icl: Add fallback detection method for TypeC legacy ports drm/i915/ddi: Move DDI port detection to the corresponding helper drm/i915/icl: Detect port F presence via VBT drm/i915/icl: Work around broken VBTs for port F detection drm/i915/icl: Add TypeC ports only if VBT is present drm/i915/icl: Prevent incorrect DBuf enabling drm/i915/icl: Fix MG_DP_MODE() register programming Jani Nikula (25): drm/i915: small isolated c99 types to kernel types switch drm/i915/crt: switch to kernel types drm/i915/lspcon: switch to kernel types drm/i915/debugfs: switch to kernel types drm/i915/irq: switch to kernel types drm/i915/cdclk: switch to kernel types drm/i915/dpll_mgr: switch to kernel types drm/i915/dp: switch to kernel types drm/i915/sprite: switch to kernel types drm/i915/ddi: switch to kernel types drm/i915/pm: switch to kernel types drm/i915/i915_drv.h: switch to kernel types drm/i915: start moving runtime device info to a separate struct drm/i915/reg: abstract display_mmio_offset access drm/i915: pass dev_priv to intel_device_info_runtime_init() drm/i915: always use INTEL_INFO() to access device info drm/i915: drop intel_device_info_dump() drm/i915: rename dev_priv info to __info to avoid usage drm/i915/color: switch to kernel types drm/i915/crt: split out intel_crt_present() to platform specific setup drm/i915/lvds: only call intel_lvds_init() on platforms that might have LVDS drm/i915/lvds: nuke intel_lvds_supported() drm/i915/tv: only call intel_tv_init() on platforms that might have TV drm/i915: rename has_edp_a() to ilk_has_edp_a() drm/i915: introduce REG_BIT() and REG_GENMASK() to define register contents José Roberto de Souza (15): drm: Add the PSR SU granularity registers offsets drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch drm/i915/icl: Do not change reserved registers related to PSR2 drm/i915: Remove old PSR2 FIXME about frontbuffer tracking drm/i915/psr: Check if resolution is supported by default SU granularity drm/i915/psr: Check if source supports sink specific SU granularity drm/i915/icl: Fix VEBOX mismatch BUG_ON() drm/i915: Call MG_DP_MODE() macro with the right parameters order drm/i915/icl: Remove alpha support protection drm/i915: Add new ICL PCI ID drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time drm/i915/psr: Move logic to get TPS registers values to another function drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR1 Juha-Pekka Heikkila (3): drm/i915: Add P010, P012, P016 plane control definitions drm/i915: Preparations for enabling P010, P012, P016 formats drm/i915: Enable P010, P012, P016 formats for primary and sprite planes Kevin Strasser (3): drm/fourcc: Add 64 bpp half float formats drm/i915: Refactor icl_is_hdr_plane drm/i915/icl: Implement half float formats Lionel Landwerlin (2): drm/i915: Record the sseu configuration per-context & engine drm/i915/perf: lock powergating configuration to default when active Lucas De Marchi (22): drm/i915: Rename IS_GEN to IS_GEN_RANGE drm/i915: replace IS_GEN<N> with IS_GEN(..., N) drm/i915: merge gen checks to use range drm/i915: initialize unused MOCS entries to PTE drm/i915: Simplify MOCS table definition drm/i915: use a macro to define MOCS entries drm/i915: keep track of used entries in MOCS table drm/i915: cache number of MOCS entries drm/i915/icl: use tc_port in MG_PLL macros drm/i915/icl: remove dpll from clk_sel drm/i915/icl: keep track of unused pll while looping drm/i915/icl: move MG pll hw_state readout drm/i915/skl: use previous pll hw readout drm/i915/bxt: make bxt_calc_pll_link() similar to skl drm/i915/cnl: use previous pll hw readout drm/i915/icl: use previous pll hw readout drm/i915/icl: reduce pll_id scope and use enum type drm/i915/icl: split combo and mg pll enable drm/i915/icl: split pll enable in three steps drm/i915/icl: split combo and mg pll disable drm/i915/icl: split combo and tbt pll funcs drm/i915/icl: remove intel_dpll_is_combophy() Matt Roper (9): drm: Add color management LUT validation helper (v4) drm/i915: Validate userspace-provided color management LUT's (v4) drm/i915: Use intel_ types more consistently for watermark code (v2) drm/i915: Use intel_ types more consistently for color management code (v2) drm/i915: Don't use DDB allocation when choosing gen9 watermark method drm/i915: Switch to level-based DDB allocation algorithm (v5) drm/i915: Don't forget to reset blocks when testing lower wm levels drm/i915: Force background color to black for gen9+ (v2) drm/i915: Apply LUT validation checks to platforms more accurately (v3) Michał Winiarski (1): drm/i915/icl: Default to Thread Group preemption for compute workloads Mika Kuoppala (11): drm/i915/icl: Forcibly evict stale csb entries drm/i915/icl: Handle rps interrupts without irq lock drm/i915/icl: Don't warn on spurious interrupts drm/i915: Use dedicated rc6 enabling sequence for gen11 drm/i915/icl: Apply a recommended rc6 threshold drm/i915/icl: Enable media sampler powergate drm/i915/icl: Disable video turbo mode for rp control drm/i915: Use Engine1 instance for gen11 pm interrupts drm/i915: Prepare for larger CSB status FIFO size drm/i915/icl: Switch to using 12 deep CSB status FIFO drm/i915: Disable read only ppgtt support for gen11 Oscar Mateo (2): drm/i915/icl: Record the valid VDBoxes with SFC capability drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines Paulo Zanoni (1): drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ Randy Li (1): drm/fourcc: Add new P010, P016 video format Rodrigo Vivi (2): drm/i915: Yet another if/else sort of newer to older platforms. drm/i915/gen11+: First assume next platforms will inherit stuff Swati Sharma (3): drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes Talha Nassar (1): drm/i915/icl: restore WaEnableFloatBlendOptimization Thomas Preston (1): drm/i915/bios: assume eDP is present on port A when there is no VBT Tomasz Lis (2): drm/i915/skl: Rework MOCS tables to keep common part in a define drm/i915/icl: Define MOCS table for Icelake Tvrtko Ursulin (7): drm/i915: Move workaround infrastructure code up drm/i915: Save some lines of source code in workarounds drm/i915/execlists: Move RPCS setup to context pin drm/i915: Add timeline barrier support drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) drm/i915/selftests: Context SSEU reconfiguration tests drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Uma Shankar (8): drm/i915/glk: Fix degamma lut programming drm/i915/icl: Add icl pipe degamma and gamma support drm/i915/icl: Enable ICL Pipe CSC block drm/i915/icl: Enable pipe output csc drm/i915/icl: Add degamma and gamma lut size to gen11 caps drm/i915/icl: Drop redundant gamma mode mask drm/i915: Fix GCMAX color register programming drm/i915: Program EXT2 GC MAX registers Vandita Kulkarni (2): drm/i915/icl: Ungate ddi clocks before IO enable drm/i915/icl: Fix port disable sequence for mipi-dsi Ville Syrjälä (90): drm: Constify drm_color_lut_check() drm/i915: Use explicit old crtc state in skl_compute_wm() drm/i915: Remove bogus FIXME from SKL wm computation drm/i915: Remove dead update_wm_pre assignment from SKL wm code drm/i915: Don't ignore level 0 lines watermark for glk+ drm/i915: Reinstate an early latency==0 check for skl+ drm/i915: Fix bits vs. bytes mixup in dbuf block size computation drm/i915: Fix > vs >= mismatch in watermark/ddb calculations drm/i915: Account for minimum ddb allocation restrictions drm/i915: Pass dev_priv to skl_needs_memory_bw_wa() drm/i915: Drop the definite article in front of SAGV drm/i915: Drop the pointless linetime==0 check drm/i915: Use IS_GEN9_LP() for the linetime w/a check drm/i915: Don't use the second dbuf slice on icl drm/i915: Pick the first unused PLL once again drm/i915: Fix wm latency==0 disable on skl+ drm/i915: Extract icl_set_pipe_chicken() drm/i915: Setup PIPE_CHICKEN for fastsets too drm/i915: Bump skl+ wm blocks to 11 bits drm/i915: Just use icl+ definition for PLANE_WM blocks field drm/i915: Don't set update_wm_post on g4x+ drm/i915: Split the gamma/csc enable bits from the plane_ctl() function drm/i915: Precompute gamma_mode drm/i915: Constify the state arguments to the color management stuff drm/i915: Pull GAMMA_MODE write out from haswell_load_luts() drm/i915: Split color mgmt based on single vs. double buffered registers drm/i915: Move LUT programming to happen after vblank waits drm/i915: Populate gamma_mode for all platforms drm/i915: Track pipe gamma enable/disable in crtc state drm/i915: Track pipe csc enable in crtc state drm/i915: Turn off pipe gamma when it's not needed drm/i915: Turn off pipe CSC when it's not needed drm/i915: Clean up intel_plane_atomic_check_with_state() drm/i915: Disable pipe gamma when C8 pixel format is used drm/i915: Update DSPCNTR gamma/csc bits during crtc_enable() drm/i915: Dump skl+ watermark changes drm/i915: Include "ignore lines" in skl+ wm state drm/i915: Implement new w/a for underruns with wm1+ disabled drm/i915: Remove the "pf" crc source drm/i915: Use named initializers for the crc source name array drm/i915: Remove the broken DP CRC support for g4x drm/i915: Extend skl+ crc sources with more planes drm/i915: Finalize Wa_1408961008:icl drm/i915: Fix the state checker for ICL Y planes drm/i915: Store DIMM rank information as a number drm/i915: Extract functions to derive SKL+ DIMM info drm/i915: Polish skl_is_16gb_dimm() drm/i915: Extract BXT DIMM helpers drm/i915: Fix DRAM size reporting for BXT drm/i915: Extract DIMM info on GLK too drm/i915: Use dram_dimm_info more drm/i915: Generalize intel_is_dram_symmetric() drm/i914: s/l_info/dimm_l/ etc. drm/i915: Clean up intel_get_dram_info() a bit drm/i915: Extract DIMM info on cnl+ drm/i915: Read out memory type drm/i915: Fix legacy gamma mode for ICL drm/i915: Turn off the CUS when turning off a HDR plane drm/i915: Nuke icl_calc_dp_combo_pll_link() drm/i915: Readout and check csc_mode drm/i915: Precompute/readout/check CHV CGM mode drm/i915: Extract ilk_csc_limited_range() drm/i915: Clean up ilk/icl pipe/output CSC programming drm/i915: Extract ilk_csc_convert_ctm() drm/i915: Clean the csc limited range/identity programming drm/i915: Split ilk vs. icl csc matrix handling drm/i915: Extract check_luts() drm/i915: Turn intel_color_check() into a vfunc drm/i915: Extract i9xx_color_check() drm/i915: Extract chv_color_check() drm/i915: Extract icl_color_check() drm/i915: Extract glk_color_check() drm/i915: Extract bdw_color_check() drm/i915: Extract ilk_color_check() drm/i915: Drop the pointless linear legacy LUT load on CHV drm/i915: Skip the linear degamma LUT load on ICL+ drm/i915: Suppress spurious combo PHY B warning drm/i915: Fix ICL output CSC programming drm/i915: Don't pass crtc to intel_find_shared_dpll() drm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll() drm/i915: Pass crtc_state down to skl dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from skl_get_dpll() drm/i915: Pass crtc_state down to bxt dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from bxt_get_dpll() drm/i915: Pass crtc_state down to cnl dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from cnl_get_dpll() drm/i915: Pass crtc_state down to icl dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from icl_get_dpll() drm/i915: Fix readout for cnl DPLL kdiv==3 drm/i915: Remove the fragile array index -> link rate mapping drivers/gpu/drm/drm_color_mgmt.c | 43 ++ drivers/gpu/drm/drm_fourcc.c | 19 + drivers/gpu/drm/i915/gvt/vgpu.c | 4 +- drivers/gpu/drm/i915/i915_cmd_parser.c | 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 83 ++-- drivers/gpu/drm/i915/i915_drv.c | 479 ++++++++++++++------- drivers/gpu/drm/i915/i915_drv.h | 363 ++++++++-------- drivers/gpu/drm/i915/i915_gem.c | 32 +- drivers/gpu/drm/i915/i915_gem_context.c | 367 +++++++++++++++- drivers/gpu/drm/i915/i915_gem_context.h | 24 ++ drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 +- drivers/gpu/drm/i915/i915_gem_fence_reg.c | 18 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 17 +- drivers/gpu/drm/i915/i915_gem_stolen.c | 7 +- drivers/gpu/drm/i915/i915_gem_tiling.c | 4 +- drivers/gpu/drm/i915/i915_gpu_error.c | 37 +- drivers/gpu/drm/i915/i915_gpu_error.h | 1 + drivers/gpu/drm/i915/i915_irq.c | 192 +++++---- drivers/gpu/drm/i915/i915_pci.c | 14 +- drivers/gpu/drm/i915/i915_perf.c | 77 ++-- drivers/gpu/drm/i915/i915_query.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 625 +++++++++++++++++---------- drivers/gpu/drm/i915/i915_request.c | 197 +++------ drivers/gpu/drm/i915/i915_suspend.c | 12 +- drivers/gpu/drm/i915/i915_timeline.c | 21 + drivers/gpu/drm/i915/i915_timeline.h | 26 +- drivers/gpu/drm/i915/i915_trace.h | 29 -- drivers/gpu/drm/i915/icl_dsi.c | 21 +- drivers/gpu/drm/i915/intel_atomic.c | 9 +- drivers/gpu/drm/i915/intel_atomic_plane.c | 45 +- drivers/gpu/drm/i915/intel_audio.c | 2 +- drivers/gpu/drm/i915/intel_bios.c | 59 ++- drivers/gpu/drm/i915/intel_breadcrumbs.c | 17 +- drivers/gpu/drm/i915/intel_cdclk.c | 92 ++-- drivers/gpu/drm/i915/intel_color.c | 1146 ++++++++++++++++++++++++++++++++++--------------- drivers/gpu/drm/i915/intel_combo_phy.c | 3 +- drivers/gpu/drm/i915/intel_crt.c | 28 +- drivers/gpu/drm/i915/intel_ddi.c | 396 ++++++++--------- drivers/gpu/drm/i915/intel_device_info.c | 105 +++-- drivers/gpu/drm/i915/intel_device_info.h | 32 +- drivers/gpu/drm/i915/intel_display.c | 654 ++++++++++++++++++++-------- drivers/gpu/drm/i915/intel_display.h | 6 +- drivers/gpu/drm/i915/intel_dp.c | 227 +++++----- drivers/gpu/drm/i915/intel_dp_link_training.c | 32 +- drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/intel_dpio_phy.c | 18 +- drivers/gpu/drm/i915/intel_dpll_mgr.c | 939 ++++++++++++++++++++-------------------- drivers/gpu/drm/i915/intel_dpll_mgr.h | 58 ++- drivers/gpu/drm/i915/intel_drv.h | 53 ++- drivers/gpu/drm/i915/intel_dsi_vbt.c | 6 +- drivers/gpu/drm/i915/intel_engine_cs.c | 85 ++-- drivers/gpu/drm/i915/intel_fbc.c | 26 +- drivers/gpu/drm/i915/intel_fifo_underrun.c | 18 +- drivers/gpu/drm/i915/intel_guc_fw.c | 2 +- drivers/gpu/drm/i915/intel_hangcheck.c | 157 +------ drivers/gpu/drm/i915/intel_hdcp.c | 4 +- drivers/gpu/drm/i915/intel_hdmi.c | 4 +- drivers/gpu/drm/i915/intel_lrc.c | 156 +++++-- drivers/gpu/drm/i915/intel_lrc.h | 15 +- drivers/gpu/drm/i915/intel_lspcon.c | 20 +- drivers/gpu/drm/i915/intel_lvds.c | 27 +- drivers/gpu/drm/i915/intel_mocs.c | 408 +++++++++++------- drivers/gpu/drm/i915/intel_overlay.c | 10 +- drivers/gpu/drm/i915/intel_panel.c | 8 +- drivers/gpu/drm/i915/intel_pipe_crc.c | 201 ++++----- drivers/gpu/drm/i915/intel_pm.c | 1256 +++++++++++++++++++++++++++++------------------------- drivers/gpu/drm/i915/intel_psr.c | 139 ++++-- drivers/gpu/drm/i915/intel_ringbuffer.c | 183 +------- drivers/gpu/drm/i915/intel_ringbuffer.h | 72 +--- drivers/gpu/drm/i915/intel_runtime_pm.c | 36 +- drivers/gpu/drm/i915/intel_sprite.c | 320 +++++++++++--- drivers/gpu/drm/i915/intel_uc.c | 2 +- drivers/gpu/drm/i915/intel_uncore.c | 147 ++++++- drivers/gpu/drm/i915/intel_vbt_defs.h | 3 + drivers/gpu/drm/i915/intel_wopcm.c | 4 +- drivers/gpu/drm/i915/intel_workarounds.c | 158 +++---- drivers/gpu/drm/i915/selftests/i915_gem_context.c | 470 +++++++++++++++++++- drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 197 +++++++++ drivers/gpu/drm/i915/selftests/intel_lrc.c | 4 +- drivers/gpu/drm/i915/selftests/mock_context.c | 7 +- drivers/gpu/drm/i915/selftests/mock_engine.c | 1 - drivers/gpu/drm/i915/selftests/mock_timeline.c | 1 + include/drm/drm_color_mgmt.h | 28 ++ include/drm/drm_dp_helper.h | 4 + include/drm/i915_pciids.h | 3 +- include/uapi/drm/drm_fourcc.h | 48 +++ include/uapi/drm/i915_drm.h | 64 +++ 87 files changed, 6806 insertions(+), 4131 deletions(-)