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Xilinx axienet driver updates (v3)
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[net-next,v3,00/19] Xilinx axienet driver updates (v3)
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[net-next,v3,01/19] net: axienet: Fix casting of pointers to u32
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[net-next,v3,02/19] net: axienet: Use standard IO accessors
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[net-next,v3,03/19] net: axienet: fix MDIO bus naming
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[net-next,v3,04/19] net: axienet: add X86 and ARM as supported platforms
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[net-next,v3,05/19] net: axienet: Use clock framework to get device clock rate
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[net-next,v3,06/19] net: axienet: fix teardown order of MDIO bus
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[net-next,v3,07/19] net: axienet: Re-initialize MDIO registers properly after reset
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[net-next,v3,08/19] net: axienet: Cleanup DMA device reset and halt process
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[net-next,v3,09/19] net: axienet: Make RX/TX ring sizes configurable
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[net-next,v3,10/19] net: axienet: Add DMA registers to ethtool register dump
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[net-next,v3,11/19] net: axienet: Support shared interrupts
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[net-next,v3,12/19] net: axienet: Add optional support for Ethernet core interrupt
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[net-next,v3,13/19] net: axienet: Fix race condition causing TX hang
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[net-next,v3,14/19] net: axienet: Make missing MAC address non-fatal
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[net-next,v3,15/19] net: axienet: stop interface during shutdown
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[net-next,v3,16/19] net: axienet: Fix MDIO bus parent node detection
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[net-next,v3,17/19] net: axienet: document axistream-connected attribute
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[net-next,v3,18/19] net: axienet: make use of axistream-connected attribute optional
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[net-next,v3,19/19] net: axienet: convert to phylink API
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