Message ID | cover.1557657814.git.agx@sigxcpu.org |
---|---|
Headers | show |
Series | Mixel MIPI DPHY support for NXPs i.MX8 SOCs | expand |
Hi Kishon, On Sun, May 12, 2019 at 7:49 AM Guido Günther <agx@sigxcpu.org> wrote: > > This adds support for the Mixel DPHY as found on i.MX8 CPUs but since > this is an IP core it will likely be found on others in the future. So > instead of adding this to the nwl host driver make it a generic PHY > driver. > > The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can be > added once the necessary system controller bits are in via > mixel_dphy_devdata. > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Co-developed-by: Robert Chiras <robert.chiras@nxp.com> > Signed-off-by: Robert Chiras <robert.chiras@nxp.com> > Reviewed-by: Fabio Estevam <festevam@gmail.com> > Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Would you have any comments on this series, please? Thanks
Hi, On 24/05/19 5:53 PM, Fabio Estevam wrote: > Hi Kishon, > > On Sun, May 12, 2019 at 7:49 AM Guido Günther <agx@sigxcpu.org> wrote: >> >> This adds support for the Mixel DPHY as found on i.MX8 CPUs but since >> this is an IP core it will likely be found on others in the future. So >> instead of adding this to the nwl host driver make it a generic PHY >> driver. >> >> The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can be >> added once the necessary system controller bits are in via >> mixel_dphy_devdata. >> >> Signed-off-by: Guido Günther <agx@sigxcpu.org> >> Co-developed-by: Robert Chiras <robert.chiras@nxp.com> >> Signed-off-by: Robert Chiras <robert.chiras@nxp.com> >> Reviewed-by: Fabio Estevam <festevam@gmail.com> >> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > > Would you have any comments on this series, please? I don't have any comments. I'll queue this once I start queuing patches for the next merge window. Thanks Kishon
Hi, On 24/05/19 9:31 PM, Kishon Vijay Abraham I wrote: > Hi, > > On 24/05/19 5:53 PM, Fabio Estevam wrote: >> Hi Kishon, >> >> On Sun, May 12, 2019 at 7:49 AM Guido Günther <agx@sigxcpu.org> wrote: >>> >>> This adds support for the Mixel DPHY as found on i.MX8 CPUs but since >>> this is an IP core it will likely be found on others in the future. So >>> instead of adding this to the nwl host driver make it a generic PHY >>> driver. >>> >>> The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can be >>> added once the necessary system controller bits are in via >>> mixel_dphy_devdata. >>> >>> Signed-off-by: Guido Günther <agx@sigxcpu.org> >>> Co-developed-by: Robert Chiras <robert.chiras@nxp.com> >>> Signed-off-by: Robert Chiras <robert.chiras@nxp.com> >>> Reviewed-by: Fabio Estevam <festevam@gmail.com> >>> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> >> >> Would you have any comments on this series, please? > > I don't have any comments. I'll queue this once I start queuing patches for the > next merge window. Can you fix the following checkpatch warning and repost? WARNING: quoted string split across lines #420: FILE: drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c:280: + dev_dbg(&phy->dev, "hs_prepare: %u, clk_prepare: %u, " + "hs_zero: %u, clk_zero: %u, " WARNING: quoted string split across lines #421: FILE: drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c:281: + "hs_zero: %u, clk_zero: %u, " + "hs_trail: %u, clk_trail: %u, " WARNING: quoted string split across lines #422: FILE: drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c:282: + "hs_trail: %u, clk_trail: %u, " + "rxhs_settle: %u\n", Thanks Kishon
Hi, On Thu, Jun 20, 2019 at 02:18:53PM +0530, Kishon Vijay Abraham I wrote: > Hi, > > On 24/05/19 9:31 PM, Kishon Vijay Abraham I wrote: > > Hi, > > > > On 24/05/19 5:53 PM, Fabio Estevam wrote: > >> Hi Kishon, > >> > >> On Sun, May 12, 2019 at 7:49 AM Guido Günther <agx@sigxcpu.org> wrote: > >>> > >>> This adds support for the Mixel DPHY as found on i.MX8 CPUs but since > >>> this is an IP core it will likely be found on others in the future. So > >>> instead of adding this to the nwl host driver make it a generic PHY > >>> driver. > >>> > >>> The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can be > >>> added once the necessary system controller bits are in via > >>> mixel_dphy_devdata. > >>> > >>> Signed-off-by: Guido Günther <agx@sigxcpu.org> > >>> Co-developed-by: Robert Chiras <robert.chiras@nxp.com> > >>> Signed-off-by: Robert Chiras <robert.chiras@nxp.com> > >>> Reviewed-by: Fabio Estevam <festevam@gmail.com> > >>> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > >> > >> Would you have any comments on this series, please? > > > > I don't have any comments. I'll queue this once I start queuing patches for the > > next merge window. > > Can you fix the following checkpatch warning and repost? > WARNING: quoted string split across lines > #420: FILE: drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c:280: > + dev_dbg(&phy->dev, "hs_prepare: %u, clk_prepare: %u, " > + "hs_zero: %u, clk_zero: %u, " > > WARNING: quoted string split across lines > #421: FILE: drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c:281: > + "hs_zero: %u, clk_zero: %u, " > + "hs_trail: %u, clk_trail: %u, " > > WARNING: quoted string split across lines > #422: FILE: drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c:282: > + "hs_trail: %u, clk_trail: %u, " > + "rxhs_settle: %u\n", Fixed in v12. Thanks, -- Guido