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[net-next] net: stmmac: socfpga: add RMII phy mode

Message ID 20190515144631.5490-1-dinguyen@kernel.org
State Deferred
Delegated to: David Miller
Headers show
Series [net-next] net: stmmac: socfpga: add RMII phy mode | expand

Commit Message

Dinh Nguyen May 15, 2019, 2:46 p.m. UTC 
Add option for enabling RMII phy mode.

Signed-off-by: Wei Liang Lim <wei.liang.lim@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Andrew Lunn May 15, 2019, 3:24 p.m. UTC | #1 
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> @@ -251,6 +251,9 @@ static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
>  	case PHY_INTERFACE_MODE_SGMII:
>  		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
>  		break;
> +	case PHY_INTERFACE_MODE_RMII:
> +		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;
> +		break;

What about PHY_INTERFACE_MODE_RMII_ID, PHY_INTERFACE_MODE_RMII_RXID,
PHY_INTERFACE_MODE_RMII_TXID?

	Andrew
Florian Fainelli May 15, 2019, 4:18 p.m. UTC | #2 
On 5/15/19 8:24 AM, Andrew Lunn wrote:
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
>> @@ -251,6 +251,9 @@ static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
>>  	case PHY_INTERFACE_MODE_SGMII:
>>  		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
>>  		break;
>> +	case PHY_INTERFACE_MODE_RMII:
>> +		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;
>> +		break;
> 
> What about PHY_INTERFACE_MODE_RMII_ID, PHY_INTERFACE_MODE_RMII_RXID,
> PHY_INTERFACE_MODE_RMII_TXID?

RMII is reduced MII not Reduced Gigabit MII (RGMII), which still
operates at MII speed, therefore no concept of internal deal for RX/TX
data lines, the change looks fine to me.
Florian Fainelli May 15, 2019, 4:18 p.m. UTC | #3 
On 5/15/19 7:46 AM, Dinh Nguyen wrote:
> Add option for enabling RMII phy mode.
> 
> Signed-off-by: Wei Liang Lim <wei.liang.lim@intel.com>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Andrew Lunn May 15, 2019, 4:30 p.m. UTC | #4 
On Wed, May 15, 2019 at 09:18:15AM -0700, Florian Fainelli wrote:
> On 5/15/19 8:24 AM, Andrew Lunn wrote:
> >> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> >> @@ -251,6 +251,9 @@ static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
> >>  	case PHY_INTERFACE_MODE_SGMII:
> >>  		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
> >>  		break;
> >> +	case PHY_INTERFACE_MODE_RMII:
> >> +		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;
> >> +		break;
> > 
> > What about PHY_INTERFACE_MODE_RMII_ID, PHY_INTERFACE_MODE_RMII_RXID,
> > PHY_INTERFACE_MODE_RMII_TXID?
> 
> RMII is reduced MII not Reduced Gigabit MII (RGMII), which still
> operates at MII speed, therefore no concept of internal deal for RX/TX
> data lines, the change looks fine to me.

Upps, yes. Missed the missing G!

Sorry  for the noise.

       Andrew
diff mbox series

Patch

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index d466e33635b0..75a6471db76c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -251,6 +251,9 @@  static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
 	case PHY_INTERFACE_MODE_SGMII:
 		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
 		break;
+	case PHY_INTERFACE_MODE_RMII:
+		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;
+		break;
 	default:
 		dev_err(dwmac->dev, "bad phy mode %d\n", phymode);
 		return -EINVAL;