@@ -415,7 +415,7 @@ config ENABLE_MRC_CACHE
For platforms that use Intel FSP for the memory initialization,
please check FSP output HOB via U-Boot command 'fsp hob' to see
if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h).
- If such GUID does not exist, MRC cache is not avaiable on such
+ If such GUID does not exist, MRC cache is not available on such
platform (eg: Intel Queensbay), which means selecting this option
here does not make any difference.
@@ -37,7 +37,7 @@ static char *exceptions[] = {
"Overflow",
"BOUND Range Exceeded",
"Invalid Opcode (Undefined Opcode)",
- "Device Not Avaiable (No Math Coprocessor)",
+ "Device Not Available (No Math Coprocessor)",
"Double Fault",
"Coprocessor Segment Overrun",
"Invalid TSS",
@@ -138,7 +138,7 @@ int arch_fsp_init(void)
}
/*
- * DM is not avaiable yet at this point, hence call
+ * DM is not available yet at this point, hence call
* CMOS access library which does not depend on DM.
*/
stack = cmos_read32(CMOS_FSP_STACK_ADDR);
@@ -282,7 +282,7 @@ config SPL_SHA1_SUPPORT
checksum is a 160-bit (20-byte) hash value used to check that the
image contents have not been corrupted or maliciously altered.
While SHA1 is fairly secure it is coming to the end of its life
- due to the expanding computing power avaiable to brute-force
+ due to the expanding computing power available to brute-force
attacks. For more security, consider SHA256.
config SPL_SHA256_SUPPORT
Signed-off-by: Vagrant Cascadian <vagrant@debian.org> --- arch/x86/Kconfig | 2 +- arch/x86/cpu/i386/interrupt.c | 2 +- arch/x86/lib/fsp/fsp_common.c | 2 +- common/spl/Kconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)