Message ID | 20190406021202.6505-3-ramon.fried@gmail.com |
---|---|
State | Accepted |
Commit | 8781d04f422e110fef864dd849085054fe5b0e65 |
Delegated to: | Simon Glass |
Headers | show |
Series | Add Cadence PCIe endpoint driver with new uclass | expand |
On Fri, 5 Apr 2019 at 19:12, Ramon Fried <ramon.fried@gmail.com> wrote: > > PCI_MSI_FLAGS_MASKBIT was missing from include file, > add it. > > Signed-off-by: Ramon Fried <ramon.fried@gmail.com> > --- > > include/pci.h | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Simon Glass <sjg@chromium.org>
On Sun, 21 Apr 2019 at 20:57, Simon Glass <sjg@chromium.org> wrote: > > On Fri, 5 Apr 2019 at 19:12, Ramon Fried <ramon.fried@gmail.com> wrote: > > > > PCI_MSI_FLAGS_MASKBIT was missing from include file, > > add it. > > > > Signed-off-by: Ramon Fried <ramon.fried@gmail.com> > > --- > > > > include/pci.h | 1 + > > 1 file changed, 1 insertion(+) > > Reviewed-by: Simon Glass <sjg@chromium.org> Applied to u-boot-dm, thanks!
diff --git a/include/pci.h b/include/pci.h index 5fb212cab1..508f7bca81 100644 --- a/include/pci.h +++ b/include/pci.h @@ -405,6 +405,7 @@ #define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */ #define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */ #define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */ +#define PCI_MSI_FLAGS_MASKBIT 0x0100 /* Per-vector masking capable */ #define PCI_MSI_RFU 3 /* Rest of capability flags */ #define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */ #define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
PCI_MSI_FLAGS_MASKBIT was missing from include file, add it. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> --- include/pci.h | 1 + 1 file changed, 1 insertion(+)