| Message ID | f0cbcd74-c1f1-d6d1-c412-f76334558320@linux.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [rs6000] Fix PR target/84369: gcc.dg/sms-10.c fails on Power9 | expand |
Hi Pat, On Mon, Apr 15, 2019 at 03:43:26PM -0500, Pat Haugen wrote: > As pointed out in the PR, the test is failing because a store->load dependency is reporting zero cost. Fixed by leaving existing costs as is (i.e. cost for update forms), and just adding a simple bypass for store->load dependencies. Cool, wildcards in the define_bypass. Nice trick :-) My only worry is this does not catch *all* loads and stores (larx and stcx not, at least). But it is not necessary for correctness, so okay. > Bootstrap/regtest on powerpc64le (Power9) with no new regressions and testcase now passing. Also ran cpu2006/cpu2017 benchmark comparisons with no notable differences. Ok for trunk? Yes please. Backports are okay, too, if you think we should have those. Thanks! Segher > 2019-04-15 Pat Haugen <pthaugen@us.ibm.com> > > PR target/84369 > * config/rs6000/power9.md: Add store forwarding bypass.
Index: gcc/config/rs6000/power9.md =================================================================== --- gcc/config/rs6000/power9.md (revision 270261) +++ gcc/config/rs6000/power9.md (working copy) @@ -236,6 +236,9 @@ (define_insn_reservation "power9-vecstor (eq_attr "cpu" "power9")) "DU_super_power9,LSU_pair_power9") +; Store forwarding latency is 6 +(define_bypass 6 "power9-*store*" "power9-*load*") + (define_insn_reservation "power9-larx" 4 (and (eq_attr "type" "load_l") (eq_attr "cpu" "power9"))