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[testsuite] Enable vect_usad_char effective target for PowerPC and fix up SAD_EXPR testcases

Message ID 78fa9345-97af-d0e0-954f-6ed9925884cf@linux.ibm.com
State New
Headers show
Series [testsuite] Enable vect_usad_char effective target for PowerPC and fix up SAD_EXPR testcases | expand

Commit Message

Pat Haugen Feb. 19, 2019, 9:07 p.m. UTC
Power9 added support for V16QImode SAD operations. While making the check_effective_target change I noticed that the tests will also pass on Power7/Power8 even though they don't have the optab support. The reason is the tests are only checking that the source pattern is recognized, not that a SAD_EXPR was actually generated. So I've updated the tests also.

Ok for trunk?

-Pat


testsuite/ChangeLog:
2019-02-19  Pat Haugen  <pthaugen@us.ibm.com>

	* lib/target-supports.exp (check_effective_target_vect_usad_char):
	Add PowerPC support.
	* gcc.dg/vect/slp-reduc-sad.c: Update scan string.
	* gcc.dg/vect/vect-reduc-sad.c: Likewise.

Comments

Richard Biener Feb. 20, 2019, 8:08 a.m. UTC | #1
On Tue, 19 Feb 2019, Pat Haugen wrote:

> Power9 added support for V16QImode SAD operations. While making the check_effective_target change I noticed that the tests will also pass on Power7/Power8 even though they don't have the optab support. The reason is the tests are only checking that the source pattern is recognized, not that a SAD_EXPR was actually generated. So I've updated the tests also.
> 
> Ok for trunk?

OK.

Richard.

> -Pat
> 
> 
> testsuite/ChangeLog:
> 2019-02-19  Pat Haugen  <pthaugen@us.ibm.com>
> 
> 	* lib/target-supports.exp (check_effective_target_vect_usad_char):
> 	Add PowerPC support.
> 	* gcc.dg/vect/slp-reduc-sad.c: Update scan string.
> 	* gcc.dg/vect/vect-reduc-sad.c: Likewise.
> 
> 
> Index: gcc/testsuite/lib/target-supports.exp
> ===================================================================
> --- gcc/testsuite/lib/target-supports.exp	(revision 268784)
> +++ gcc/testsuite/lib/target-supports.exp	(working copy)
> @@ -5982,7 +5982,9 @@ proc check_effective_target_vect_usad_ch
>        expr { [istarget i?86-*-*]
>  	      || [istarget x86_64-*-*]
>  	      || ([istarget aarch64*-*-*]
> -		  && ![check_effective_target_aarch64_sve])}}]
> +		  && ![check_effective_target_aarch64_sve])
> +	      || ([istarget powerpc*-*-*]
> +		  && [check_p9vector_hw_available])}}]
>  }
>  
>  # Return 1 if the target plus current options supports both signed
> Index: gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c
> ===================================================================
> --- gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c	(revision 268784)
> +++ gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c	(working copy)
> @@ -58,6 +58,6 @@ main ()
>    return 0;
>  }
>  
> -/* { dg-final { scan-tree-dump "vect_recog_sad_pattern: detected" "vect" } } */
> +/* { dg-final { scan-tree-dump "sad pattern recognized" "vect" } } */
>  /* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" } } */
>  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
> Index: gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c
> ===================================================================
> --- gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c	(revision 268784)
> +++ gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c	(working copy)
> @@ -49,6 +49,6 @@ main (void)
>    return 0;
>  }
>  
> -/* { dg-final { scan-tree-dump-times "vect_recog_sad_pattern: detected" 1 "vect" } } */
> +/* { dg-final { scan-tree-dump-times "sad pattern recognized" 1 "vect" } } */
>  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
> 
>
Jeff Law Feb. 21, 2019, 9:45 p.m. UTC | #2
On 2/19/19 2:07 PM, Pat Haugen wrote:
> Power9 added support for V16QImode SAD operations. While making the check_effective_target change I noticed that the tests will also pass on Power7/Power8 even though they don't have the optab support. The reason is the tests are only checking that the source pattern is recognized, not that a SAD_EXPR was actually generated. So I've updated the tests also.
> 
> Ok for trunk?
> 
> -Pat
> 
> 
> testsuite/ChangeLog:
> 2019-02-19  Pat Haugen  <pthaugen@us.ibm.com>
> 
> 	* lib/target-supports.exp (check_effective_target_vect_usad_char):
> 	Add PowerPC support.
> 	* gcc.dg/vect/slp-reduc-sad.c: Update scan string.
> 	* gcc.dg/vect/vect-reduc-sad.c: Likewise.
OK
jeff
diff mbox series

Patch

Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- gcc/testsuite/lib/target-supports.exp	(revision 268784)
+++ gcc/testsuite/lib/target-supports.exp	(working copy)
@@ -5982,7 +5982,9 @@  proc check_effective_target_vect_usad_ch
       expr { [istarget i?86-*-*]
 	      || [istarget x86_64-*-*]
 	      || ([istarget aarch64*-*-*]
-		  && ![check_effective_target_aarch64_sve])}}]
+		  && ![check_effective_target_aarch64_sve])
+	      || ([istarget powerpc*-*-*]
+		  && [check_p9vector_hw_available])}}]
 }
 
 # Return 1 if the target plus current options supports both signed
Index: gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c
===================================================================
--- gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c	(revision 268784)
+++ gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c	(working copy)
@@ -58,6 +58,6 @@  main ()
   return 0;
 }
 
-/* { dg-final { scan-tree-dump "vect_recog_sad_pattern: detected" "vect" } } */
+/* { dg-final { scan-tree-dump "sad pattern recognized" "vect" } } */
 /* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" } } */
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
Index: gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c
===================================================================
--- gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c	(revision 268784)
+++ gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c	(working copy)
@@ -49,6 +49,6 @@  main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vect_recog_sad_pattern: detected" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "sad pattern recognized" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */