| Message ID | 20190117103748.36613-1-anup.patel@wdc.com |
|---|---|
| Headers | show |
| Series | SiFive FU540 Support | expand |
On 17.01.19 11:38, Anup Patel wrote: > This patchset adds SiFive Freedom Unleashed (FU540) support > to RISC-V U-Boot. > > The patches are based upon latest RISC-V U-Boot tree > (git://git.denx.de/u-boot-riscv.git) at commit id > 91882c472d8c0aef4db699d3f2de55bf43d4ae4b > > All drivers namely: SiFive PRCI, SiFive Serial, and Cadance > MACB Ethernet work fine on actual SiFive Unleashed board and > QEMU sifive_u machine. Great job, looks very clean to me! Slight nitpick on the SoB lines though. Usually your SoB should always come at the end if it went through your fingers last. I saw a few patches where Atish was either the sole person in SoB or is listed after you in the SoB order. This is slightly incorrect, as you as the sender of the patch set should always occur at the end of the SoB list. Thanks a lot for cooking up this patch set, I'm looking very much forward to a world where running new kernels is easy on RISC-V :). Alex
> -----Original Message----- > From: Alexander Graf [mailto:agraf@suse.de] > Sent: Friday, January 18, 2019 4:39 AM > To: Anup Patel <Anup.Patel@wdc.com>; Rick Chen <rick@andestech.com>; > Bin Meng <bmeng.cn@gmail.com>; Joe Hershberger > <joe.hershberger@ni.com>; Lukas Auer <lukas.auer@aisec.fraunhofer.de>; > Masahiro Yamada <yamada.masahiro@socionext.com>; Simon Glass > <sjg@chromium.org> > Cc: Palmer Dabbelt <palmer@sifive.com>; Paul Walmsley > <paul.walmsley@sifive.com>; Atish Patra <Atish.Patra@wdc.com>; > Christoph Hellwig <hch@infradead.org>; U-Boot Mailing List <u- > boot@lists.denx.de> > Subject: Re: [PATCH 00/11] SiFive FU540 Support > > > > On 17.01.19 11:38, Anup Patel wrote: > > This patchset adds SiFive Freedom Unleashed (FU540) support to RISC-V > > U-Boot. > > > > The patches are based upon latest RISC-V U-Boot tree > > (git://git.denx.de/u-boot-riscv.git) at commit id > > 91882c472d8c0aef4db699d3f2de55bf43d4ae4b > > > > All drivers namely: SiFive PRCI, SiFive Serial, and Cadance MACB > > Ethernet work fine on actual SiFive Unleashed board and QEMU sifive_u > > machine. > > Great job, looks very clean to me! Thanks. > > Slight nitpick on the SoB lines though. Usually your SoB should always come > at the end if it went through your fingers last. > > I saw a few patches where Atish was either the sole person in SoB or is listed > after you in the SoB order. This is slightly incorrect, as you as the sender of > the patch set should always occur at the end of the SoB list. Sure, I will fix ordering of SoB > > Thanks a lot for cooking up this patch set, I'm looking very much forward to a > world where running new kernels is easy on RISC-V :). Regards, Anup
This patchset adds SiFive Freedom Unleashed (FU540) support to RISC-V U-Boot. The patches are based upon latest RISC-V U-Boot tree (git://git.denx.de/u-boot-riscv.git) at commit id 91882c472d8c0aef4db699d3f2de55bf43d4ae4b All drivers namely: SiFive PRCI, SiFive Serial, and Cadance MACB Ethernet work fine on actual SiFive Unleashed board and QEMU sifive_u machine. Anup Patel (7): riscv: Rename cpu/qemu to cpu/generic riscv: Add asm/dma-mapping.h for DMA mappings riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems net: macb: Fix clk API usage for RISC-V systems clk: Add SiFive FU540 PRCI clock driver clk: Add fixed-factor clock driver riscv: Add SiFive FU540 board support Atish Patra (4): net: macb: Fix GEM hardware detection drivers: serial_sifive: Fix baud rate calculation drivers: serial: serial_sifive: Skip baudrate config if no input clock cpu: Bind timer driver for boot hart arch/riscv/Kconfig | 6 +- arch/riscv/cpu/{qemu => generic}/Kconfig | 2 +- arch/riscv/cpu/{qemu => generic}/Makefile | 0 arch/riscv/cpu/{qemu => generic}/cpu.c | 0 arch/riscv/cpu/generic/dram.c | 39 ++ arch/riscv/cpu/qemu/dram.c | 17 - arch/riscv/include/asm/dma-mapping.h | 38 ++ board/emulation/qemu-riscv/Kconfig | 4 +- .../qemu-riscv => sifive/fu540}/Kconfig | 36 +- board/sifive/fu540/MAINTAINERS | 9 + board/sifive/fu540/Makefile | 5 + board/sifive/fu540/fu540.c | 17 + configs/sifive_fu540_defconfig | 11 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 5 +- drivers/clk/clk_fixed_factor.c | 74 +++ drivers/clk/sifive/Kconfig | 19 + drivers/clk/sifive/Makefile | 5 + .../clk/sifive/analogbits-wrpll-cln28hpc.h | 101 +++ drivers/clk/sifive/fu540-prci.c | 604 ++++++++++++++++++ drivers/clk/sifive/wrpll-cln28hpc.c | 390 +++++++++++ drivers/cpu/riscv_cpu.c | 7 +- drivers/net/macb.c | 6 +- drivers/serial/serial_sifive.c | 60 +- include/configs/sifive-fu540.h | 43 ++ include/dt-bindings/clk/sifive-fu540-prci.h | 29 + 26 files changed, 1467 insertions(+), 61 deletions(-) rename arch/riscv/cpu/{qemu => generic}/Kconfig (91%) rename arch/riscv/cpu/{qemu => generic}/Makefile (100%) rename arch/riscv/cpu/{qemu => generic}/cpu.c (100%) create mode 100644 arch/riscv/cpu/generic/dram.c delete mode 100644 arch/riscv/cpu/qemu/dram.c create mode 100644 arch/riscv/include/asm/dma-mapping.h copy board/{emulation/qemu-riscv => sifive/fu540}/Kconfig (57%) create mode 100644 board/sifive/fu540/MAINTAINERS create mode 100644 board/sifive/fu540/Makefile create mode 100644 board/sifive/fu540/fu540.c create mode 100644 configs/sifive_fu540_defconfig create mode 100644 drivers/clk/clk_fixed_factor.c create mode 100644 drivers/clk/sifive/Kconfig create mode 100644 drivers/clk/sifive/Makefile create mode 100644 drivers/clk/sifive/analogbits-wrpll-cln28hpc.h create mode 100644 drivers/clk/sifive/fu540-prci.c create mode 100644 drivers/clk/sifive/wrpll-cln28hpc.c create mode 100644 include/configs/sifive-fu540.h create mode 100644 include/dt-bindings/clk/sifive-fu540-prci.h