mbox series

[v2,0/9] Add support for audiocodec in Allwinner A64

Message ID 20181013165329.13363-1-anarsoul@gmail.com
Headers show
Series Add support for audiocodec in Allwinner A64 | expand

Message

Vasily Khoruzhick Oct. 13, 2018, 4:53 p.m. UTC
This series adds Allwinner A64 audiocodec support into sun4i-i2s,
sun8i-codec drivers, introduces new sun50i-codec-analog driver and enables
sound on Pine64, SoPine boards and Pinebook.

I2S for audiocodec in A64 is different from other 3 I2S modules but
similar to one in A10, digital part of codec is compatible with A33 and
analog controls part is completely different from other SoCs - it shares
only few bits in few registers, so adding support for it into existing
sun8i-codec-analog would mean duplicating all the widgets, controls and
some routes and making it hard to read. Therefore it makes sense to
introduce new driver.

v2: - Use simple-amplifier for speaker amp on Pinebook
    - Rename sun50i-a64-i2s to sun50i-a64-codec-i2s to preserve compatible
      string for other 3 I2S modules in A64 in case if there's any
      incompatibility with H3

Marcus Cooper (1):
  ASoC: sun4i-i2s: Add compatibility with A64 codec I2S

Vasily Khoruzhick (8):
  ASoC: sun8i-codec: Don't hardcode BCLK / LRCK ratio
  ASoC: sun8i-codec-analog: split regmap code into separate driver
  ASoC: dt-binding: Add bindings for Allwinner A64 codec's analog path
    controls
  ASoC: sunxi: Add new driver for Allwinner A64 codec's analog path
    controls
  ASoC: sunxi: allow the sun8i-codec driver to be built on ARM64
  arm64: dts: allwinner: a64: add nodes necessary for analog sound
    support
  arm64: dts: allwinner: a64: enable sound on Pine64 and SoPine
  arm64: dts: allwinner: a64: enable sound on Pinebook

 .../devicetree/bindings/sound/sun4i-i2s.txt   |   2 +
 .../bindings/sound/sun50i-codec-analog.txt    |  12 +
 .../boot/dts/allwinner/sun50i-a64-pine64.dts  |  30 ++
 .../dts/allwinner/sun50i-a64-pinebook.dts     |  42 ++
 .../allwinner/sun50i-a64-sopine-baseboard.dts |  30 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |  58 +++
 sound/soc/sunxi/Kconfig                       |  17 +-
 sound/soc/sunxi/Makefile                      |   2 +
 sound/soc/sunxi/sun4i-i2s.c                   |  21 +
 sound/soc/sunxi/sun50i-codec-analog.c         | 444 ++++++++++++++++++
 sound/soc/sunxi/sun8i-codec-analog.c          |  79 +---
 sound/soc/sunxi/sun8i-codec.c                 |  35 +-
 sound/soc/sunxi/sunxi-adda-pr-regmap.c        | 102 ++++
 sound/soc/sunxi/sunxi-adda-pr-regmap.h        |   7 +
 14 files changed, 798 insertions(+), 83 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/sound/sun50i-codec-analog.txt
 create mode 100644 sound/soc/sunxi/sun50i-codec-analog.c
 create mode 100644 sound/soc/sunxi/sunxi-adda-pr-regmap.c
 create mode 100644 sound/soc/sunxi/sunxi-adda-pr-regmap.h

Comments

Maxime Ripard Oct. 15, 2018, 7:07 a.m. UTC | #1
On Sat, Oct 13, 2018 at 09:53:22AM -0700, Vasily Khoruzhick wrote:
> BCLK / LRCK ratio should be sample size * channels, but it was
> hardcoded to 32 (0x1 is 32 as per A33 and A64 datasheets).
> 
> Calculate it basing on sample size and number of channels.
> 
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
>  sound/soc/sunxi/sun8i-codec.c | 35 ++++++++++++++++++++++++++++++-----
>  1 file changed, 30 insertions(+), 5 deletions(-)
> 
> diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c
> index fb37dd927e33..e681e194ad4c 100644
> --- a/sound/soc/sunxi/sun8i-codec.c
> +++ b/sound/soc/sunxi/sun8i-codec.c
> @@ -52,7 +52,6 @@
>  #define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV		13
>  #define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV		9
>  #define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV		6
> -#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV_16		(1 << 6)
>  #define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ		4
>  #define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ_16		(1 << 4)
>  #define SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT		2
> @@ -257,8 +256,8 @@ static int sun8i_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>  }
>  
>  struct sun8i_codec_clk_div {
> -	u8	div;
> -	u8	val;
> +	unsigned int	div;
> +	u8		val;
>  };
>  
>  static const struct sun8i_codec_clk_div sun8i_codec_bclk_div[] = {
> @@ -300,12 +299,33 @@ static u8 sun8i_codec_get_bclk_div(struct sun8i_codec *scodec,
>  	return best_val;
>  }
>  
> +static const struct sun8i_codec_clk_div sun8i_codec_lrck_div[] = {
> +	{ .div = 16,	.val = 0 },
> +	{ .div = 32,	.val = 1 },
> +	{ .div = 64,	.val = 2 },
> +	{ .div = 128,	.val = 3 },
> +	{ .div = 256,	.val = 4 },
> +};

That's log2(div) - 4, right? There's no need to store the table if so.

Maxime
Maxime Ripard Oct. 15, 2018, 7:31 a.m. UTC | #2
On Sat, Oct 13, 2018 at 09:53:26AM -0700, Vasily Khoruzhick wrote:
> Allwinner A64 uses the same digital codec part as in A33, so we need
> to build this driver on ARM64 as well.
> 
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Thanks!
Maxime
Maxime Ripard Oct. 15, 2018, 8:24 a.m. UTC | #3
Hi,

On Sat, Oct 13, 2018 at 09:53:23AM -0700, Vasily Khoruzhick wrote:
> It will be reused by sun50i-codec-analog later.
> 
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
>  sound/soc/sunxi/Kconfig                |   7 +-
>  sound/soc/sunxi/Makefile               |   1 +
>  sound/soc/sunxi/sun8i-codec-analog.c   |  79 +------------------
>  sound/soc/sunxi/sunxi-adda-pr-regmap.c | 102 +++++++++++++++++++++++++
>  sound/soc/sunxi/sunxi-adda-pr-regmap.h |   7 ++
>  5 files changed, 119 insertions(+), 77 deletions(-)
>  create mode 100644 sound/soc/sunxi/sunxi-adda-pr-regmap.c
>  create mode 100644 sound/soc/sunxi/sunxi-adda-pr-regmap.h
> 
> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
> index 22408bc2d6ec..3932f0238add 100644
> --- a/sound/soc/sunxi/Kconfig
> +++ b/sound/soc/sunxi/Kconfig
> @@ -23,7 +23,7 @@ config SND_SUN8I_CODEC
>  config SND_SUN8I_CODEC_ANALOG
>  	tristate "Allwinner sun8i Codec Analog Controls Support"
>  	depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> -	select REGMAP
> +	select SND_SUNXI_ADDA_PR_REGMAP
>  	help
>  	  Say Y or M if you want to add support for the analog controls for
>  	  the codec embedded in newer Allwinner SoCs.
> @@ -45,4 +45,9 @@ config SND_SUN4I_SPDIF
>  	help
>  	  Say Y or M to add support for the S/PDIF audio block in the Allwinner
>  	  A10 and affiliated SoCs.
> +
> +config SND_SUNXI_ADDA_PR_REGMAP
> +	tristate
> +	select REGMAP
> +

This is just a minor nitpick, but I'd rename it to
SND_SUN8I_CODEC_ADDA, to be consistent with the rest of the
drivers/Kconfig symbols.

With that fixed,
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Thanks!
Maxime
Maxime Ripard Oct. 15, 2018, 8:24 a.m. UTC | #4
On Sat, Oct 13, 2018 at 09:53:25AM -0700, Vasily Khoruzhick wrote:
> The internal codec on A64 is split into 2 parts. The analog path controls
> are routed through an embedded custom register bus accessed through
> the PRCM block.
> 
> Add an ASoC component driver for it. This should be tied to the codec
> audio card as an auxiliary device.
> 
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Thanks!
Maxime
Vasily Khoruzhick Oct. 15, 2018, 3:14 p.m. UTC | #5
On Monday, October 15, 2018 12:07:14 AM PDT Maxime Ripard wrote:
> On Sat, Oct 13, 2018 at 09:53:22AM -0700, Vasily Khoruzhick wrote:
> > BCLK / LRCK ratio should be sample size * channels, but it was
> > hardcoded to 32 (0x1 is 32 as per A33 and A64 datasheets).
> > 
> > Calculate it basing on sample size and number of channels.
> > 
> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> > ---
> > 
> >  sound/soc/sunxi/sun8i-codec.c | 35 ++++++++++++++++++++++++++++++-----
> >  1 file changed, 30 insertions(+), 5 deletions(-)
> > 
> > diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c
> > index fb37dd927e33..e681e194ad4c 100644
> > --- a/sound/soc/sunxi/sun8i-codec.c
> > +++ b/sound/soc/sunxi/sun8i-codec.c
> > @@ -52,7 +52,6 @@
> > 
> >  #define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV		13
> >  #define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV		9
> >  #define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV		6
> > 
> > -#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV_16		(1 << 6)
> > 
> >  #define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ		4
> >  #define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ_16		(1 << 4)
> >  #define SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT		2
> > 
> > @@ -257,8 +256,8 @@ static int sun8i_set_fmt(struct snd_soc_dai *dai,
> > unsigned int fmt)> 
> >  }
> >  
> >  struct sun8i_codec_clk_div {
> > 
> > -	u8	div;
> > -	u8	val;
> > +	unsigned int	div;
> > +	u8		val;
> > 
> >  };
> >  
> >  static const struct sun8i_codec_clk_div sun8i_codec_bclk_div[] = {
> > 
> > @@ -300,12 +299,33 @@ static u8 sun8i_codec_get_bclk_div(struct
> > sun8i_codec *scodec,> 
> >  	return best_val;
> >  
> >  }
> > 
> > +static const struct sun8i_codec_clk_div sun8i_codec_lrck_div[] = {
> > +	{ .div = 16,	.val = 0 },
> > +	{ .div = 32,	.val = 1 },
> > +	{ .div = 64,	.val = 2 },
> > +	{ .div = 128,	.val = 3 },
> > +	{ .div = 256,	.val = 4 },
> > +};
> 
> That's log2(div) - 4, right? There's no need to store the table if so.

OK, will fix in v3
 
> Maxime