Message ID | 1526894143-4986-1-git-send-email-ganeshgr@chelsio.com |
---|---|
State | Changes Requested, archived |
Delegated to: | David Miller |
Headers | show |
Series | [net-next] cxgb4: do L1 config when module is inserted | expand |
From: Ganesh Goudar <ganeshgr@chelsio.com> Date: Mon, 21 May 2018 14:45:43 +0530 > trigger an L1 configure operation when a transceiver module > is inserted in order to cause current "sticky" options like > Requested Forward Error Correction to be reapplied. > > Signed-off-by: Casey Leedom <leedom@chelsio.com> > Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Applied, although: > @@ -491,6 +491,9 @@ struct link_config { > > unsigned char link_ok; /* link up? */ > unsigned char link_down_rc; /* link down reason */ > + > + unsigned char new_module; /* ->OS Transceiver Module inserted */ > + unsigned char redo_l1cfg; /* ->CC redo current "sticky" L1 CFG */ > }; The various booleans in link_config should be converted to use type 'bool' and true/false values.
From: David Miller <davem@davemloft.net> Date: Mon, 21 May 2018 12:21:04 -0400 (EDT) > From: Ganesh Goudar <ganeshgr@chelsio.com> > Date: Mon, 21 May 2018 14:45:43 +0530 > >> trigger an L1 configure operation when a transceiver module >> is inserted in order to cause current "sticky" options like >> Requested Forward Error Correction to be reapplied. >> >> Signed-off-by: Casey Leedom <leedom@chelsio.com> >> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> > > Applied, although: Actually I had to revert, this doesn't even compile: drivers/scsi/csiostor/csio_hw.c: In function ‘fwcaps16_to_caps32’: drivers/scsi/csiostor/csio_hw.c:1490:17: error: ‘FW_PORT_CAP_MDIX’ undeclared (first use in this function); did you mean ‘FW_PORT_CAP_MDI_S’? if (caps16 & FW_PORT_CAP_##__cap) \ ^
Hi Ganesh, I love your patch! Yet something to improve: [auto build test ERROR on net-next/master] url: https://github.com/0day-ci/linux/commits/Ganesh-Goudar/cxgb4-do-L1-config-when-module-is-inserted/20180523-085637 config: sparc64-allyesconfig (attached as .config) compiler: sparc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=sparc64 All error/warnings (new ones prefixed by >>): drivers/scsi/csiostor/csio_hw.c: In function 'fwcaps16_to_caps32': >> drivers/scsi/csiostor/csio_hw.c:1490:17: error: 'FW_PORT_CAP_MDIX' undeclared (first use in this function); did you mean 'FW_PORT_CAP_MDI_S'? if (caps16 & FW_PORT_CAP_##__cap) \ ^ >> drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro 'CAP16_TO_CAP32' CAP16_TO_CAP32(MDIX); ^~~~~~~~~~~~~~ drivers/scsi/csiostor/csio_hw.c:1490:17: note: each undeclared identifier is reported only once for each function it appears in if (caps16 & FW_PORT_CAP_##__cap) \ ^ >> drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro 'CAP16_TO_CAP32' CAP16_TO_CAP32(MDIX); ^~~~~~~~~~~~~~ >> drivers/scsi/csiostor/csio_hw.c:1491:15: error: 'FW_PORT_CAP32_MDIX' undeclared (first use in this function); did you mean 'FW_PORT_CAP_MDIX'? caps32 |= FW_PORT_CAP32_##__cap; \ ^ >> drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro 'CAP16_TO_CAP32' CAP16_TO_CAP32(MDIX); ^~~~~~~~~~~~~~ vim +1490 drivers/scsi/csiostor/csio_hw.c e1735d9a Varun Prakash 2018-03-11 1477 e1735d9a Varun Prakash 2018-03-11 1478 /** e1735d9a Varun Prakash 2018-03-11 1479 * fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits e1735d9a Varun Prakash 2018-03-11 1480 * @caps16: a 16-bit Port Capabilities value e1735d9a Varun Prakash 2018-03-11 1481 * e1735d9a Varun Prakash 2018-03-11 1482 * Returns the equivalent 32-bit Port Capabilities value. e1735d9a Varun Prakash 2018-03-11 1483 */ e1735d9a Varun Prakash 2018-03-11 1484 fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) e1735d9a Varun Prakash 2018-03-11 1485 { e1735d9a Varun Prakash 2018-03-11 1486 fw_port_cap32_t caps32 = 0; e1735d9a Varun Prakash 2018-03-11 1487 e1735d9a Varun Prakash 2018-03-11 1488 #define CAP16_TO_CAP32(__cap) \ e1735d9a Varun Prakash 2018-03-11 1489 do { \ e1735d9a Varun Prakash 2018-03-11 @1490 if (caps16 & FW_PORT_CAP_##__cap) \ e1735d9a Varun Prakash 2018-03-11 @1491 caps32 |= FW_PORT_CAP32_##__cap; \ e1735d9a Varun Prakash 2018-03-11 1492 } while (0) e1735d9a Varun Prakash 2018-03-11 1493 e1735d9a Varun Prakash 2018-03-11 1494 CAP16_TO_CAP32(SPEED_100M); e1735d9a Varun Prakash 2018-03-11 1495 CAP16_TO_CAP32(SPEED_1G); e1735d9a Varun Prakash 2018-03-11 1496 CAP16_TO_CAP32(SPEED_25G); e1735d9a Varun Prakash 2018-03-11 1497 CAP16_TO_CAP32(SPEED_10G); e1735d9a Varun Prakash 2018-03-11 1498 CAP16_TO_CAP32(SPEED_40G); e1735d9a Varun Prakash 2018-03-11 1499 CAP16_TO_CAP32(SPEED_100G); e1735d9a Varun Prakash 2018-03-11 1500 CAP16_TO_CAP32(FC_RX); e1735d9a Varun Prakash 2018-03-11 1501 CAP16_TO_CAP32(FC_TX); e1735d9a Varun Prakash 2018-03-11 1502 CAP16_TO_CAP32(ANEG); e1735d9a Varun Prakash 2018-03-11 @1503 CAP16_TO_CAP32(MDIX); e1735d9a Varun Prakash 2018-03-11 1504 CAP16_TO_CAP32(MDIAUTO); e1735d9a Varun Prakash 2018-03-11 1505 CAP16_TO_CAP32(FEC_RS); e1735d9a Varun Prakash 2018-03-11 1506 CAP16_TO_CAP32(FEC_BASER_RS); e1735d9a Varun Prakash 2018-03-11 1507 CAP16_TO_CAP32(802_3_PAUSE); e1735d9a Varun Prakash 2018-03-11 1508 CAP16_TO_CAP32(802_3_ASM_DIR); e1735d9a Varun Prakash 2018-03-11 1509 e1735d9a Varun Prakash 2018-03-11 1510 #undef CAP16_TO_CAP32 e1735d9a Varun Prakash 2018-03-11 1511 e1735d9a Varun Prakash 2018-03-11 1512 return caps32; e1735d9a Varun Prakash 2018-03-11 1513 } e1735d9a Varun Prakash 2018-03-11 1514 :::::: The code at line 1490 was first introduced by commit :::::: e1735d9a98ab5593484bbba1933e362a261e0de0 scsi: csiostor: add support for 32 bit port capabilities :::::: TO: Varun Prakash <varun@chelsio.com> :::::: CC: Martin K. Petersen <martin.petersen@oracle.com> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi Ganesh,
I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master]
url: https://github.com/0day-ci/linux/commits/Ganesh-Goudar/cxgb4-do-L1-config-when-module-is-inserted/20180523-085637
config: x86_64-rhel (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/scsi/csiostor/csio_hw.c: In function 'fwcaps16_to_caps32':
>> drivers/scsi/csiostor/csio_hw.c:1490:17: error: 'FW_PORT_CAP_MDIX' undeclared (first use in this function); did you mean 'FW_PORT_CAP_MDI_V'?
if (caps16 & FW_PORT_CAP_##__cap) \
^
drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro 'CAP16_TO_CAP32'
CAP16_TO_CAP32(MDIX);
^~~~~~~~~~~~~~
drivers/scsi/csiostor/csio_hw.c:1490:17: note: each undeclared identifier is reported only once for each function it appears in
if (caps16 & FW_PORT_CAP_##__cap) \
^
drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro 'CAP16_TO_CAP32'
CAP16_TO_CAP32(MDIX);
^~~~~~~~~~~~~~
drivers/scsi/csiostor/csio_hw.c:1491:15: error: 'FW_PORT_CAP32_MDIX' undeclared (first use in this function); did you mean 'FW_PORT_CAP_MDIX'?
caps32 |= FW_PORT_CAP32_##__cap; \
^
drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro 'CAP16_TO_CAP32'
CAP16_TO_CAP32(MDIX);
^~~~~~~~~~~~~~
vim +1490 drivers/scsi/csiostor/csio_hw.c
e1735d9a Varun Prakash 2018-03-11 1477
e1735d9a Varun Prakash 2018-03-11 1478 /**
e1735d9a Varun Prakash 2018-03-11 1479 * fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits
e1735d9a Varun Prakash 2018-03-11 1480 * @caps16: a 16-bit Port Capabilities value
e1735d9a Varun Prakash 2018-03-11 1481 *
e1735d9a Varun Prakash 2018-03-11 1482 * Returns the equivalent 32-bit Port Capabilities value.
e1735d9a Varun Prakash 2018-03-11 1483 */
e1735d9a Varun Prakash 2018-03-11 1484 fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16)
e1735d9a Varun Prakash 2018-03-11 1485 {
e1735d9a Varun Prakash 2018-03-11 1486 fw_port_cap32_t caps32 = 0;
e1735d9a Varun Prakash 2018-03-11 1487
e1735d9a Varun Prakash 2018-03-11 1488 #define CAP16_TO_CAP32(__cap) \
e1735d9a Varun Prakash 2018-03-11 1489 do { \
e1735d9a Varun Prakash 2018-03-11 @1490 if (caps16 & FW_PORT_CAP_##__cap) \
e1735d9a Varun Prakash 2018-03-11 1491 caps32 |= FW_PORT_CAP32_##__cap; \
e1735d9a Varun Prakash 2018-03-11 1492 } while (0)
e1735d9a Varun Prakash 2018-03-11 1493
e1735d9a Varun Prakash 2018-03-11 1494 CAP16_TO_CAP32(SPEED_100M);
e1735d9a Varun Prakash 2018-03-11 1495 CAP16_TO_CAP32(SPEED_1G);
e1735d9a Varun Prakash 2018-03-11 1496 CAP16_TO_CAP32(SPEED_25G);
e1735d9a Varun Prakash 2018-03-11 1497 CAP16_TO_CAP32(SPEED_10G);
e1735d9a Varun Prakash 2018-03-11 1498 CAP16_TO_CAP32(SPEED_40G);
e1735d9a Varun Prakash 2018-03-11 1499 CAP16_TO_CAP32(SPEED_100G);
e1735d9a Varun Prakash 2018-03-11 1500 CAP16_TO_CAP32(FC_RX);
e1735d9a Varun Prakash 2018-03-11 1501 CAP16_TO_CAP32(FC_TX);
e1735d9a Varun Prakash 2018-03-11 1502 CAP16_TO_CAP32(ANEG);
e1735d9a Varun Prakash 2018-03-11 1503 CAP16_TO_CAP32(MDIX);
e1735d9a Varun Prakash 2018-03-11 1504 CAP16_TO_CAP32(MDIAUTO);
e1735d9a Varun Prakash 2018-03-11 1505 CAP16_TO_CAP32(FEC_RS);
e1735d9a Varun Prakash 2018-03-11 1506 CAP16_TO_CAP32(FEC_BASER_RS);
e1735d9a Varun Prakash 2018-03-11 1507 CAP16_TO_CAP32(802_3_PAUSE);
e1735d9a Varun Prakash 2018-03-11 1508 CAP16_TO_CAP32(802_3_ASM_DIR);
e1735d9a Varun Prakash 2018-03-11 1509
e1735d9a Varun Prakash 2018-03-11 1510 #undef CAP16_TO_CAP32
e1735d9a Varun Prakash 2018-03-11 1511
e1735d9a Varun Prakash 2018-03-11 1512 return caps32;
e1735d9a Varun Prakash 2018-03-11 1513 }
e1735d9a Varun Prakash 2018-03-11 1514
:::::: The code at line 1490 was first introduced by commit
:::::: e1735d9a98ab5593484bbba1933e362a261e0de0 scsi: csiostor: add support for 32 bit port capabilities
:::::: TO: Varun Prakash <varun@chelsio.com>
:::::: CC: Martin K. Petersen <martin.petersen@oracle.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index 211086b..442b35c 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h @@ -491,6 +491,9 @@ struct link_config { unsigned char link_ok; /* link up? */ unsigned char link_down_rc; /* link down reason */ + + unsigned char new_module; /* ->OS Transceiver Module inserted */ + unsigned char redo_l1cfg; /* ->CC redo current "sticky" L1 CFG */ }; #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16) @@ -1324,7 +1327,7 @@ static inline unsigned int qtimer_val(const struct adapter *adap, extern char cxgb4_driver_name[]; extern const char cxgb4_driver_version[]; -void t4_os_portmod_changed(const struct adapter *adap, int port_id); +void t4_os_portmod_changed(struct adapter *adap, int port_id); void t4_os_link_changed(struct adapter *adap, int port_id, int link_stat); void t4_free_sge_resources(struct adapter *adap); @@ -1505,8 +1508,25 @@ void t4_intr_disable(struct adapter *adapter); int t4_slow_intr_handler(struct adapter *adapter); int t4_wait_dev_ready(void __iomem *regs); -int t4_link_l1cfg(struct adapter *adap, unsigned int mbox, unsigned int port, - struct link_config *lc); + +int t4_link_l1cfg_core(struct adapter *adap, unsigned int mbox, + unsigned int port, struct link_config *lc, + bool sleep_ok, int timeout); + +static inline int t4_link_l1cfg(struct adapter *adapter, unsigned int mbox, + unsigned int port, struct link_config *lc) +{ + return t4_link_l1cfg_core(adapter, mbox, port, lc, + true, FW_CMD_MAX_TIMEOUT); +} + +static inline int t4_link_l1cfg_ns(struct adapter *adapter, unsigned int mbox, + unsigned int port, struct link_config *lc) +{ + return t4_link_l1cfg_core(adapter, mbox, port, lc, + false, FW_CMD_MAX_TIMEOUT); +} + int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); u32 t4_read_pcie_cfg4(struct adapter *adap, int reg); diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 130d1ee..513e1d3 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c @@ -301,14 +301,14 @@ void t4_os_link_changed(struct adapter *adapter, int port_id, int link_stat) } } -void t4_os_portmod_changed(const struct adapter *adap, int port_id) +void t4_os_portmod_changed(struct adapter *adap, int port_id) { static const char *mod_str[] = { NULL, "LR", "SR", "ER", "passive DA", "active DA", "LRM" }; - const struct net_device *dev = adap->port[port_id]; - const struct port_info *pi = netdev_priv(dev); + struct net_device *dev = adap->port[port_id]; + struct port_info *pi = netdev_priv(dev); if (pi->mod_type == FW_PORT_MOD_TYPE_NONE) netdev_info(dev, "port module unplugged\n"); @@ -325,6 +325,11 @@ void t4_os_portmod_changed(const struct adapter *adap, int port_id) else netdev_info(dev, "%s: unknown module type %d inserted\n", dev->name, pi->mod_type); + + /* If the interface is running, then we'll need any "sticky" Link + * Parameters redone with a new Transceiver Module. + */ + pi->link_cfg.redo_l1cfg = netif_running(dev); } int dbfifo_int_thresh = 10; /* 10 == 640 entry threshold */ diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index df5e7c7..cc6e576 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c @@ -3941,8 +3941,8 @@ static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) CAP16_TO_CAP32(FC_RX); CAP16_TO_CAP32(FC_TX); CAP16_TO_CAP32(ANEG); - CAP16_TO_CAP32(MDIX); CAP16_TO_CAP32(MDIAUTO); + CAP16_TO_CAP32(MDISTRAIGHT); CAP16_TO_CAP32(FEC_RS); CAP16_TO_CAP32(FEC_BASER_RS); CAP16_TO_CAP32(802_3_PAUSE); @@ -3982,8 +3982,8 @@ static fw_port_cap16_t fwcaps32_to_caps16(fw_port_cap32_t caps32) CAP32_TO_CAP16(802_3_PAUSE); CAP32_TO_CAP16(802_3_ASM_DIR); CAP32_TO_CAP16(ANEG); - CAP32_TO_CAP16(MDIX); CAP32_TO_CAP16(MDIAUTO); + CAP32_TO_CAP16(MDISTRAIGHT); CAP32_TO_CAP16(FEC_RS); CAP32_TO_CAP16(FEC_BASER_RS); @@ -4058,14 +4058,16 @@ static inline fw_port_cap32_t cc_to_fwcap_fec(enum cc_fec cc_fec) * - If auto-negotiation is off set the MAC to the proper speed/duplex/FC, * otherwise do it later based on the outcome of auto-negotiation. */ -int t4_link_l1cfg(struct adapter *adapter, unsigned int mbox, - unsigned int port, struct link_config *lc) +int t4_link_l1cfg_core(struct adapter *adapter, unsigned int mbox, + unsigned int port, struct link_config *lc, + bool sleep_ok, int timeout) { unsigned int fw_caps = adapter->params.fw_caps_support; - struct fw_port_cmd cmd; - unsigned int fw_mdi = FW_PORT_CAP32_MDI_V(FW_PORT_CAP32_MDI_AUTO); fw_port_cap32_t fw_fc, cc_fec, fw_fec, rcap; + struct fw_port_cmd cmd; + unsigned int fw_mdi; + fw_mdi = (FW_PORT_CAP32_MDI_V(FW_PORT_CAP32_MDI_AUTO) & lc->pcaps); /* Convert driver coding of Pause Frame Flow Control settings into the * Firmware's API. */ @@ -4087,7 +4089,7 @@ int t4_link_l1cfg(struct adapter *adapter, unsigned int mbox, /* Figure out what our Requested Port Capabilities are going to be. */ if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { - rcap = (lc->pcaps & ADVERT_MASK) | fw_fc | fw_fec; + rcap = lc->acaps | fw_fc | fw_fec; lc->fc = lc->requested_fc & ~PAUSE_AUTONEG; lc->fec = cc_fec; } else if (lc->autoneg == AUTONEG_DISABLE) { @@ -4113,7 +4115,8 @@ int t4_link_l1cfg(struct adapter *adapter, unsigned int mbox, cmd.u.l1cfg.rcap = cpu_to_be32(fwcaps32_to_caps16(rcap)); else cmd.u.l1cfg32.rcap32 = cpu_to_be32(rcap); - return t4_wr_mbox(adapter, mbox, &cmd, sizeof(cmd), NULL); + return t4_wr_mbox_meat_timeout(adapter, mbox, &cmd, sizeof(cmd), NULL, + sleep_ok, timeout); } /** @@ -8335,6 +8338,9 @@ void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl) fc = fwcap_to_cc_pause(linkattr); speed = fwcap_to_speed(linkattr); + lc->new_module = 0; + lc->redo_l1cfg = 0; + if (mod_type != pi->mod_type) { /* With the newer SFP28 and QSFP28 Transceiver Module Types, * various fundamental Port Capabilities which used to be @@ -8369,6 +8375,8 @@ void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl) pi->port_type = port_type; pi->mod_type = mod_type; + + lc->new_module = t4_is_inserted_mod_type(mod_type); t4_os_portmod_changed(adapter, pi->port_id); } @@ -8401,6 +8409,26 @@ void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl) t4_os_link_changed(adapter, pi->port_id, link_ok); } + + if (lc->new_module && lc->redo_l1cfg) { + struct link_config old_lc; + int ret; + + /* Save the current L1 Configuration and restore it if an + * error occurs. We probably should fix the l1_cfg*() + * routines not to change the link_config when an error + * occurs ... + */ + old_lc = *lc; + ret = t4_link_l1cfg_ns(adapter, adapter->mbox, pi->lport, lc); + if (ret) { + *lc = old_lc; + dev_warn(adapter->pdev_dev, + "Attempt to update new Transceiver Module settings failed\n"); + } + } + lc->new_module = 0; + lc->redo_l1cfg = 0; } /** diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index e6b2e95..2d91480 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h @@ -2471,8 +2471,8 @@ enum fw_port_cap { FW_PORT_CAP_FC_RX = 0x0040, FW_PORT_CAP_FC_TX = 0x0080, FW_PORT_CAP_ANEG = 0x0100, - FW_PORT_CAP_MDIX = 0x0200, - FW_PORT_CAP_MDIAUTO = 0x0400, + FW_PORT_CAP_MDIAUTO = 0x0200, + FW_PORT_CAP_MDISTRAIGHT = 0x0400, FW_PORT_CAP_FEC_RS = 0x0800, FW_PORT_CAP_FEC_BASER_RS = 0x1000, FW_PORT_CAP_FEC_RESERVED = 0x2000, @@ -2515,8 +2515,8 @@ enum fw_port_mdi { #define FW_PORT_CAP32_802_3_PAUSE 0x00040000UL #define FW_PORT_CAP32_802_3_ASM_DIR 0x00080000UL #define FW_PORT_CAP32_ANEG 0x00100000UL -#define FW_PORT_CAP32_MDIX 0x00200000UL -#define FW_PORT_CAP32_MDIAUTO 0x00400000UL +#define FW_PORT_CAP32_MDIAUTO 0x00200000UL +#define FW_PORT_CAP32_MDISTRAIGHT 0x00400000UL #define FW_PORT_CAP32_FEC_RS 0x00800000UL #define FW_PORT_CAP32_FEC_BASER_RS 0x01000000UL #define FW_PORT_CAP32_FEC_RESERVED1 0x02000000UL diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c index 798695b..3017f78 100644 --- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c @@ -341,8 +341,8 @@ static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) CAP16_TO_CAP32(FC_RX); CAP16_TO_CAP32(FC_TX); CAP16_TO_CAP32(ANEG); - CAP16_TO_CAP32(MDIX); CAP16_TO_CAP32(MDIAUTO); + CAP16_TO_CAP32(MDISTRAIGHT); CAP16_TO_CAP32(FEC_RS); CAP16_TO_CAP32(FEC_BASER_RS); CAP16_TO_CAP32(802_3_PAUSE);