| Message ID | 20180427001745.4116-1-david@lechnology.com |
|---|---|
| Headers | show |
| Series | ARM: davinci: convert to common clock framework | expand |
2018-04-27 2:17 GMT+02:00 David Lechner <david@lechnology.com>: > This removes all of the clock init code from da8xx-dt.c. This includes > all of the OF_DEV_AUXDATA that was just used for looking up clocks. > > Signed-off-by: David Lechner <david@lechnology.com> > --- > > v9 changes: > - changes to arch/arm/mach-davinci/time.c accidentally got squashed into this > commit. will drop this later. > > v8 changes: > - none > > v7 changes: > - rebased > - drop of_platform_default_populate(NULL, NULL, NULL) > - add change in pm_domain.c > > v6 changes: > - removed misleading statement from commit message > > > arch/arm/mach-davinci/da8xx-dt.c | 58 ------------------------------- > arch/arm/mach-davinci/pm_domain.c | 5 +++ > arch/arm/mach-davinci/time.c | 9 ++--- > 3 files changed, 10 insertions(+), 62 deletions(-) > > diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c > index 088bc5c0318b..23ac4108f812 100644 > --- a/arch/arm/mach-davinci/da8xx-dt.c > +++ b/arch/arm/mach-davinci/da8xx-dt.c > @@ -19,67 +19,10 @@ > #include "cp_intc.h" > #include <mach/da8xx.h> > > -static struct of_dev_auxdata da850_aemif_auxdata_lookup[] = { > - OF_DEV_AUXDATA("ti,davinci-nand", 0x62000000, "davinci-nand.0", NULL), > - {} > -}; > - > -static struct aemif_platform_data aemif_data = { > - .dev_lookup = da850_aemif_auxdata_lookup, > -}; > - > -static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { > - OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL), > - OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL), > - OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL), > - OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL), > - OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm.0", NULL), > - OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm.1", NULL), > - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap.0", NULL), > - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap.1", NULL), > - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap.2", NULL), > - OF_DEV_AUXDATA("ti,da830-spi", 0x01c41000, "spi_davinci.0", NULL), > - OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL), > - OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL), > - OF_DEV_AUXDATA("ns16550a", 0x01d0c000, "serial8250.1", NULL), > - OF_DEV_AUXDATA("ns16550a", 0x01d0d000, "serial8250.2", NULL), > - OF_DEV_AUXDATA("ti,davinci_mdio", 0x01e24000, "davinci_mdio.0", NULL), > - OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e20000, "davinci_emac.1", > - NULL), > - OF_DEV_AUXDATA("ti,da830-mcasp-audio", 0x01d00000, "davinci-mcasp.0", NULL), > - OF_DEV_AUXDATA("ti,da850-aemif", 0x68000000, "ti-aemif", &aemif_data), > - OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL), > - OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci-da8xx", NULL), > - OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL), > - OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL), > - OF_DEV_AUXDATA("ti,da850-ahci", 0x01e18000, "ahci_da850", NULL), > - OF_DEV_AUXDATA("ti,da850-vpif", 0x01e17000, "vpif", NULL), > - OF_DEV_AUXDATA("ti,da850-dsp", 0x11800000, "davinci-rproc.0", NULL), > - {} > -}; > - > #ifdef CONFIG_ARCH_DAVINCI_DA850 > > static void __init da850_init_machine(void) > { > - /* All existing boards use 100MHz SATA refclkpn */ > - static const unsigned long sata_refclkpn = 100 * 1000 * 1000; > - > - int ret; > - > - da850_register_clocks(); > - > - ret = da8xx_register_usb_phy_clocks(); > - if (ret) > - pr_warn("%s: USB PHY CLK registration failed: %d\n", > - __func__, ret); > - > - ret = da850_register_sata_refclk(sata_refclkpn); > - if (ret) > - pr_warn("%s: registering SATA REFCLK failed: %d", > - __func__, ret); > - > - of_platform_default_populate(NULL, da850_auxdata_lookup, NULL); > davinci_pm_init(); > pdata_quirks_init(); > } > @@ -94,7 +37,6 @@ static const char *const da850_boards_compat[] __initconst = { > > DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x") > .map_io = da850_init, > - .init_time = da850_init_time, > .init_machine = da850_init_machine, > .dt_compat = da850_boards_compat, > .init_late = davinci_init_late, > diff --git a/arch/arm/mach-davinci/pm_domain.c b/arch/arm/mach-davinci/pm_domain.c > index 78eac2c0c146..e251fd593bfd 100644 > --- a/arch/arm/mach-davinci/pm_domain.c > +++ b/arch/arm/mach-davinci/pm_domain.c > @@ -13,6 +13,7 @@ > #include <linux/pm_runtime.h> > #include <linux/pm_clock.h> > #include <linux/platform_device.h> > +#include <linux/of.h> > > static struct dev_pm_domain davinci_pm_domain = { > .ops = { > @@ -28,6 +29,10 @@ static struct pm_clk_notifier_block platform_bus_notifier = { > > static int __init davinci_pm_runtime_init(void) > { > + if (of_have_populated_dt()) > + return 0; > + > + /* Use pm_clk as fallback if we're not using genpd. */ > pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier); > > return 0; > diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c > index 7a8c6fada644..77ad95913dfa 100644 > --- a/arch/arm/mach-davinci/time.c > +++ b/arch/arm/mach-davinci/time.c > @@ -409,11 +409,12 @@ static int __init of_davinci_timer_init(struct device_node *np) > > /* > * Fall back to using ref_clk if the actual clock is not > - * available. This currently always happens because platform > - * clocks (i.e PLLs and PSCs) are registered as platform > - * devices and therefore are not available at this point in > - * the boot process. > + * available. There will be problems later if the real clock > + * source is disabled. > */ > + > + pr_warn("%s: falling back to ref_clk\n", __func__); > + > clkspec.np = of_find_node_by_name(NULL, "ref_clk"); > if (IS_ERR(clkspec.np)) { > pr_err("%s: No clock available for timer!\n", __func__); > -- > 2.17.0 > The following headers can be removed: -#include <linux/io.h> -#include <linux/of_irq.h> -#include <linux/of_platform.h> -#include <linux/irqdomain.h> -#include <linux/platform_data/ti-aemif.h> -#include "cp_intc.h" Thanks, Bart -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
2018-04-27 2:17 GMT+02:00 David Lechner <david@lechnology.com>: > This series converts mach-davinci to use the common clock framework. > > The series works like this, the first 3 patches fix some issues with the clock > drivers that have already been accepted into the mainline kernel. > > Then, starting with "ARM: davinci: pass clock as parameter to > davinci_timer_init()", we get the mach code ready for the switch by adding the > code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK > around the legacy clocks so that we can switch easily between the old and the > new. > > "ARM: davinci: switch to common clock framework" actually flips the switch > to start using the new clock drivers. Then the next 8 patches remove all > of the old clock code. > > The final four patches add device tree clock support to the one SoC that > supports it. > > This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy > board file). > > > Changes: > > v9 changes (also see individual patches for details): > - Rebased on linux-davnci/master (f5e3203bb775) > - Dropped drivers/clk patches that landed in v4.17 > - New drivers/clk patches for early boot special case > - New patch for ti,davinci-timer device tree bindings > - Updated mach/davinci patches to register clocks in early boot when needed > > v8 changes (also see individual patches for details): > - Rebased on linux-davinci/master > - Dropped use of __init and __initconst attributes in clk drivers > - Add clkdev lookups for PLL SYSCLKs > - Fix genpd clock reference counting issue > - Fix PSC clock driver loading order issue > - Fix typo in device tree and add more power-domains properties > > v7 changes (also see individual patches for details): > - Rebased on linux-davinci/master (v4.16-rc) > - Convert clock drivers to platform devices > - New patch "ARM: davinci: pass clock as parameter to davinci_timer_init()" > - Fix issues with lcdk and aemif clock lookups and power domains > - Fixed other minor issues brought up in v6 review > > v6 changes (also see individual patches for details): > - All of the device tree bindings are changed > - All of the clock drivers are changed significantly > - Fixed issues brought up during review of v5 > - "ARM: davinci: move davinci_clk_init() to init_time" is removed from this > series and submitted separately > > v5 changes: > - Basically, this is an entirely new series > - Patches are broken up into bite-sized pieces > - Converted PSC clock driver to use regmap > - Restored "force" flag for certain DA850 clocks > - Added device tree bindings > - Moved more of the clock init to drivers/clk > - Fixed frequency scaling (maybe*) > > * I have frequency scaling using cpufreq-dt, so I know the clocks are doing > what they need to do to make this work, but I haven't figured out how to > test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will be > sent separately after this series has landed.) > > > Dependencies: > > Only one dependency didn't land in v4.17. It is just a runtime dependency for > the LCDK board to make the display work. > > - "drm/tilcdc: Fix setting clock divider for omap-l138"[1] > > [1]: https://patchwork.freedesktop.org/patch/210696/ > > You can find a working branch with everything included (plus a few extras, like > cpufreq-dt) in the "common-clk-v8" branch of https://github.com/dlech/ev3dev-kernel.git. > > > Testing/debugging for the uninitiated: > > I only have one device to test with, which is based on da850, so I will > have to rely on others to do some testing here. Since we are dealing with > clocks, if something isn't working, you most likely won't see output on > the serial port. To figure out what is going on, you need to enable... > > CONFIG_DEBUG_LL=y > CONFIG_EARLY_PRINTK=y > > and add "earlyprintk clk_ignore_unused" to the kernel command line options. > You may need to select a different UART for this depending on your board. I > think UART1 is the default in the kernel configuration. > > On da850 devices comment out the lines: > > else > clk_set_parent(clk, parent->clk); > > in da850.c or, if using device tree, comment out the lines: > > assigned-clocks = <&async3_clk>; > assigned-clock-parents = <&pll1_sysclk 2>; > > in da850.dtsi when doing earlyprintk, otherwise the UART1 and UART2 clock > source will change during boot and cause garbled output after a point. > > Hi David, Sekhar, Patches 3-5 from the reset series[1] should go in before this series or we'll be getting WARN's from the common clock framework core about unprepared clocks on boards using the remoteproc driver. Thanks, Bartosz [1] https://lkml.org/lkml/2018/4/17/1000 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
2018-04-27 2:17 GMT+02:00 David Lechner <david@lechnology.com>: > This series converts mach-davinci to use the common clock framework. > > The series works like this, the first 3 patches fix some issues with the clock > drivers that have already been accepted into the mainline kernel. > > Then, starting with "ARM: davinci: pass clock as parameter to > davinci_timer_init()", we get the mach code ready for the switch by adding the > code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK > around the legacy clocks so that we can switch easily between the old and the > new. > > "ARM: davinci: switch to common clock framework" actually flips the switch > to start using the new clock drivers. Then the next 8 patches remove all > of the old clock code. > > The final four patches add device tree clock support to the one SoC that > supports it. > > This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy > board file). > > > Changes: > > v9 changes (also see individual patches for details): > - Rebased on linux-davnci/master (f5e3203bb775) > - Dropped drivers/clk patches that landed in v4.17 > - New drivers/clk patches for early boot special case > - New patch for ti,davinci-timer device tree bindings > - Updated mach/davinci patches to register clocks in early boot when needed > > v8 changes (also see individual patches for details): > - Rebased on linux-davinci/master > - Dropped use of __init and __initconst attributes in clk drivers > - Add clkdev lookups for PLL SYSCLKs > - Fix genpd clock reference counting issue > - Fix PSC clock driver loading order issue > - Fix typo in device tree and add more power-domains properties > > v7 changes (also see individual patches for details): > - Rebased on linux-davinci/master (v4.16-rc) > - Convert clock drivers to platform devices > - New patch "ARM: davinci: pass clock as parameter to davinci_timer_init()" > - Fix issues with lcdk and aemif clock lookups and power domains > - Fixed other minor issues brought up in v6 review > > v6 changes (also see individual patches for details): > - All of the device tree bindings are changed > - All of the clock drivers are changed significantly > - Fixed issues brought up during review of v5 > - "ARM: davinci: move davinci_clk_init() to init_time" is removed from this > series and submitted separately > > v5 changes: > - Basically, this is an entirely new series > - Patches are broken up into bite-sized pieces > - Converted PSC clock driver to use regmap > - Restored "force" flag for certain DA850 clocks > - Added device tree bindings > - Moved more of the clock init to drivers/clk > - Fixed frequency scaling (maybe*) > > * I have frequency scaling using cpufreq-dt, so I know the clocks are doing > what they need to do to make this work, but I haven't figured out how to > test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will be > sent separately after this series has landed.) > > > Dependencies: > > Only one dependency didn't land in v4.17. It is just a runtime dependency for > the LCDK board to make the display work. > > - "drm/tilcdc: Fix setting clock divider for omap-l138"[1] > > [1]: https://patchwork.freedesktop.org/patch/210696/ > > You can find a working branch with everything included (plus a few extras, like > cpufreq-dt) in the "common-clk-v8" branch of https://github.com/dlech/ev3dev-kernel.git. > > > Testing/debugging for the uninitiated: > > I only have one device to test with, which is based on da850, so I will > have to rely on others to do some testing here. Since we are dealing with > clocks, if something isn't working, you most likely won't see output on > the serial port. To figure out what is going on, you need to enable... > > CONFIG_DEBUG_LL=y > CONFIG_EARLY_PRINTK=y > > and add "earlyprintk clk_ignore_unused" to the kernel command line options. > You may need to select a different UART for this depending on your board. I > think UART1 is the default in the kernel configuration. > > On da850 devices comment out the lines: > > else > clk_set_parent(clk, parent->clk); > > in da850.c or, if using device tree, comment out the lines: > > assigned-clocks = <&async3_clk>; > assigned-clock-parents = <&pll1_sysclk 2>; > > in da850.dtsi when doing earlyprintk, otherwise the UART1 and UART2 clock > source will change during boot and cause garbled output after a point. > > > David Lechner (27): > clk: davinci: pll: allow dev == NULL > clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE > clk: davinci: psc: allow for dev == NULL > ARM: davinci: pass clock as parameter to davinci_timer_init() > ARM: davinci: da830: add new clock init using common clock framework > ARM: davinci: da850: add new clock init using common clock framework > ARM: davinci: dm355: add new clock init using common clock framework > ARM: davinci: dm365: add new clock init using common clock framework > ARM: davinci: dm644x: add new clock init using common clock framework > ARM: davinci: dm646x: add new clock init using common clock framework > ARM: davinci: da8xx: add new USB PHY clock init using common clock > framework > ARM: davinci: da8xx: add new sata_refclk init using common clock > framework > ARM: davinci: remove CONFIG_DAVINCI_RESET_CLOCKS > ARM: davinci_all_defconfig: remove CONFIG_DAVINCI_RESET_CLOCKS > ARM: davinci: switch to common clock framework > ARM: davinci: da830: Remove legacy clock init > ARM: davinci: da850: Remove legacy clock init > ARM: davinci: dm355: Remove legacy clock init > ARM: davinci: dm365: Remove legacy clock init > ARM: davinci: dm644x: Remove legacy clock init > ARM: davinci: dm646x: Remove legacy clock init > ARM: davinci: da8xx: Remove legacy USB and SATA clock init > ARM: davinci: remove legacy clocks > dt-bindings: timer: new bindings for TI DaVinci timer > ARM: davinci: add device tree support to timer > ARM: davinci: da8xx-dt: switch to device tree clocks > ARM: dts: da850: Add clocks > > .../bindings/timer/ti,davinci-timer.txt | 24 + > arch/arm/Kconfig | 5 +- > arch/arm/boot/dts/da850-enbw-cmc.dts | 4 + > arch/arm/boot/dts/da850-evm.dts | 4 + > arch/arm/boot/dts/da850-lcdk.dts | 9 + > arch/arm/boot/dts/da850-lego-ev3.dts | 4 + > arch/arm/boot/dts/da850.dtsi | 166 ++++ > arch/arm/configs/davinci_all_defconfig | 1 - > arch/arm/mach-davinci/Kconfig | 13 +- > arch/arm/mach-davinci/Makefile | 4 +- > arch/arm/mach-davinci/board-da830-evm.c | 12 +- > arch/arm/mach-davinci/board-da850-evm.c | 2 + > arch/arm/mach-davinci/board-dm355-evm.c | 2 + > arch/arm/mach-davinci/board-dm355-leopard.c | 2 + > arch/arm/mach-davinci/board-dm365-evm.c | 2 + > arch/arm/mach-davinci/board-dm644x-evm.c | 2 + > arch/arm/mach-davinci/board-dm646x-evm.c | 2 + > arch/arm/mach-davinci/board-mityomapl138.c | 2 + > arch/arm/mach-davinci/board-neuros-osd2.c | 2 + > arch/arm/mach-davinci/board-omapl138-hawk.c | 11 +- > arch/arm/mach-davinci/board-sffsdr.c | 2 + > arch/arm/mach-davinci/clock.c | 745 ----------------- > arch/arm/mach-davinci/clock.h | 76 -- > arch/arm/mach-davinci/common.c | 3 - > arch/arm/mach-davinci/da830.c | 462 ++--------- > arch/arm/mach-davinci/da850.c | 778 +++--------------- > arch/arm/mach-davinci/da8xx-dt.c | 60 -- > arch/arm/mach-davinci/davinci.h | 8 + > arch/arm/mach-davinci/devices-da8xx.c | 43 +- > arch/arm/mach-davinci/devices.c | 1 - > arch/arm/mach-davinci/dm355.c | 406 ++------- > arch/arm/mach-davinci/dm365.c | 485 +---------- > arch/arm/mach-davinci/dm644x.c | 344 +------- > arch/arm/mach-davinci/dm646x.c | 372 +-------- > arch/arm/mach-davinci/include/mach/clock.h | 3 - > arch/arm/mach-davinci/include/mach/common.h | 11 +- > arch/arm/mach-davinci/include/mach/da8xx.h | 6 +- > arch/arm/mach-davinci/pm_domain.c | 5 + > arch/arm/mach-davinci/psc.c | 137 --- > arch/arm/mach-davinci/psc.h | 12 - > arch/arm/mach-davinci/time.c | 39 +- > arch/arm/mach-davinci/usb-da8xx.c | 242 +----- > drivers/clk/davinci/pll-da830.c | 4 +- > drivers/clk/davinci/pll-da850.c | 41 +- > drivers/clk/davinci/pll-dm355.c | 8 +- > drivers/clk/davinci/pll-dm365.c | 8 +- > drivers/clk/davinci/pll-dm644x.c | 8 +- > drivers/clk/davinci/pll-dm646x.c | 8 +- > drivers/clk/davinci/pll.c | 134 +-- > drivers/clk/davinci/pll.h | 35 +- > drivers/clk/davinci/psc-dm355.c | 2 +- > drivers/clk/davinci/psc-dm365.c | 2 +- > drivers/clk/davinci/psc-dm644x.c | 2 +- > drivers/clk/davinci/psc-dm646x.c | 2 +- > drivers/clk/davinci/psc.c | 70 +- > include/linux/clk/davinci.h | 29 + > 56 files changed, 924 insertions(+), 3942 deletions(-) > create mode 100644 Documentation/devicetree/bindings/timer/ti,davinci-timer.txt > delete mode 100644 arch/arm/mach-davinci/clock.c > delete mode 100644 arch/arm/mach-davinci/psc.c > create mode 100644 include/linux/clk/davinci.h > > -- > 2.17.0 > Hi Arnd, I know you're on vacation, but I thought I'd Cc you on this thread to show you what kind of workarounds we need without unifying the early probing mechanisms. This is a very good example of the problem we're trying to solve. Best regards, Bartosz Golaszewski -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > This modifies the TI DaVinci PLL clock driver to allow for the case > when dev == NULL. On some (most) SoCs that use this driver, the PLL > clock needs to be registered during early boot because it is used > for clocksource/clockevent and there will be no platform device available. > > Signed-off-by: David Lechner <david@lechnology.com> > diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c > index 23a24c944f1d..7c4d808b8fdb 100644 > --- a/drivers/clk/davinci/pll.c > +++ b/drivers/clk/davinci/pll.c > @@ -111,6 +111,31 @@ struct davinci_pll_clk { > #define to_davinci_pll_clk(_hw) \ > container_of((_hw), struct davinci_pll_clk, hw) > > +static inline void *_devm_kzalloc(struct device *dev, size_t size, gfp_t flags) > +{ > + if (dev) > + return devm_kzalloc(dev, size, flags); > + > + return kzalloc(size, flags); I would shift to using kzalloc() only. The utility of devm_kzalloc() is gone if you cannot always rely on it since you have to handle the free for the other case. Same thing for other devres APIs below. > +} > + > +static inline void *_devm_kmalloc_array(struct device *dev, size_t n, > + size_t size, gfp_t flags) > +{ > + if (dev) > + return devm_kmalloc_array(dev, n, size, flags); > + > + return kmalloc_array(n, size, flags); > +} > + > +static inline struct clk *_devm_clk_register(struct device *dev, struct clk_hw *hw) > +{ > + if (dev) > + return devm_clk_register(dev, hw); > + > + return clk_register(NULL, hw); > +} > + > diff --git a/drivers/clk/davinci/pll.h b/drivers/clk/davinci/pll.h > index b1b6fb23f972..92a0978a7d29 100644 > --- a/drivers/clk/davinci/pll.h > +++ b/drivers/clk/davinci/pll.h > @@ -11,6 +11,7 @@ > #include <linux/bitops.h> > #include <linux/clk-provider.h> > #include <linux/of.h> > +#include <linux/regmap.h> > #include <linux/types.h> > > #define PLL_HAS_CLKMODE BIT(0) /* PLL has PLLCTL[CLKMODE] */ > @@ -94,7 +95,8 @@ struct davinci_pll_obsclk_info { > struct clk *davinci_pll_clk_register(struct device *dev, > const struct davinci_pll_clk_info *info, > const char *parent_name, > - void __iomem *base); > + void __iomem *base, > + struct regmap *cfgchip); > struct clk *davinci_pll_auxclk_register(struct device *dev, > const char *name, > void __iomem *base); > @@ -110,32 +112,33 @@ davinci_pll_sysclk_register(struct device *dev, > const struct davinci_pll_sysclk_info *info, > void __iomem *base); > > -int of_davinci_pll_init(struct device *dev, > +int of_davinci_pll_init(struct device *dev, struct device_node *node, > const struct davinci_pll_clk_info *info, > const struct davinci_pll_obsclk_info *obsclk_info, > const struct davinci_pll_sysclk_info **div_info, > u8 max_sysclk_id, > - void __iomem *base); > + void __iomem *base, > + struct regmap *cfgchip); > > /* Platform-specific callbacks */ > > -int da830_pll_init(struct device *dev, void __iomem *base); > +int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); > > -int da850_pll0_init(struct device *dev, void __iomem *base); > -int da850_pll1_init(struct device *dev, void __iomem *base); > -int of_da850_pll0_init(struct device *dev, void __iomem *base); > -int of_da850_pll1_init(struct device *dev, void __iomem *base); > +int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); Having this declared both here and in include/linux/clk/davinci.h is strange. Can we include that file directly where its needed? > diff --git a/include/linux/clk/davinci.h b/include/linux/clk/davinci.h > new file mode 100644 > index 000000000000..1298cca509ac > --- /dev/null > +++ b/include/linux/clk/davinci.h > @@ -0,0 +1,24 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Clock driver for TI Davinci PSC controllers PSC/PLL controllers. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > PLL0 on davinci/da850-type device needs to be registered early in boot > because it is needed for clocksource/clockevent. Change the driver > to use CLK_OF_DECLARE for this special case. > > Signed-off-by: David Lechner <david@lechnology.com> > --- > > v9 changes: > - new patch in v9 > > > drivers/clk/davinci/pll-da850.c | 26 ++++++++++++++++++++++---- > drivers/clk/davinci/pll.c | 4 +++- > drivers/clk/davinci/pll.h | 2 +- > 3 files changed, 26 insertions(+), 6 deletions(-) > > diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c > index 00a6ece7b524..743527de1da2 100644 > --- a/drivers/clk/davinci/pll-da850.c > +++ b/drivers/clk/davinci/pll-da850.c > @@ -12,6 +12,8 @@ > #include <linux/init.h> > #include <linux/kernel.h> > #include <linux/mfd/da8xx-cfgchip.h> > +#include <linux/mfd/syscon.h> > +#include <linux/of_address.h> > #include <linux/of.h> > #include <linux/types.h> > > @@ -135,11 +137,27 @@ static const struct davinci_pll_sysclk_info *da850_pll0_sysclk_info[] = { > NULL > }; > > -int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) > +void of_da850_pll0_init(struct device_node *node) > { > - return of_davinci_pll_init(dev, dev->of_node, &da850_pll0_info, > - &da850_pll0_obsclk_info, > - da850_pll0_sysclk_info, 7, base, cfgchip); > + void __iomem *base; > + struct regmap *cfgchip; > + > + base = of_iomap(node, 0); > + if (!base) { > + pr_err("%s: ioremap failed\n", __func__); > + return; > + } > + > + cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); > + if (IS_ERR(cfgchip)) { > + pr_warn("%s: failed to get cfgchip (%ld)\n", __func__, > + PTR_ERR(cfgchip)); > + cfgchip = NULL; > + } Is this error handling for cfgchip needed here considering davinci_pll_clk_register() already checks and warns. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > +static inline void *_devm_kzalloc(struct device *dev, size_t size, gfp_t flags) > +{ > + if (dev) > + return devm_kzalloc(dev, size, flags); > + > + return kzalloc(size, flags); > +} I have the same question on the utility of this. A memory allocation error so early on is not going to result in a bootable system anyway. So, I wonder if its better to just BUG() in such cases. That will actually help faster debug than returning an error back. I know the push back on using BUG(), but clock drivers are special, and I think thats why its seems to be used quite a bit already. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > This changes davinci_timer_init() so that we pass the clock as a > parameter instead of using clk_get(). This is done in preparation > for converting to the common clock framework. > > It removes the requirement that we have to have a clock with con_id > of "timer0", which will be good for DT bindings since clock-names = > "timer0" doesn't really make sense. > > Also, drop use of extern in header file since we are touching the > definition. > > Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > This adds the new board-specific clock init in mach-davinci/da830.c > using the new common clock framework drivers. > > The #ifdefs are needed to prevent compile errors until the entire > ARCH_DAVINCI is converted. > > Also clean up the #includes since we are adding some here. > > Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > This adds the new board-specific clock init in mach-davinci/da850.c > using the new common clock framework drivers. > > The #ifdefs are needed to prevent compile errors until the entire > ARCH_DAVINCI is converted. > > Also clean up the #includes since we are adding some here. > > Some CFGCHIP macros were removed because we are now including > linux/mfd/da8xx-cfgchip.h which defines the same values. > > Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > This series converts mach-davinci to use the common clock framework. > > The series works like this, the first 3 patches fix some issues with the clock > drivers that have already been accepted into the mainline kernel. > > Then, starting with "ARM: davinci: pass clock as parameter to > davinci_timer_init()", we get the mach code ready for the switch by adding the > code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK > around the legacy clocks so that we can switch easily between the old and the > new. > > "ARM: davinci: switch to common clock framework" actually flips the switch > to start using the new clock drivers. Then the next 8 patches remove all > of the old clock code. > > The final four patches add device tree clock support to the one SoC that > supports it. > > This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy > board file). I have reviewed this series and looks good to me except some comments I gave and some issues you have identified yourself in patches 25 and 26. I think this is a good compromise to achieve platform device based clocks as far as possible with current kernel framework. I know Bartosz is working on solving the problem generically and I guess once thats agreed upon, DaVinci can convert too. But I think this series has been in the works for far too long and should be merged (the remoteproc dependencies that Bartosz pointed out should be resolved too). You can wait for clock maintainers opinion though before spinning another version. I have not tested this series yet, will do so soon. Thanks, Sekhar PS: I started giving a Reviewed-by: for the mach-davinci patches before realizing the futility of doing so and stopped mid-way. They will have my sign-off anyway once I test and merge them. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 05/01/2018 08:27 AM, Sekhar Nori wrote: > On Friday 27 April 2018 05:47 AM, David Lechner wrote: >> This modifies the TI DaVinci PLL clock driver to allow for the case >> when dev == NULL. On some (most) SoCs that use this driver, the PLL >> clock needs to be registered during early boot because it is used >> for clocksource/clockevent and there will be no platform device available. >> >> Signed-off-by: David Lechner <david@lechnology.com> > >> diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c >> index 23a24c944f1d..7c4d808b8fdb 100644 >> --- a/drivers/clk/davinci/pll.c >> +++ b/drivers/clk/davinci/pll.c >> @@ -111,6 +111,31 @@ struct davinci_pll_clk { >> #define to_davinci_pll_clk(_hw) \ >> container_of((_hw), struct davinci_pll_clk, hw) >> >> +static inline void *_devm_kzalloc(struct device *dev, size_t size, gfp_t flags) >> +{ >> + if (dev) >> + return devm_kzalloc(dev, size, flags); >> + >> + return kzalloc(size, flags); > > I would shift to using kzalloc() only. The utility of devm_kzalloc() is > gone if you cannot always rely on it since you have to handle the free > for the other case. Same thing for other devres APIs below. > I omitted the usual unwinding on failure since if a non-platform-device clock fails to init, then Linux won't boot anyway. I left the devm stuff in there since there is one case where this driver is still used as a platform device, thinking that there could be an EPROBE_DEFER. However I think all uses of these inline functions are after the last possible EPROBE_DEFER, so doing as you suggest is probably just fine. >> +} >> + >> +static inline void *_devm_kmalloc_array(struct device *dev, size_t n, >> + size_t size, gfp_t flags) >> +{ >> + if (dev) >> + return devm_kmalloc_array(dev, n, size, flags); >> + >> + return kmalloc_array(n, size, flags); >> +} >> + >> +static inline struct clk *_devm_clk_register(struct device *dev, struct clk_hw *hw) >> +{ >> + if (dev) >> + return devm_clk_register(dev, hw); >> + >> + return clk_register(NULL, hw); >> +} >> + > > >> diff --git a/drivers/clk/davinci/pll.h b/drivers/clk/davinci/pll.h >> index b1b6fb23f972..92a0978a7d29 100644 >> --- a/drivers/clk/davinci/pll.h >> +++ b/drivers/clk/davinci/pll.h >> @@ -11,6 +11,7 @@ >> #include <linux/bitops.h> >> #include <linux/clk-provider.h> >> #include <linux/of.h> >> +#include <linux/regmap.h> >> #include <linux/types.h> >> >> #define PLL_HAS_CLKMODE BIT(0) /* PLL has PLLCTL[CLKMODE] */ >> @@ -94,7 +95,8 @@ struct davinci_pll_obsclk_info { >> struct clk *davinci_pll_clk_register(struct device *dev, >> const struct davinci_pll_clk_info *info, >> const char *parent_name, >> - void __iomem *base); >> + void __iomem *base, >> + struct regmap *cfgchip); >> struct clk *davinci_pll_auxclk_register(struct device *dev, >> const char *name, >> void __iomem *base); >> @@ -110,32 +112,33 @@ davinci_pll_sysclk_register(struct device *dev, >> const struct davinci_pll_sysclk_info *info, >> void __iomem *base); >> >> -int of_davinci_pll_init(struct device *dev, >> +int of_davinci_pll_init(struct device *dev, struct device_node *node, >> const struct davinci_pll_clk_info *info, >> const struct davinci_pll_obsclk_info *obsclk_info, >> const struct davinci_pll_sysclk_info **div_info, >> u8 max_sysclk_id, >> - void __iomem *base); >> + void __iomem *base, >> + struct regmap *cfgchip); >> >> /* Platform-specific callbacks */ >> >> -int da830_pll_init(struct device *dev, void __iomem *base); >> +int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); >> >> -int da850_pll0_init(struct device *dev, void __iomem *base); >> -int da850_pll1_init(struct device *dev, void __iomem *base); >> -int of_da850_pll0_init(struct device *dev, void __iomem *base); >> -int of_da850_pll1_init(struct device *dev, void __iomem *base); >> +int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); > > Having this declared both here and in include/linux/clk/davinci.h is > strange. Can we include that file directly where its needed? > Sure thing. There are a number of duplicates that can be eliminated. >> diff --git a/include/linux/clk/davinci.h b/include/linux/clk/davinci.h >> new file mode 100644 >> index 000000000000..1298cca509ac >> --- /dev/null >> +++ b/include/linux/clk/davinci.h >> @@ -0,0 +1,24 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Clock driver for TI Davinci PSC controllers > > PSC/PLL controllers. > > Thanks, > Sekhar > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 05/01/2018 08:46 AM, Sekhar Nori wrote: > On Friday 27 April 2018 05:47 AM, David Lechner wrote: >> PLL0 on davinci/da850-type device needs to be registered early in boot >> because it is needed for clocksource/clockevent. Change the driver >> to use CLK_OF_DECLARE for this special case. >> >> Signed-off-by: David Lechner <david@lechnology.com> >> --- >> >> v9 changes: >> - new patch in v9 >> >> >> drivers/clk/davinci/pll-da850.c | 26 ++++++++++++++++++++++---- >> drivers/clk/davinci/pll.c | 4 +++- >> drivers/clk/davinci/pll.h | 2 +- >> 3 files changed, 26 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c >> index 00a6ece7b524..743527de1da2 100644 >> --- a/drivers/clk/davinci/pll-da850.c >> +++ b/drivers/clk/davinci/pll-da850.c >> @@ -12,6 +12,8 @@ >> #include <linux/init.h> >> #include <linux/kernel.h> >> #include <linux/mfd/da8xx-cfgchip.h> >> +#include <linux/mfd/syscon.h> >> +#include <linux/of_address.h> >> #include <linux/of.h> >> #include <linux/types.h> >> >> @@ -135,11 +137,27 @@ static const struct davinci_pll_sysclk_info *da850_pll0_sysclk_info[] = { >> NULL >> }; >> >> -int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) >> +void of_da850_pll0_init(struct device_node *node) >> { >> - return of_davinci_pll_init(dev, dev->of_node, &da850_pll0_info, >> - &da850_pll0_obsclk_info, >> - da850_pll0_sysclk_info, 7, base, cfgchip); >> + void __iomem *base; >> + struct regmap *cfgchip; >> + >> + base = of_iomap(node, 0); >> + if (!base) { >> + pr_err("%s: ioremap failed\n", __func__); >> + return; >> + } >> + >> + cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); >> + if (IS_ERR(cfgchip)) { >> + pr_warn("%s: failed to get cfgchip (%ld)\n", __func__, >> + PTR_ERR(cfgchip)); >> + cfgchip = NULL; >> + } > > Is this error handling for cfgchip needed here considering > davinci_pll_clk_register() already checks and warns. Ah, good point. I'll clean this up. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 05/01/2018 09:02 AM, Sekhar Nori wrote: > On Friday 27 April 2018 05:47 AM, David Lechner wrote: >> +static inline void *_devm_kzalloc(struct device *dev, size_t size, gfp_t flags) >> +{ >> + if (dev) >> + return devm_kzalloc(dev, size, flags); >> + >> + return kzalloc(size, flags); >> +} > > I have the same question on the utility of this. A memory allocation > error so early on is not going to result in a bootable system anyway. > So, I wonder if its better to just BUG() in such cases. That will > actually help faster debug than returning an error back. I know the push > back on using BUG(), but clock drivers are special, and I think thats > why its seems to be used quite a bit already. > Same reply here as well. On DA850/DA830, you might not get a console, but you will "boot" even if one of the PSC devices fails though. WARN() is probably just as good as BUG() in this case too. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wednesday 02 May 2018 07:19 AM, David Lechner wrote: > On 05/01/2018 09:02 AM, Sekhar Nori wrote: >> On Friday 27 April 2018 05:47 AM, David Lechner wrote: >>> +static inline void *_devm_kzalloc(struct device *dev, size_t size, >>> gfp_t flags) >>> +{ >>> + if (dev) >>> + return devm_kzalloc(dev, size, flags); >>> + >>> + return kzalloc(size, flags); >>> +} >> >> I have the same question on the utility of this. A memory allocation >> error so early on is not going to result in a bootable system anyway. >> So, I wonder if its better to just BUG() in such cases. That will >> actually help faster debug than returning an error back. I know the push >> back on using BUG(), but clock drivers are special, and I think thats >> why its seems to be used quite a bit already. >> > > Same reply here as well. On DA850/DA830, you might not get a console, > but you will "boot" even if one of the PSC devices fails though. Was not thinking of failure to boot due to clocks being disabled, but the fact that you are not able to allocate a small amount of memory so early in boot process. The chances of successful boot after memory allocation failures like that are close to zero. > WARN() is probably just as good as BUG() in this case too. Okay, but with WARN() you would continue to proceed to try to boot which is not going to be much fruitful (and might actually muddle the first failure). But up to you on this. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > void __init dm644x_init_time(void) > { > +#ifdef CONFIG_COMMON_CLK > + void __iomem *pll1, *psc; > + struct clk *clk; > + > + clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ); > + > + pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); > + dm355_pll1_init(NULL, pll1, NULL); This should be dm644x_*() > + > + psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); > + dm355_psc_init(NULL, psc); This one should be dm644x_*() With those fixes, I was able to bootup on DM644x EVM and a visual inspection of clock debug dump shows it remains same before and after the conversion. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Friday 27 April 2018 05:47 AM, David Lechner wrote: > This adds the new board-specific clock init in mach-davinci/dm355.c > using the new common clock framework drivers. > > The #ifdefs are needed to prevent compile errors until the entire > ARCH_DAVINCI is converted. > > Also clean up the #includes since we are adding some here. > > Signed-off-by: David Lechner <david@lechnology.com> I am having trouble booting DM355 EVM with the series applied. Still to debug what is going wrong. Thanks, Sekhar Uncompressing Linux... done, booting the kernel. Booting Linux on physical CPU 0x0 Linux version 4.17.0-rc2-08642-g4dee494ef1ee (a0875516@psplinux063) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #202 PREEM8 CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=0005317f CPU: VIVT data cache, VIVT instruction cache Machine: DaVinci DM355 EVM Memory policy: Data cache writethrough cma: Reserved 16 MiB at 0x86c00000 DaVinci dm355 variant 0x0 random: get_random_bytes called from start_kernel+0x88/0x3f4 with crng_init=0 Built 1 zonelists, mobility grouping on. Total pages: 32512 Kernel command line: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=172.24.210.141:/datalocal/Sekhar/new/debian/armel ip=dhcp Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) Memory: 107044K/131072K available (4684K kernel code, 283K rwdata, 1068K rodata, 240K init, 134K bss, 7644K reserved, 16384K cma-res) Virtual kernel memory layout: vector : 0xffff0000 - 0xffff1000 ( 4 kB) fixmap : 0xffc00000 - 0xfff00000 (3072 kB) vmalloc : 0xc8800000 - 0xff800000 ( 880 MB) lowmem : 0xc0000000 - 0xc8000000 ( 128 MB) modules : 0xbf000000 - 0xc0000000 ( 16 MB) .text : 0x(ptrval) - 0x(ptrval) (4686 kB) .init : 0x(ptrval) - 0x(ptrval) ( 240 kB) .data : 0x(ptrval) - 0x(ptrval) ( 284 kB) .bss : 0x(ptrval) - 0x(ptrval) ( 135 kB) SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 Preemptible hierarchical RCU implementation. Tasks RCU enabled. NR_IRQS: 245 clocksource: timer0_1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns Console: colour dummy device 80x30 Calibrating delay loop... 106.90 BogoMIPS (lpj=534528) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) CPU: Testing write buffer coherency: ok Setting up static identity map for 0x80008400 - 0x80008458 Hierarchical SRCU implementation. devtmpfs: initialized Built 1 zonelists, mobility grouping on. Total pages: 30857 clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns futex hash table entries: 256 (order: -1, 3072 bytes) pinctrl core: initialized pinctrl subsystem NET: Registered protocol family 16 DMA: preallocated 256 KiB pool for atomic coherent allocations mux: initialized INT_EDMA_CC mux: Setting register INT_EDMA_CC mux: INTMUX (0x00000018) = 0x00000000 -> 0x00000004 cpuidle: using governor menu edma edma.0: Legacy memcpy is enabled, things might not work edma edma.0: TI EDMA DMA engine driver dm355evm_msp 1-0025: firmware v.A5, TVP5146 as video-in clocksource: Switched to clocksource timer0_1 NET: Registered protocol family 2 tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes) TCP established hash table entries: 1024 (order: 0, 4096 bytes) TCP bind hash table entries: 1024 (order: 0, 4096 bytes) TCP: Hash tables configured (established 1024 bind 1024) UDP hash table entries: 256 (order: 0, 4096 bytes) UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) NET: Registered protocol family 1 RPC: Registered named UNIX socket transport module. RPC: Registered udp transport module. RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. workingset: timestamp_bits=30 max_order=15 bucket_order=0 Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251) io scheduler noop registered (default) io scheduler mq-deadline registered io scheduler kyber registered Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled console [ttyS0] disabled serial8250.0: ttyS0 at MMIO 0x1c20000 (irq = 40, base_baud = 1500000) is a 16550A console [ttyS0] enabled serial8250.1: ttyS1 at MMIO 0x1c20400 (irq = 41, base_baud = 1500000) is a 16550A serial8250 serial8250.2: unable to register port at index 0 (IO0 MEM1e06000 IRQ14): -22 brd: module loaded libphy: Fixed MDIO Bus: probed dm9000 dm9000: incomplete constraints, dummy supplies not allowed eth0: dm9000a at (ptrval),(ptrval) IRQ 65 MAC: 00:0e:99:02:cb:91 (eeprom) i2c /dev entries driver davinci-wdt davinci-wdt: heartbeat 60 sec Division by zero in kernel. CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202 Hardware name: DaVinci DM355 EVM Backtrace: [<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c) r7:00000000 r6:00000000 r5:fee11000 r4:c6acd400 [<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28) [<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20) [<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10) [<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168) r9:c6ac6b80 r8:c05ed140 r7:0000001a r6:00000001 r5:c6acd5e8 r4:c6acd400 [<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0) r5:c6acd5e8 r4:c6acd400 [<c03303e4>] (mmc_set_initial_state) from [<c03304bc>] (mmc_power_up.part.8+0x38/0x110) r5:00000015 r4:c6acd400 [<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8) r7:0000001a r6:c05ed130 r5:00000000 r4:c6acd400 [<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88) r5:00000000 r4:c6acd400 [<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc) r5:c6acd754 r4:c6acd400 [<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4) r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed r4:c05ed140 [<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c) r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed140 [<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0) r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed174 r5:c061f3e4 r4:c05ed140 [<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc) r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000 [<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28) r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4 [<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c) [<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc) r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4 [<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48) r5:c05e7008 r4:c062ae60 [<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20) [<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4) [<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4) r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8 [<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc) r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4 r4:00000000 [<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34) Exception stack(0xc6839fb0 to 0xc6839ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 r5:c04940e4 r4:00000000 Division by zero in kernel. CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202 Hardware name: DaVinci DM355 EVM Backtrace: [<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c) r7:00000000 r6:00000000 r5:fee11000 r4:c6acd400 [<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28) [<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20) [<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10) [<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168) r9:c6ac6b80 r8:c05ed140 r7:00000000 r6:00000001 r5:c6acd5e8 r4:c6acd400 [<c0343fbc>] (mmc_davinci_set_ios) from [<c033057c>] (mmc_power_up.part.8+0xf8/0x110) r5:c6acd5e8 r4:c6acd400 [<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8) r7:0000001a r6:c05ed130 r5:00000000 r4:c6acd400 [<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88) r5:00000000 r4:c6acd400 [<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc) r5:c6acd754 r4:c6acd400 [<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4) r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed r4:c05ed140 [<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c) r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed140 [<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0) r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed174 r5:c061f3e4 r4:c05ed140 [<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc) r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000 [<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28) r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4 [<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c) [<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc) r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4 [<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48) r5:c05e7008 r4:c062ae60 [<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20) [<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4) [<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4) r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8 [<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc) r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4 r4:00000000 [<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34) Exception stack(0xc6839fb0 to 0xc6839ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 r5:c04940e4 r4:00000000 Division by zero in kernel. CPU: 0 PID: 14 Comm: kworker/0:1 Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202 davinci_mmc dm6441-mmc.0: Using DMA, 4-bit mode Division by zero in kernel. Hardware name: DaVinci DM355 EVM Workqueue: events_freezable mmc_rescan Backtrace: [<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c) CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202 Hardware name: DaVinci DM355 EVM Backtrace: [<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c) r7:00000000 r6:00000000 r5:fee11000 r4:c6acd400 [<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28) r7:00000000 r6:00000000 r5:fee00000 r4:c6acd800 [<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28) [<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20) [<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20) [<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10) [<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10) [<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168) [<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168) r9:00000000 r8:c05ff7b0 r7:60000013 r6:c6acd400 r5:c6acd5e8 r4:c6acd400 r9:c6ac6d00 r8:c05ed2e0 r7:0000001b r6:00000001 r5:c6acd9e8 r4:c6acd800 [<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0) [<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0) r5:c6acd5e8 r4:c6acd400 [<c03303e4>] (mmc_set_initial_state) from [<c03307ac>] (mmc_power_off.part.9+0x30/0x44) r5:c6acd9e8 r4:c6acd800 [<c03303e4>] (mmc_set_initial_state) from [<c03304bc>] (mmc_power_up.part.8+0x38/0x110) r5:00000000 r4:c6acd400 [<c033077c>] (mmc_power_off.part.9) from [<c03317b0>] (mmc_rescan+0x3b8/0x500) r5:00000015 r4:c6acd800 [<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8) r5:00000000 r4:c6acd640 [<c03313f8>] (mmc_rescan) from [<c0031de0>] (process_one_work+0x1d8/0x41c) r7:0000001b r6:c05ed2d0 r5:00000000 r4:c6acd800 [<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88) r9:00000000 r8:c05ff7b0 r7:00000000 r6:c7ee9500 r5:c68156c0 r4:c6acd640 [<c0031c08>] (process_one_work) from [<c0032060>] (worker_thread+0x3c/0x670) r10:00000008 r9:c05ff7c4 r8:c060f080 r7:c68156d8 r6:ffffe000 r5:c05ff7b0 r5:00000000 r4:c6acd800 [<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc) r5:c6acdb54 r4:c6acd800 [<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4) r4:c68156c0 [<c0032024>] (worker_thread) from [<c0038280>] (kthread+0x134/0x14c) r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed r4:c05ed2e0 r10:c6847e90 r9:c0032024 r8:c68156c0 r7:c6878000 r6:00000000 r5:c680dee0 r4:c6868300 [<c003814c>] (kthread) from [<c00090e0>] (ret_from_fork+0x14/0x34) [<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c) Exception stack(0xc6879fb0 to 0xc6879ff8) 9fa0: 00000000 00000000 00000000 00000000 r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed2e0 [<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0) 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed314 r5:c061f3e4 r4:c05ed2e0 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c003814c [<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc) r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000 r4:c680dee0 [<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28) r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4 [<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c) [<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc) r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4 [<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48) r5:c05e7008 r4:c062ae60 [<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20) [<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4) [<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4) r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8 [<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc) r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4 random: fast init done r4:00000000 [<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34) Exception stack(0xc6839fb0 to 0xc6839ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 r5:c04940e4 r4:00000000 Division by zero in kernel. CPU: 0 PID: 1 Comm: swapper Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202 Hardware name: DaVinci DM355 EVM Backtrace: [<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c) r7:00000000 r6:00000000 r5:fee00000 r4:c6acd800 [<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28) [<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20) [<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10) [<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168) r9:c6ac6d00 r8:c05ed2e0 r7:00000000 r6:00000001 r5:c6acd9e8 r4:c6acd800 [<c0343fbc>] (mmc_davinci_set_ios) from [<c033057c>] (mmc_power_up.part.8+0xf8/0x110) r5:c6acd9e8 r4:c6acd800 [<c0330484>] (mmc_power_up.part.8) from [<c033198c>] (mmc_start_host+0x94/0xa8) r7:0000001b r6:c05ed2d0 r5:00000000 r4:c6acd800 [<c03318f8>] (mmc_start_host) from [<c0332c5c>] (mmc_add_host+0x60/0x88) r5:00000000 r4:c6acd800 [<c0332bfc>] (mmc_add_host) from [<c0344630>] (davinci_mmcsd_probe+0x3f8/0x5dc) r5:c6acdb54 r4:c6acd800 [<c0344238>] (davinci_mmcsd_probe) from [<c02d1f70>] (platform_drv_probe+0x58/0xb4) r10:c05a61d4 r9:00000000 r8:00000000 r7:fffffdfb r6:c061f3e4 r5:ffffffed r4:c05ed2e0 [<c02d1f18>] (platform_drv_probe) from [<c02d0380>] (driver_probe_device+0x258/0x33c) r7:c061f3e4 r6:00000000 r5:c06458d0 r4:c05ed2e0 [<c02d0128>] (driver_probe_device) from [<c02d0510>] (__driver_attach+0xac/0xb0) r9:00000000 r8:ffffe000 r7:c05e7008 r6:c05ed314 r5:c061f3e4 r4:c05ed2e0 [<c02d0464>] (__driver_attach) from [<c02ce384>] (bus_for_each_dev+0x78/0xbc) r7:c05e7008 r6:c02d0464 r5:c061f3e4 r4:00000000 [<c02ce30c>] (bus_for_each_dev) from [<c02cfcc4>] (driver_attach+0x20/0x28) r7:00000000 r6:c061b670 r5:c6ad7960 r4:c061f3e4 [<c02cfca4>] (driver_attach) from [<c02cf704>] (bus_add_driver+0x178/0x20c) [<c02cf58c>] (bus_add_driver) from [<c02d0f00>] (driver_register+0x80/0xfc) r7:00000000 r6:c05c4a30 r5:c05e7008 r4:c061f3e4 [<c02d0e80>] (driver_register) from [<c02d1ebc>] (__platform_driver_register+0x34/0x48) r5:c05e7008 r4:c062ae60 [<c02d1e88>] (__platform_driver_register) from [<c05c4a48>] (davinci_mmcsd_driver_init+0x18/0x20) [<c05c4a30>] (davinci_mmcsd_driver_init) from [<c000a56c>] (do_one_initcall+0x50/0x1a4) [<c000a51c>] (do_one_initcall) from [<c05a8eb4>] (kernel_init_freeable+0x120/0x1e4) r8:c05a8614 r7:c05d4830 r6:00000007 r5:c062ae60 r4:c05e2ae8 [<c05a8d94>] (kernel_init_freeable) from [<c04940f4>] (kernel_init+0x10/0xfc) r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04940e4 r4:00000000 [<c04940e4>] (kernel_init) from [<c00090e0>] (ret_from_fork+0x14/0x34) Exception stack(0xc6839fb0 to 0xc6839ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 r5:c04940e4 r4:00000000 Division by zero in kernel. CPU: 0 PID: 14 Comm: kworker/0:1 Not tainted 4.17.0-rc2-08642-g4dee494ef1ee #202 davinci_mmc dm6441-mmc.1: Using DMA, 4-bit mode NET: Registered protocol family 10 Hardware name: DaVinci DM355 EVM Workqueue: events_freezable mmc_rescan Backtrace: [<c000dfa4>] (dump_backtrace) from [<c000e274>] (show_stack+0x18/0x1c) r7:00000000 r6:00000000 r5:fee00000 r4:c6acd800 [<c000e25c>] (show_stack) from [<c047eedc>] (dump_stack+0x20/0x28) Segment Routing with IPv6 sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver NET: Registered protocol family 17 [<c047eebc>] (dump_stack) from [<c000e104>] (__div0+0x18/0x20) [<c000e0ec>] (__div0) from [<c047d510>] (Ldiv0+0x8/0x10) [<c0343e48>] (calculate_clk_divider) from [<c0344014>] (mmc_davinci_set_ios+0x58/0x168) r9:00000000 r8:c05ff7b0 r7:60000013 r6:c6acd800 r5:c6acd9e8 r4:c6acd800 [<c0343fbc>] (mmc_davinci_set_ios) from [<c0330480>] (mmc_set_initial_state+0x9c/0xa0) r5:c6acd9e8 r4:c6acd800 [<c03303e4>] (mmc_set_initial_state) from [<c03307ac>] (mmc_power_off.part.9+0x30/0x44) r5:00000000 r4:c6acd800 [<c033077c>] (mmc_power_off.part.9) from [<c03317b0>] (mmc_rescan+0x3b8/0x500) r5:00000000 r4:c6acda40 [<c03313f8>] (mmc_rescan) from [<c0031de0>] (process_one_work+0x1d8/0x41c) r9:00000000 r8:c05ff7b0 r7:00000000 r6:c7ee9500 r5:c68156c0 r4:c6acda40 [<c0031c08>] (process_one_work) from [<c0032060>] (worker_thread+0x3c/0x670) r10:00000008 r9:c05ff7c4 r8:c060f080 r7:c68156d8 r6:ffffe000 r5:c05ff7b0 r4:c68156c0 [<c0032024>] (worker_thread) from [<c0038280>] (kthread+0x134/0x14c) r10:c6847e90 r9:c0032024 r8:c68156c0 r7:c6878000 r6:00000000 r5:c680dee0 r4:c6868300 [<c003814c>] (kthread) from [<c00090e0>] (ret_from_fork+0x14/0x34) Exception stack(0xc6879fb0 to 0xc6879ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c003814c r4:c680dee0 console [netcon0] enabled netconsole: network logging started hctosys: unable to open rtc device (rtc0) dm9000 dm9000 eth0: link down IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready Sending DHCP requests . dm9000 dm9000 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1 , OK IP-Config: Got DHCP answer from 172.24.188.3, my address is 172.24.190.9 IP-Config: Complete: device=eth0, hwaddr=00:0e:99:02:cb:91, ipaddr=172.24.190.9, mask=255.255.252.0, gw=172.24.188.1 host=172.24.190.9, domain=india.ti.com, nis-domain=(none) bootserver=0.0.0.0, rootserver=172.24.210.141, rootpath= nameserver0=192.0.2.2, nameserver1=192.0.2.3 this is MT29F16G08FAA device -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 05/03/2018 10:34 AM, Sekhar Nori wrote: > On Friday 27 April 2018 05:47 AM, David Lechner wrote: >> This adds the new board-specific clock init in mach-davinci/dm355.c >> using the new common clock framework drivers. >> >> The #ifdefs are needed to prevent compile errors until the entire >> ARCH_DAVINCI is converted. >> >> Also clean up the #includes since we are adding some here. >> >> Signed-off-by: David Lechner <david@lechnology.com> > > I am having trouble booting DM355 EVM with the series applied. > Still to debug what is going wrong. Can you dump the PLL registers using /sys/kernel/debug/clk/... ? -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thursday 03 May 2018 09:14 PM, David Lechner wrote: > On 05/03/2018 10:34 AM, Sekhar Nori wrote: >> On Friday 27 April 2018 05:47 AM, David Lechner wrote: >>> This adds the new board-specific clock init in mach-davinci/dm355.c >>> using the new common clock framework drivers. >>> >>> The #ifdefs are needed to prevent compile errors until the entire >>> ARCH_DAVINCI is converted. >>> >>> Also clean up the #includes since we are adding some here. >>> >>> Signed-off-by: David Lechner <david@lechnology.com> >> >> I am having trouble booting DM355 EVM with the series applied. >> Still to debug what is going wrong. > > Can you dump the PLL registers using /sys/kernel/debug/clk/... ? I was able to get to ramdisk shell if I set clk_ignore_unused. Here is the dump: root@dm355-evm:/sys/kernel/debug# cat clk/clk_summary enable prepare protect clock count count count rate accuracy phase ---------------------------------------------------------------------------------------- ref_clk 1 1 0 24000000 0 0 oscin 3 3 0 24000000 0 0 pll2_sysclkbp 0 0 0 3000000 0 0 pll2_prediv 2 2 0 3000000 0 0 pll2_pllout 1 1 0 342000000 0 0 pll2_postdiv 1 1 0 342000000 0 0 pll2_pllen 0 0 0 342000000 0 0 pll1_sysclkbp 0 0 0 8000000 0 0 pll1_auxclk 4 5 0 24000000 0 0 timer2 1 4 0 24000000 0 0 timer1 0 0 0 24000000 0 0 timer0 2 2 0 24000000 0 0 pwm2 0 0 0 24000000 0 0 pwm1 0 0 0 24000000 0 0 pwm0 0 0 0 24000000 0 0 uart1 1 4 0 24000000 0 0 uart0 1 4 0 24000000 0 0 i2c 0 3 0 24000000 0 0 rto 0 0 0 24000000 0 0 pwm3 0 0 0 24000000 0 0 timer3 0 0 0 24000000 0 0 pll1_prediv 2 2 0 3000000 0 0 pll1_pllout 1 1 0 432000000 0 0 pll1_postdiv 1 1 0 432000000 0 0 pll1_pllen 0 0 0 432000000 0 0 pll2_sysclk2 1 1 0 0 0 0 pll2_sysclk1 0 0 0 0 0 0 pll1_sysclk4 1 3 0 0 0 0 vpss_slave 0 1 0 0 0 0 vpss_master 0 1 0 0 0 0 pll1_sysclk3 1 1 0 0 0 0 vpss_dac 0 0 0 0 0 0 pll1_sysclk2 4 5 0 0 0 0 gpio 1 1 0 0 0 0 spi0 0 3 0 0 0 0 uart2 1 4 0 0 0 0 asp0 0 0 0 0 0 0 mmcsd0 0 0 0 0 0 0 aemif 1 1 0 0 0 0 spi2 0 0 0 0 0 0 usb 0 0 0 0 0 0 asp1 0 0 0 0 0 0 mmcsd1 0 0 0 0 0 0 spi1 0 0 0 0 0 0 pll1_sysclk1 2 2 0 0 0 0 mjcp 0 0 0 0 0 0 arm 1 1 0 0 0 0 and the dump with current master: root@dm355-evm:/sys/kernel/debug# cat davinci_clocks ref_clk users= 7 24000000 Hz pll1 users= 7 pll 432000000 Hz pll1_sysclk1 users= 1 pll 216000000 Hz arm_clk users= 1 psc 216000000 Hz mjcp users= 0 psc 216000000 Hz pll1_sysclk2 users= 3 pll 108000000 Hz uart2 users= 1 psc 108000000 Hz asp0 users= 0 psc 108000000 Hz asp1 users= 0 psc 108000000 Hz mmcsd0 users= 0 psc 108000000 Hz mmcsd1 users= 0 psc 108000000 Hz spi0 users= 0 psc 108000000 Hz spi1 users= 0 psc 108000000 Hz spi2 users= 0 psc 108000000 Hz gpio users= 1 psc 108000000 Hz aemif users= 1 psc 108000000 Hz usb users= 0 psc 108000000 Hz pll1_sysclk3 users= 0 pll 27000000 Hz vpss_dac users= 0 psc 27000000 Hz pll1_sysclk4 users= 0 pll 108000000 Hz vpss_master users= 0 psc 108000000 Hz vpss_slave users= 0 psc 108000000 Hz pll1_aux_clk users= 3 pll 24000000 Hz clkout1 users= 0 24000000 Hz uart0 users= 1 psc 24000000 Hz uart1 users= 1 psc 24000000 Hz i2c users= 0 psc 24000000 Hz pwm0 users= 0 psc 24000000 Hz pwm1 users= 0 psc 24000000 Hz pwm2 users= 0 psc 24000000 Hz pwm3 users= 0 psc 24000000 Hz timer0 users= 1 psc 24000000 Hz timer1 users= 0 psc 24000000 Hz timer2 users= 1 psc 24000000 Hz timer3 users= 0 psc 24000000 Hz rto users= 0 psc 24000000 Hz pll1_sysclkbp users= 0 pll 8000000 Hz clkout2 users= 0 8000000 Hz pll2 users= 0 pll 342000000 Hz pll2_sysclk1 users= 0 pll 342000000 Hz pll2_sysclkbp users= 0 pll 3000000 Hz clkout3 users= 0 3000000 Hz I didn't have time today to analyze these myself. Hope it helps. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 05/04/2018 05:01 AM, Sekhar Nori wrote: > On Thursday 03 May 2018 09:14 PM, David Lechner wrote: >> On 05/03/2018 10:34 AM, Sekhar Nori wrote: >>> On Friday 27 April 2018 05:47 AM, David Lechner wrote: >>>> This adds the new board-specific clock init in mach-davinci/dm355.c >>>> using the new common clock framework drivers. >>>> >>>> The #ifdefs are needed to prevent compile errors until the entire >>>> ARCH_DAVINCI is converted. >>>> >>>> Also clean up the #includes since we are adding some here. >>>> >>>> Signed-off-by: David Lechner <david@lechnology.com> >>> >>> I am having trouble booting DM355 EVM with the series applied. >>> Still to debug what is going wrong. >> >> Can you dump the PLL registers using /sys/kernel/debug/clk/... ? > > I was able to get to ramdisk shell if I set clk_ignore_unused. Here is > the dump: > ... > I didn't have time today to analyze these myself. Hope it helps. > I just sent out a patch to fix this: "clk: davinci: pll-dm355: fix SYSCLKn parent names". -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
This series converts mach-davinci to use the common clock framework. The series works like this, the first 3 patches fix some issues with the clock drivers that have already been accepted into the mainline kernel. Then, starting with "ARM: davinci: pass clock as parameter to davinci_timer_init()", we get the mach code ready for the switch by adding the code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK around the legacy clocks so that we can switch easily between the old and the new. "ARM: davinci: switch to common clock framework" actually flips the switch to start using the new clock drivers. Then the next 8 patches remove all of the old clock code. The final four patches add device tree clock support to the one SoC that supports it. This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy board file). Changes: v9 changes (also see individual patches for details): - Rebased on linux-davnci/master (f5e3203bb775) - Dropped drivers/clk patches that landed in v4.17 - New drivers/clk patches for early boot special case - New patch for ti,davinci-timer device tree bindings - Updated mach/davinci patches to register clocks in early boot when needed v8 changes (also see individual patches for details): - Rebased on linux-davinci/master - Dropped use of __init and __initconst attributes in clk drivers - Add clkdev lookups for PLL SYSCLKs - Fix genpd clock reference counting issue - Fix PSC clock driver loading order issue - Fix typo in device tree and add more power-domains properties v7 changes (also see individual patches for details): - Rebased on linux-davinci/master (v4.16-rc) - Convert clock drivers to platform devices - New patch "ARM: davinci: pass clock as parameter to davinci_timer_init()" - Fix issues with lcdk and aemif clock lookups and power domains - Fixed other minor issues brought up in v6 review v6 changes (also see individual patches for details): - All of the device tree bindings are changed - All of the clock drivers are changed significantly - Fixed issues brought up during review of v5 - "ARM: davinci: move davinci_clk_init() to init_time" is removed from this series and submitted separately v5 changes: - Basically, this is an entirely new series - Patches are broken up into bite-sized pieces - Converted PSC clock driver to use regmap - Restored "force" flag for certain DA850 clocks - Added device tree bindings - Moved more of the clock init to drivers/clk - Fixed frequency scaling (maybe*) * I have frequency scaling using cpufreq-dt, so I know the clocks are doing what they need to do to make this work, but I haven't figured out how to test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will be sent separately after this series has landed.) Dependencies: Only one dependency didn't land in v4.17. It is just a runtime dependency for the LCDK board to make the display work. - "drm/tilcdc: Fix setting clock divider for omap-l138"[1] [1]: https://patchwork.freedesktop.org/patch/210696/ You can find a working branch with everything included (plus a few extras, like cpufreq-dt) in the "common-clk-v8" branch of https://github.com/dlech/ev3dev-kernel.git. Testing/debugging for the uninitiated: I only have one device to test with, which is based on da850, so I will have to rely on others to do some testing here. Since we are dealing with clocks, if something isn't working, you most likely won't see output on the serial port. To figure out what is going on, you need to enable... CONFIG_DEBUG_LL=y CONFIG_EARLY_PRINTK=y and add "earlyprintk clk_ignore_unused" to the kernel command line options. You may need to select a different UART for this depending on your board. I think UART1 is the default in the kernel configuration. On da850 devices comment out the lines: else clk_set_parent(clk, parent->clk); in da850.c or, if using device tree, comment out the lines: assigned-clocks = <&async3_clk>; assigned-clock-parents = <&pll1_sysclk 2>; in da850.dtsi when doing earlyprintk, otherwise the UART1 and UART2 clock source will change during boot and cause garbled output after a point. David Lechner (27): clk: davinci: pll: allow dev == NULL clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE clk: davinci: psc: allow for dev == NULL ARM: davinci: pass clock as parameter to davinci_timer_init() ARM: davinci: da830: add new clock init using common clock framework ARM: davinci: da850: add new clock init using common clock framework ARM: davinci: dm355: add new clock init using common clock framework ARM: davinci: dm365: add new clock init using common clock framework ARM: davinci: dm644x: add new clock init using common clock framework ARM: davinci: dm646x: add new clock init using common clock framework ARM: davinci: da8xx: add new USB PHY clock init using common clock framework ARM: davinci: da8xx: add new sata_refclk init using common clock framework ARM: davinci: remove CONFIG_DAVINCI_RESET_CLOCKS ARM: davinci_all_defconfig: remove CONFIG_DAVINCI_RESET_CLOCKS ARM: davinci: switch to common clock framework ARM: davinci: da830: Remove legacy clock init ARM: davinci: da850: Remove legacy clock init ARM: davinci: dm355: Remove legacy clock init ARM: davinci: dm365: Remove legacy clock init ARM: davinci: dm644x: Remove legacy clock init ARM: davinci: dm646x: Remove legacy clock init ARM: davinci: da8xx: Remove legacy USB and SATA clock init ARM: davinci: remove legacy clocks dt-bindings: timer: new bindings for TI DaVinci timer ARM: davinci: add device tree support to timer ARM: davinci: da8xx-dt: switch to device tree clocks ARM: dts: da850: Add clocks .../bindings/timer/ti,davinci-timer.txt | 24 + arch/arm/Kconfig | 5 +- arch/arm/boot/dts/da850-enbw-cmc.dts | 4 + arch/arm/boot/dts/da850-evm.dts | 4 + arch/arm/boot/dts/da850-lcdk.dts | 9 + arch/arm/boot/dts/da850-lego-ev3.dts | 4 + arch/arm/boot/dts/da850.dtsi | 166 ++++ arch/arm/configs/davinci_all_defconfig | 1 - arch/arm/mach-davinci/Kconfig | 13 +- arch/arm/mach-davinci/Makefile | 4 +- arch/arm/mach-davinci/board-da830-evm.c | 12 +- arch/arm/mach-davinci/board-da850-evm.c | 2 + arch/arm/mach-davinci/board-dm355-evm.c | 2 + arch/arm/mach-davinci/board-dm355-leopard.c | 2 + arch/arm/mach-davinci/board-dm365-evm.c | 2 + arch/arm/mach-davinci/board-dm644x-evm.c | 2 + arch/arm/mach-davinci/board-dm646x-evm.c | 2 + arch/arm/mach-davinci/board-mityomapl138.c | 2 + arch/arm/mach-davinci/board-neuros-osd2.c | 2 + arch/arm/mach-davinci/board-omapl138-hawk.c | 11 +- arch/arm/mach-davinci/board-sffsdr.c | 2 + arch/arm/mach-davinci/clock.c | 745 ----------------- arch/arm/mach-davinci/clock.h | 76 -- arch/arm/mach-davinci/common.c | 3 - arch/arm/mach-davinci/da830.c | 462 ++--------- arch/arm/mach-davinci/da850.c | 778 +++--------------- arch/arm/mach-davinci/da8xx-dt.c | 60 -- arch/arm/mach-davinci/davinci.h | 8 + arch/arm/mach-davinci/devices-da8xx.c | 43 +- arch/arm/mach-davinci/devices.c | 1 - arch/arm/mach-davinci/dm355.c | 406 ++------- arch/arm/mach-davinci/dm365.c | 485 +---------- arch/arm/mach-davinci/dm644x.c | 344 +------- arch/arm/mach-davinci/dm646x.c | 372 +-------- arch/arm/mach-davinci/include/mach/clock.h | 3 - arch/arm/mach-davinci/include/mach/common.h | 11 +- arch/arm/mach-davinci/include/mach/da8xx.h | 6 +- arch/arm/mach-davinci/pm_domain.c | 5 + arch/arm/mach-davinci/psc.c | 137 --- arch/arm/mach-davinci/psc.h | 12 - arch/arm/mach-davinci/time.c | 39 +- arch/arm/mach-davinci/usb-da8xx.c | 242 +----- drivers/clk/davinci/pll-da830.c | 4 +- drivers/clk/davinci/pll-da850.c | 41 +- drivers/clk/davinci/pll-dm355.c | 8 +- drivers/clk/davinci/pll-dm365.c | 8 +- drivers/clk/davinci/pll-dm644x.c | 8 +- drivers/clk/davinci/pll-dm646x.c | 8 +- drivers/clk/davinci/pll.c | 134 +-- drivers/clk/davinci/pll.h | 35 +- drivers/clk/davinci/psc-dm355.c | 2 +- drivers/clk/davinci/psc-dm365.c | 2 +- drivers/clk/davinci/psc-dm644x.c | 2 +- drivers/clk/davinci/psc-dm646x.c | 2 +- drivers/clk/davinci/psc.c | 70 +- include/linux/clk/davinci.h | 29 + 56 files changed, 924 insertions(+), 3942 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/ti,davinci-timer.txt delete mode 100644 arch/arm/mach-davinci/clock.c delete mode 100644 arch/arm/mach-davinci/psc.c create mode 100644 include/linux/clk/davinci.h