| Message ID | 1524594959-5259-1-git-send-email-thor.thayer@linux.intel.com |
|---|---|
| Headers | show |
| Series | Add SDRAM ECC support for Stratix10 | expand |
On 04/24/2018 01:35 PM, thor.thayer@linux.intel.com wrote: > From: Thor Thayer <thor.thayer@linux.intel.com> > > Add support for SDRAM ECC on the Stratix10 platform to > the EDAC device driver. Although Stratix10 is very similar > to the Arria10, hypervisor support for Stratix10 SDRAM ECC > requires the use of SMC calls to a higher priority > exception level to handle some register reads/writes. > > Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> > --- > drivers/edac/Kconfig | 2 +- > drivers/edac/altera_edac.c | 459 +++++++++++++++++++++++++++++++++++++++++++++ > drivers/edac/altera_edac.h | 114 +++++++++++ Does it make sense to have the support for this in separate files? > 3 files changed, 574 insertions(+), 1 deletion(-) > > diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig > index 3c4017007647..3c66b02b2473 100644 > --- a/drivers/edac/Kconfig > +++ b/drivers/edac/Kconfig > @@ -379,7 +379,7 @@ config EDAC_THUNDERX > > config EDAC_ALTERA > bool "Altera SOCFPGA ECC" > - depends on EDAC=y && ARCH_SOCFPGA > + depends on EDAC=y && (ARCH_SOCFPGA || ARM64) Should the ARM64 dependency just be ARCH_STRATIX10? > help > Support for error detection and correction on the > Altera SOCs. This must be selected for SDRAM ECC. > diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c > index 11d6419788c2..7ed885379719 100644 > --- a/drivers/edac/altera_edac.c > +++ b/drivers/edac/altera_edac.c > @@ -1,4 +1,5 @@ > /* > + * Copyright (C) 2017-2018, Intel Corporation If you're updating the license header, would it make sense to convert to SPDX? Dinh -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Apr 25, 2018 at 09:14:27PM -0500, Dinh Nguyen wrote:
> Does it make sense to have the support for this in separate files?
No. Per vendor or per uarch/processor type, standalone EDAC drivers are
fine. But not per the RAS capability of a functional unit.
On 04/25/2018 09:14 PM, Dinh Nguyen wrote: > > > On 04/24/2018 01:35 PM, thor.thayer@linux.intel.com wrote: >> From: Thor Thayer <thor.thayer@linux.intel.com> >> >> Add support for SDRAM ECC on the Stratix10 platform to >> the EDAC device driver. Although Stratix10 is very similar >> to the Arria10, hypervisor support for Stratix10 SDRAM ECC >> requires the use of SMC calls to a higher priority >> exception level to handle some register reads/writes. >> >> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> >> --- >> drivers/edac/Kconfig | 2 +- >> drivers/edac/altera_edac.c | 459 +++++++++++++++++++++++++++++++++++++++++++++ >> drivers/edac/altera_edac.h | 114 +++++++++++ > > Does it make sense to have the support for this in separate files? > >> 3 files changed, 574 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig >> index 3c4017007647..3c66b02b2473 100644 >> --- a/drivers/edac/Kconfig >> +++ b/drivers/edac/Kconfig >> @@ -379,7 +379,7 @@ config EDAC_THUNDERX >> >> config EDAC_ALTERA >> bool "Altera SOCFPGA ECC" >> - depends on EDAC=y && ARCH_SOCFPGA >> + depends on EDAC=y && (ARCH_SOCFPGA || ARM64) > > Should the ARM64 dependency just be ARCH_STRATIX10? > Yes, I will update this. >> help >> Support for error detection and correction on the >> Altera SOCs. This must be selected for SDRAM ECC. >> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c >> index 11d6419788c2..7ed885379719 100644 >> --- a/drivers/edac/altera_edac.c >> +++ b/drivers/edac/altera_edac.c >> @@ -1,4 +1,5 @@ >> /* >> + * Copyright (C) 2017-2018, Intel Corporation > > If you're updating the license header, would it make sense to convert to > SPDX? > Yes, I can do that. > Dinh > -- > To unsubscribe from this list: send the line "unsubscribe linux-edac" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: Thor Thayer <thor.thayer@linux.intel.com> The Intel Stratix10 platform is an ARM64 but still has many register definitions that are similar to the Arria10. One significant difference is the Stratix10 hypervisor which requires handling registers that may be shared by guest OSes at a different exception level. Register access is through an ARM SMC call. Currently, SMC handling is implemented in U-Boot. Thor Thayer (3): Documentation: dt: socfpga: Add Stratix10 ECC Manager binding edac: altera: Add support for Stratix10 SDRAM EDAC arm64: dts: stratix10: add sdram ecc .../bindings/arm/altera/socfpga-eccmgr.txt | 47 +++ arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 17 + drivers/edac/Kconfig | 2 +- drivers/edac/altera_edac.c | 459 +++++++++++++++++++++ drivers/edac/altera_edac.h | 114 +++++ 5 files changed, 638 insertions(+), 1 deletion(-)