| Message ID | 20180224214545.3740-1-jernej.skrabec@siol.net |
|---|---|
| Headers | show |
| Series | Implement H3/H5 HDMI driver | expand |
Hi Jernej, On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec <jernej.skrabec@siol.net> wrote: > Enable HDMI output on all boards which have HDMI connector. > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > --- > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 ++++++++++++++++++++++ > arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 25 ++++++++++++++++++++++ > arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 ++++++++++++++++++++++ > arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 25 ++++++++++++++++++++++ > arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 25 ++++++++++++++++++++++ > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 ++++++++++++++++++++++ > arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 24 +++++++++++++++++++++ > arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 25 ++++++++++++++++++++++ > 8 files changed, 199 insertions(+) As I understand it, the H2+ is just a slightly trimmed down H3. In terms of HDMI support, the difference is that the H2+ can't output 4k. If this code is compatible with the H2+, could you please add the necessary bits and pieces to the h2-plus DTSs too? Thanks,
于 2018年2月25日 GMT+08:00 下午4:11:34, Julian Calaby <julian.calaby@gmail.com> 写到: >Hi Jernej, > >On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec ><jernej.skrabec@siol.net> wrote: >> Enable HDMI output on all boards which have HDMI connector. >> >> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> >> --- >> arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 >++++++++++++++++++++++ >> arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 25 >++++++++++++++++++++++ >> arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 >++++++++++++++++++++++ >> arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 25 >++++++++++++++++++++++ >> arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 25 >++++++++++++++++++++++ >> arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 >++++++++++++++++++++++ >> arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 24 >+++++++++++++++++++++ >> arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 25 >++++++++++++++++++++++ >> 8 files changed, 199 insertions(+) > >As I understand it, the H2+ is just a slightly trimmed down H3. In >terms of HDMI support, the difference is that the H2+ can't output 4k. H2+ can OUTPUT 4K. The BSP restricts it to DECODE 4K. (And mainline won't have such restriction) >If this code is compatible with the H2+, could you please add the >necessary bits and pieces to the h2-plus DTSs too? > >Thanks, -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Icenowy, On Sun, Feb 25, 2018 at 7:43 PM, Icenowy Zheng <icenowy@aosc.io> wrote: > > > 于 2018年2月25日 GMT+08:00 下午4:11:34, Julian Calaby <julian.calaby@gmail.com> 写到: >>Hi Jernej, >> >>On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec >><jernej.skrabec@siol.net> wrote: >>> Enable HDMI output on all boards which have HDMI connector. >>> >>> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> >>> --- >>> arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 >>++++++++++++++++++++++ >>> arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 25 >>++++++++++++++++++++++ >>> arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 >>++++++++++++++++++++++ >>> arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 25 >>++++++++++++++++++++++ >>> arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 25 >>++++++++++++++++++++++ >>> arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 >>++++++++++++++++++++++ >>> arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 24 >>+++++++++++++++++++++ >>> arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 25 >>++++++++++++++++++++++ >>> 8 files changed, 199 insertions(+) >> >>As I understand it, the H2+ is just a slightly trimmed down H3. In >>terms of HDMI support, the difference is that the H2+ can't output 4k. > > H2+ can OUTPUT 4K. The BSP restricts it to DECODE 4K. (And mainline won't have such restriction) Interesting! I'm getting my data from here: http://linux-sunxi.org/H3#Variants So essentially what you're saying is that the H2+ is just a H3 with less pins? (I'm assuming the "lack of gigabit mac" is effectively it not having the required pins, i.e. GPIO bank D) Thanks,
于 2018年2月25日 GMT+08:00 下午5:06:32, Julian Calaby <julian.calaby@gmail.com> 写到: >Hi Icenowy, > >On Sun, Feb 25, 2018 at 7:43 PM, Icenowy Zheng <icenowy@aosc.io> wrote: >> >> >> 于 2018年2月25日 GMT+08:00 下午4:11:34, Julian Calaby ><julian.calaby@gmail.com> 写到: >>>Hi Jernej, >>> >>>On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec >>><jernej.skrabec@siol.net> wrote: >>>> Enable HDMI output on all boards which have HDMI connector. >>>> >>>> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> >>>> --- >>>> arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 >>>++++++++++++++++++++++ >>>> arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 25 >>>++++++++++++++++++++++ >>>> arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 >>>++++++++++++++++++++++ >>>> arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 25 >>>++++++++++++++++++++++ >>>> arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 25 >>>++++++++++++++++++++++ >>>> arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 >>>++++++++++++++++++++++ >>>> arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 24 >>>+++++++++++++++++++++ >>>> arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 25 >>>++++++++++++++++++++++ >>>> 8 files changed, 199 insertions(+) >>> >>>As I understand it, the H2+ is just a slightly trimmed down H3. In >>>terms of HDMI support, the difference is that the H2+ can't output >4k. >> >> H2+ can OUTPUT 4K. The BSP restricts it to DECODE 4K. (And mainline >won't have such restriction) > >Interesting! > >I'm getting my data from here: http://linux-sunxi.org/H3#Variants > >So essentially what you're saying is that the H2+ is just a H3 with >less pins? (I'm assuming the "lack of gigabit mac" is effectively it >not having the required pins, i.e. GPIO bank D) No it's just downspec and BSP decode code restricts 4K decode (by reserving less memory). Just similar to STM32F103C8T6, which has a spec of 64KiB Flash, but with in fact 128KiB usable. For GbE with H2+, it's verified by Banana Pi. > >Thanks, -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Sat, Feb 24, 2018 at 10:45:31PM +0100, Jernej Skrabec wrote: > Some NM PLLs doesn't work well when their output clock rate is set below > certain rate. > > Add support for that constrain. In such a case, you should round the rate to the minimum the clock can operate at, and not return an error. Thanks! Maxime
Hi, On Sat, Feb 24, 2018 at 10:45:38PM +0100, Jernej Skrabec wrote: > Current polarity configuration code is cleary wrong since it compares > same flag two times. However, even if flag name is fixed, it won't work > well for resolutions which have one polarity positive and another > negative. > > Fix that by properly set each bit according to each polarity. Since > those two bits are not described in any documentation, relationships > were obtained by experimentation. > > Fixes: b7c7436a5ff0 ("drm/sun4i: Implement A83T HDMI driver") > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > --- > drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c > index e5bfcdd43ec9..f48e8b70fabe 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c > +++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c > @@ -35,10 +35,11 @@ static int sun8i_hdmi_phy_config(struct dw_hdmi *hdmi, void *data, > struct sun8i_hdmi_phy *phy = (struct sun8i_hdmi_phy *)data; > u32 val = 0; > > - if ((mode->flags & DRM_MODE_FLAG_NHSYNC) && > - (mode->flags & DRM_MODE_FLAG_NHSYNC)) { > - val = 0x03; > - } > + if (mode->flags & DRM_MODE_FLAG_NHSYNC) > + val |= 0x01; > + > + if (mode->flags & DRM_MODE_FLAG_NVSYNC) > + val |= 0x02; Can you introduce defines for those? Thanks! Maxime
On Mon, Feb 26, 2018 at 5:38 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote: > Hi, > > On Sat, Feb 24, 2018 at 10:45:31PM +0100, Jernej Skrabec wrote: >> Some NM PLLs doesn't work well when their output clock rate is set below >> certain rate. >> >> Add support for that constrain. > > In such a case, you should round the rate to the minimum the clock can > operate at, and not return an error. That's true for round_rate. But what's the expected behavior of set_rate? AFAIK we presume all users call round_rate before set_rate, but that doesn't seem to be true all the time. ChenYu -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Feb 26, 2018 at 05:43:01PM +0800, Chen-Yu Tsai wrote: > On Mon, Feb 26, 2018 at 5:38 PM, Maxime Ripard > <maxime.ripard@bootlin.com> wrote: > > Hi, > > > > On Sat, Feb 24, 2018 at 10:45:31PM +0100, Jernej Skrabec wrote: > >> Some NM PLLs doesn't work well when their output clock rate is set below > >> certain rate. > >> > >> Add support for that constrain. > > > > In such a case, you should round the rate to the minimum the clock can > > operate at, and not return an error. > > That's true for round_rate. But what's the expected behavior of set_rate? > AFAIK we presume all users call round_rate before set_rate, but that doesn't > seem to be true all the time. One of the first things that happens during a set_rate is a round_rate: https://elixir.bootlin.com/linux/v4.16-rc3/source/drivers/clk/clk.c#L1873 Maxime
On Mon, Feb 26, 2018 at 6:25 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote: > On Mon, Feb 26, 2018 at 05:43:01PM +0800, Chen-Yu Tsai wrote: >> On Mon, Feb 26, 2018 at 5:38 PM, Maxime Ripard >> <maxime.ripard@bootlin.com> wrote: >> > Hi, >> > >> > On Sat, Feb 24, 2018 at 10:45:31PM +0100, Jernej Skrabec wrote: >> >> Some NM PLLs doesn't work well when their output clock rate is set below >> >> certain rate. >> >> >> >> Add support for that constrain. >> > >> > In such a case, you should round the rate to the minimum the clock can >> > operate at, and not return an error. >> >> That's true for round_rate. But what's the expected behavior of set_rate? >> AFAIK we presume all users call round_rate before set_rate, but that doesn't >> seem to be true all the time. > > One of the first things that happens during a set_rate is a round_rate: > https://elixir.bootlin.com/linux/v4.16-rc3/source/drivers/clk/clk.c#L1873 Ah! This was added recently in commit ca5e089a32c5 ("clk: use round rate to bail out early in set_rate"). Thanks for the tip! ChenYu -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Julian, Dne nedelja, 25. februar 2018 ob 09:11:34 CET je Julian Calaby napisal(a): > Hi Jernej, > > On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec <jernej.skrabec@siol.net> wrote: > > Enable HDMI output on all boards which have HDMI connector. > > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > --- > > > > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 > > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-beelink-x2.dts > > | 25 ++++++++++++++++++++++ > > arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 > > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts > > | 25 ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-2.dts > > | 25 ++++++++++++++++++++++ > > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 > > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts > > | 24 +++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts > > | 25 ++++++++++++++++++++++ 8 files changed, 199 insertions(+) > > As I understand it, the H2+ is just a slightly trimmed down H3. In > terms of HDMI support, the difference is that the H2+ can't output 4k. > If this code is compatible with the H2+, could you please add the > necessary bits and pieces to the h2-plus DTSs too? There are only 3 H2+ boards in kernel and none of them has HDMI connector, so there's nothing to do actually. But if such board is added to kernel, it would be trivially add proper nodes, since all H2+ boards include H3 DTSI. Best regards, Jernej -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, Dne ponedeljek, 26. februar 2018 ob 10:38:00 CET je Maxime Ripard napisal(a): > Hi, > > On Sat, Feb 24, 2018 at 10:45:31PM +0100, Jernej Skrabec wrote: > > Some NM PLLs doesn't work well when their output clock rate is set below > > certain rate. > > > > Add support for that constrain. > > In such a case, you should round the rate to the minimum the clock can > operate at, and not return an error. OK. Best regards, Jernej -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, Dne ponedeljek, 26. februar 2018 ob 10:39:30 CET je Maxime Ripard napisal(a): > Hi, > > On Sat, Feb 24, 2018 at 10:45:38PM +0100, Jernej Skrabec wrote: > > Current polarity configuration code is cleary wrong since it compares > > same flag two times. However, even if flag name is fixed, it won't work > > well for resolutions which have one polarity positive and another > > negative. > > > > Fix that by properly set each bit according to each polarity. Since > > those two bits are not described in any documentation, relationships > > were obtained by experimentation. > > > > Fixes: b7c7436a5ff0 ("drm/sun4i: Implement A83T HDMI driver") > > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > --- > > > > drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 9 +++++---- > > 1 file changed, 5 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c > > b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c index e5bfcdd43ec9..f48e8b70fabe > > 100644 > > --- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c > > +++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c > > @@ -35,10 +35,11 @@ static int sun8i_hdmi_phy_config(struct dw_hdmi *hdmi, > > void *data,> > > struct sun8i_hdmi_phy *phy = (struct sun8i_hdmi_phy *)data; > > u32 val = 0; > > > > - if ((mode->flags & DRM_MODE_FLAG_NHSYNC) && > > - (mode->flags & DRM_MODE_FLAG_NHSYNC)) { > > - val = 0x03; > > - } > > + if (mode->flags & DRM_MODE_FLAG_NHSYNC) > > + val |= 0x01; > > + > > + if (mode->flags & DRM_MODE_FLAG_NVSYNC) > > + val |= 0x02; > > Can you introduce defines for those? Of course. Best regards, Jernej -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
于 2018年2月27日 GMT+08:00 上午12:16:44, "Jernej Škrabec" <jernej.skrabec@siol.net> 写到: >Hi Julian, > >Dne nedelja, 25. februar 2018 ob 09:11:34 CET je Julian Calaby >napisal(a): >> Hi Jernej, >> >> On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec ><jernej.skrabec@siol.net> >wrote: >> > Enable HDMI output on all boards which have HDMI connector. >> > >> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> >> > --- >> > >> > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-beelink-x2.dts > >> > | 25 ++++++++++++++++++++++ >> > arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts > >> > | 25 ++++++++++++++++++++++ >arch/arm/boot/dts/sun8i-h3-orangepi-2.dts >> > | 25 ++++++++++++++++++++++ >> > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts > >> > | 24 +++++++++++++++++++++ >arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts >> > | 25 ++++++++++++++++++++++ 8 files changed, 199 >insertions(+) >> >> As I understand it, the H2+ is just a slightly trimmed down H3. In >> terms of HDMI support, the difference is that the H2+ can't output >4k. >> If this code is compatible with the H2+, could you please add the >> necessary bits and pieces to the h2-plus DTSs too? > >There are only 3 H2+ boards in kernel and none of them has HDMI >connector, so BPi M2 Zero has miniHDMI connector. >there's nothing to do actually. But if such board is added to kernel, >it would >be trivially add proper nodes, since all H2+ boards include H3 DTSI. > >Best regards, >Jernej -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi all, Dne sobota, 24. februar 2018 ob 22:45:41 CET je Jernej Skrabec napisal(a): > While A83T HDMI PHY seems to be just customized Synopsys HDMI PHY, H3 > HDMI PHY is completely custom PHY. > > However, they still have many things in common like clock and reset > setup, setting sync polarity and more. > > Add support for H3 HDMI PHY variant. > > While documentation exists for this PHY variant, it doesn't go in great > details. Because of that, almost all settings are copied from BSP linux > 4.4. Interestingly, those settings are slightly different to those found > in a older BSP with Linux 3.4. For now, no user visible difference was > found between them. > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > --- > drivers/gpu/drm/sun4i/Makefile | 1 + > drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 6 + > drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 263 > ++++++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c | > 130 ++++++++++++++ > 4 files changed, 397 insertions(+), 3 deletions(-) > create mode 100644 drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c > [...] > diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c > b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c new file mode 100644 > index 000000000000..3c34ec5ff4af > --- /dev/null > +++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c > @@ -0,0 +1,130 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2018 Jernej Skrabec <jernej.skrabec@siol.net> > + */ > + > +#include <linux/clk-provider.h> > + > +#include "sun8i_dw_hdmi.h" > + > +struct sun8i_phy_clk { > + struct clk_hw hw; > + struct sun8i_hdmi_phy *phy; > +}; > + > +static inline struct sun8i_phy_clk *hw_to_phy_clk(struct clk_hw *hw) > +{ > + return container_of(hw, struct sun8i_phy_clk, hw); > +} > + > +static int sun8i_phy_clk_determine_rate(struct clk_hw *hw, > + struct clk_rate_request *req) > +{ > + unsigned long rate = req->rate; > + unsigned long best_rate = 0; > + struct clk_hw *parent; > + int best_div = 1; > + int i; > + > + parent = clk_hw_get_parent(hw); > + > + for (i = 1; i <= 16; i++) { > + unsigned long ideal = rate * i; > + unsigned long rounded; > + > + rounded = clk_hw_round_rate(parent, ideal); > + > + if (rounded == ideal) { > + best_rate = rounded; > + best_div = i; > + break; > + } > + > + if (abs(rate - rounded) < abs(rate - best_rate / best_div)) { Here is a bug. Above line should be: if (abs(rate - rounded / i) < abs(rate - best_rate / best_div)) { I guess this could solve the issue described in cover letter. Best regards, Jernej > + best_rate = rounded; > + best_div = i; > + } > + } > + > + req->rate = best_rate / best_div; > + req->best_parent_rate = best_rate; > + req->best_parent_hw = parent; > + > + return 0; > +} > + > +static unsigned long sun8i_phy_clk_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + struct sun8i_phy_clk *priv = hw_to_phy_clk(hw); > + u32 reg; > + > + regmap_read(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, ®); > + reg = ((reg >> SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_SHIFT) & > + SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_MSK) + 1; > + > + return parent_rate / reg; > +} > + > +static int sun8i_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long parent_rate) > +{ > + struct sun8i_phy_clk *priv = hw_to_phy_clk(hw); > + unsigned long best_rate = 0; > + u8 best_m = 0, m; > + > + for (m = 1; m <= 16; m++) { > + unsigned long tmp_rate = parent_rate / m; > + > + if (tmp_rate > rate) > + continue; > + > + if (!best_rate || > + (rate - tmp_rate) < (rate - best_rate)) { > + best_rate = tmp_rate; > + best_m = m; > + } > + } > + > + regmap_update_bits(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, > + SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_MSK, > + SUN8I_HDMI_PHY_PLL_CFG2_PREDIV(best_m)); > + > + return 0; > +} > + > +static const struct clk_ops sun8i_phy_clk_ops = { > + .determine_rate = sun8i_phy_clk_determine_rate, > + .recalc_rate = sun8i_phy_clk_recalc_rate, > + .set_rate = sun8i_phy_clk_set_rate, > +}; > + > +int sun8i_phy_clk_create(struct sun8i_hdmi_phy *phy, struct device *dev) > +{ > + struct clk_init_data init; > + struct sun8i_phy_clk *priv; > + const char *parents[1]; > + > + parents[0] = __clk_get_name(phy->clk_pll0); > + if (!parents[0]) > + return -ENODEV; > + > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + > + init.name = "hdmi-phy-clk"; > + init.ops = &sun8i_phy_clk_ops; > + init.parent_names = parents; > + init.num_parents = 1; > + init.flags = CLK_SET_RATE_PARENT; > + > + priv->phy = phy; > + priv->hw.init = &init; > + > + phy->clk_phy = devm_clk_register(dev, &priv->hw); > + if (IS_ERR(phy->clk_phy)) > + return PTR_ERR(phy->clk_phy); > + > + return 0; > +} > -- > 2.16.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, Dne ponedeljek, 26. februar 2018 ob 17:21:05 CET je Icenowy Zheng napisal(a): > 于 2018年2月27日 GMT+08:00 上午12:16:44, "Jernej Škrabec" <jernej.skrabec@siol.net> 写到: > >Hi Julian, > > > >Dne nedelja, 25. februar 2018 ob 09:11:34 CET je Julian Calaby > > > >napisal(a): > >> Hi Jernej, > >> > >> On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec > > > ><jernej.skrabec@siol.net> > > > >wrote: > >> > Enable HDMI output on all boards which have HDMI connector. > >> > > >> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > >> > --- > >> > > >> > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 > >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-beelink-x2.dts > >> > > >> > | 25 ++++++++++++++++++++++ > >> > > >> > arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 > >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts > >> > > >> > | 25 ++++++++++++++++++++++ > > > >arch/arm/boot/dts/sun8i-h3-orangepi-2.dts > > > >> > | 25 ++++++++++++++++++++++ > >> > > >> > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 > >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts > >> > > >> > | 24 +++++++++++++++++++++ > > > >arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts > > > >> > | 25 ++++++++++++++++++++++ 8 files changed, 199 > > > >insertions(+) > > > >> As I understand it, the H2+ is just a slightly trimmed down H3. In > >> terms of HDMI support, the difference is that the H2+ can't output > > > >4k. > > > >> If this code is compatible with the H2+, could you please add the > >> necessary bits and pieces to the h2-plus DTSs too? > > > >There are only 3 H2+ boards in kernel and none of them has HDMI > >connector, so > > BPi M2 Zero has miniHDMI connector. Ah, sorry, I missed that one. Since I don't have it (or any other board with H2+) I'm not really comfortable including such patch. If anyone will test it, I can include it in next revision. Best regards, Jernej > > >there's nothing to do actually. But if such board is added to kernel, > >it would > >be trivially add proper nodes, since all H2+ boards include H3 DTSI. > > > >Best regards, > >Jernej > > -- > You received this message because you are subscribed to the Google Groups > "linux-sunxi" group. To unsubscribe from this group and stop receiving > emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com. > For more options, visit https://groups.google.com/d/optout. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Jernej, On Tue, Feb 27, 2018 at 3:27 AM, Jernej Škrabec <jernej.skrabec@siol.net> wrote: > Hi, > > Dne ponedeljek, 26. februar 2018 ob 17:21:05 CET je Icenowy Zheng napisal(a): >> 于 2018年2月27日 GMT+08:00 上午12:16:44, "Jernej Škrabec" > <jernej.skrabec@siol.net> 写到: >> >Hi Julian, >> > >> >Dne nedelja, 25. februar 2018 ob 09:11:34 CET je Julian Calaby >> > >> >napisal(a): >> >> Hi Jernej, >> >> >> >> On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec >> > >> ><jernej.skrabec@siol.net> >> > >> >wrote: >> >> > Enable HDMI output on all boards which have HDMI connector. >> >> > >> >> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> >> >> > --- >> >> > >> >> > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-beelink-x2.dts >> >> > >> >> > | 25 ++++++++++++++++++++++ >> >> > >> >> > arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts >> >> > >> >> > | 25 ++++++++++++++++++++++ >> > >> >arch/arm/boot/dts/sun8i-h3-orangepi-2.dts >> > >> >> > | 25 ++++++++++++++++++++++ >> >> > >> >> > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts >> >> > >> >> > | 24 +++++++++++++++++++++ >> > >> >arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts >> > >> >> > | 25 ++++++++++++++++++++++ 8 files changed, 199 >> > >> >insertions(+) >> > >> >> As I understand it, the H2+ is just a slightly trimmed down H3. In >> >> terms of HDMI support, the difference is that the H2+ can't output >> > >> >4k. >> > >> >> If this code is compatible with the H2+, could you please add the >> >> necessary bits and pieces to the h2-plus DTSs too? >> > >> >There are only 3 H2+ boards in kernel and none of them has HDMI >> >connector, so >> >> BPi M2 Zero has miniHDMI connector. > > Ah, sorry, I missed that one. Since I don't have it (or any other board with > H2+) I'm not really comfortable including such patch. If anyone will test it, > I can include it in next revision. I have one of those (this is why I'm interested in this patchset) so I'm willing to test, however I can't guarantee I'll get to it quickly. Thanks,
On Tue, Feb 27, 2018 at 01:29:27PM +1100, Julian Calaby wrote: > Hi Jernej, > > On Tue, Feb 27, 2018 at 3:27 AM, Jernej Škrabec <jernej.skrabec@siol.net> wrote: > > Hi, > > > > Dne ponedeljek, 26. februar 2018 ob 17:21:05 CET je Icenowy Zheng napisal(a): > >> 于 2018年2月27日 GMT+08:00 上午12:16:44, "Jernej Škrabec" > > <jernej.skrabec@siol.net> 写到: > >> >Hi Julian, > >> > > >> >Dne nedelja, 25. februar 2018 ob 09:11:34 CET je Julian Calaby > >> > > >> >napisal(a): > >> >> Hi Jernej, > >> >> > >> >> On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec > >> > > >> ><jernej.skrabec@siol.net> > >> > > >> >wrote: > >> >> > Enable HDMI output on all boards which have HDMI connector. > >> >> > > >> >> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > >> >> > --- > >> >> > > >> >> > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 > >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-beelink-x2.dts > >> >> > > >> >> > | 25 ++++++++++++++++++++++ > >> >> > > >> >> > arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 > >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts > >> >> > > >> >> > | 25 ++++++++++++++++++++++ > >> > > >> >arch/arm/boot/dts/sun8i-h3-orangepi-2.dts > >> > > >> >> > | 25 ++++++++++++++++++++++ > >> >> > > >> >> > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 > >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts > >> >> > > >> >> > | 24 +++++++++++++++++++++ > >> > > >> >arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts > >> > > >> >> > | 25 ++++++++++++++++++++++ 8 files changed, 199 > >> > > >> >insertions(+) > >> > > >> >> As I understand it, the H2+ is just a slightly trimmed down H3. In > >> >> terms of HDMI support, the difference is that the H2+ can't output > >> > > >> >4k. > >> > > >> >> If this code is compatible with the H2+, could you please add the > >> >> necessary bits and pieces to the h2-plus DTSs too? > >> > > >> >There are only 3 H2+ boards in kernel and none of them has HDMI > >> >connector, so > >> > >> BPi M2 Zero has miniHDMI connector. > > > > Ah, sorry, I missed that one. Since I don't have it (or any other board with > > H2+) I'm not really comfortable including such patch. If anyone will test it, > > I can include it in next revision. > > I have one of those (this is why I'm interested in this patchset) so > I'm willing to test, however I can't guarantee I'll get to it quickly. Then I guess the best way forward will be to keep the current patch as is, and you'll send a patch whenever you have the time to test it. Thanks! Maxime
Hi Maxime, On Tue, Feb 27, 2018 at 6:07 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote: > On Tue, Feb 27, 2018 at 01:29:27PM +1100, Julian Calaby wrote: >> Hi Jernej, >> >> On Tue, Feb 27, 2018 at 3:27 AM, Jernej Škrabec <jernej.skrabec@siol.net> wrote: >> > Hi, >> > >> > Dne ponedeljek, 26. februar 2018 ob 17:21:05 CET je Icenowy Zheng napisal(a): >> >> 于 2018年2月27日 GMT+08:00 上午12:16:44, "Jernej Škrabec" >> > <jernej.skrabec@siol.net> 写到: >> >> >Hi Julian, >> >> > >> >> >Dne nedelja, 25. februar 2018 ob 09:11:34 CET je Julian Calaby >> >> > >> >> >napisal(a): >> >> >> Hi Jernej, >> >> >> >> >> >> On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec >> >> > >> >> ><jernej.skrabec@siol.net> >> >> > >> >> >wrote: >> >> >> > Enable HDMI output on all boards which have HDMI connector. >> >> >> > >> >> >> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> >> >> >> > --- >> >> >> > >> >> >> > arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 25 >> >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-beelink-x2.dts >> >> >> > >> >> >> > | 25 ++++++++++++++++++++++ >> >> >> > >> >> >> > arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 25 >> >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts >> >> >> > >> >> >> > | 25 ++++++++++++++++++++++ >> >> > >> >> >arch/arm/boot/dts/sun8i-h3-orangepi-2.dts >> >> > >> >> >> > | 25 ++++++++++++++++++++++ >> >> >> > >> >> >> > arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 25 >> >> >> > ++++++++++++++++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts >> >> >> > >> >> >> > | 24 +++++++++++++++++++++ >> >> > >> >> >arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts >> >> > >> >> >> > | 25 ++++++++++++++++++++++ 8 files changed, 199 >> >> > >> >> >insertions(+) >> >> > >> >> >> As I understand it, the H2+ is just a slightly trimmed down H3. In >> >> >> terms of HDMI support, the difference is that the H2+ can't output >> >> > >> >> >4k. >> >> > >> >> >> If this code is compatible with the H2+, could you please add the >> >> >> necessary bits and pieces to the h2-plus DTSs too? >> >> > >> >> >There are only 3 H2+ boards in kernel and none of them has HDMI >> >> >connector, so >> >> >> >> BPi M2 Zero has miniHDMI connector. >> > >> > Ah, sorry, I missed that one. Since I don't have it (or any other board with >> > H2+) I'm not really comfortable including such patch. If anyone will test it, >> > I can include it in next revision. >> >> I have one of those (this is why I'm interested in this patchset) so >> I'm willing to test, however I can't guarantee I'll get to it quickly. > > Then I guess the best way forward will be to keep the current patch as > is, and you'll send a patch whenever you have the time to test it. Fair enough, I'll do that then. =) Thanks,