deleted file mode 100644
@@ -1,86 +0,0 @@
-/* Verify that overloaded built-ins for vec_cmp{eq,ge,gt,le,lt,ne} with
- char inputs produce the right code. */
-
-/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-mpower8-vector -O2" } */
-
-#include <altivec.h>
-
-vector bool char
-test3_eq (vector signed char x, vector signed char y)
-{
- return vec_cmpeq (x, y);
-}
-
-vector bool char
-test6_eq (vector unsigned char x, vector unsigned char y)
-{
- return vec_cmpeq (x, y);
-}
-
-vector bool char
-test3_ge (vector signed char x, vector signed char y)
-{
- return vec_cmpge (x, y);
-}
-
-vector bool char
-test6_ge (vector unsigned char x, vector unsigned char y)
-{
- return vec_cmpge (x, y);
-}
-
-vector bool char
-test3_gt (vector signed char x, vector signed char y)
-{
- return vec_cmpgt (x, y);
-}
-
-vector bool char
-test6_gt (vector unsigned char x, vector unsigned char y)
-{
- return vec_cmpgt (x, y);
-}
-
-vector bool char
-test3_le (vector signed char x, vector signed char y)
-{
- return vec_cmple (x, y);
-}
-
-vector bool char
-test6_le (vector unsigned char x, vector unsigned char y)
-{
- return vec_cmple (x, y);
-}
-
-vector bool char
-test3_lt (vector signed char x, vector signed char y)
-{
- return vec_cmplt (x, y);
-}
-
-vector bool char
-test6_lt (vector unsigned char x, vector unsigned char y)
-{
- return vec_cmplt (x, y);
-}
-
-vector bool char
-test3_ne (vector signed char x, vector signed char y)
-{
- return vec_cmpne (x, y);
-}
-
-vector bool char
-test6_ne (vector unsigned char x, vector unsigned char y)
-{
- return vec_cmpne (x, y);
-}
-
-/* { dg-final { scan-assembler-times "vcmpequb" 4 } } */
-/* { dg-final { scan-assembler-times "vcmpgtsb" 4 } } */
-/* { dg-final { scan-assembler-times "vcmpgtub" 4 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
-
new file mode 100644
@@ -0,0 +1,77 @@
+/* Header file for fold-vec-cmp-char*.c tests. Used to verify codegen results
+ for vec_cmp{eq,ge,gt,le,lt,ne} builtins. */
+
+#include <altivec.h>
+
+vector bool char
+test3_eq (vector signed char x, vector signed char y)
+{
+ return vec_cmpeq (x, y);
+}
+
+vector bool char
+test6_eq (vector unsigned char x, vector unsigned char y)
+{
+ return vec_cmpeq (x, y);
+}
+
+vector bool char
+test3_ge (vector signed char x, vector signed char y)
+{
+ return vec_cmpge (x, y);
+}
+
+vector bool char
+test6_ge (vector unsigned char x, vector unsigned char y)
+{
+ return vec_cmpge (x, y);
+}
+
+vector bool char
+test3_gt (vector signed char x, vector signed char y)
+{
+ return vec_cmpgt (x, y);
+}
+
+vector bool char
+test6_gt (vector unsigned char x, vector unsigned char y)
+{
+ return vec_cmpgt (x, y);
+}
+
+vector bool char
+test3_le (vector signed char x, vector signed char y)
+{
+ return vec_cmple (x, y);
+}
+
+vector bool char
+test6_le (vector unsigned char x, vector unsigned char y)
+{
+ return vec_cmple (x, y);
+}
+
+vector bool char
+test3_lt (vector signed char x, vector signed char y)
+{
+ return vec_cmplt (x, y);
+}
+
+vector bool char
+test6_lt (vector unsigned char x, vector unsigned char y)
+{
+ return vec_cmplt (x, y);
+}
+
+vector bool char
+test3_ne (vector signed char x, vector signed char y)
+{
+ return vec_cmpne (x, y);
+}
+
+vector bool char
+test6_ne (vector unsigned char x, vector unsigned char y)
+{
+ return vec_cmpne (x, y);
+}
+
new file mode 100644
@@ -0,0 +1,15 @@
+/* Verify that overloaded built-ins for vec_cmp{eq,ge,gt,le,lt,ne} with
+ char inputs produce the right code when -mcpu=power8 is specified. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -mcpu=power8 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include "fold-vec-cmp-char.h"
+
+/* { dg-final { scan-assembler-times "vcmpequb" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsb" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtub" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
+
new file mode 100644
@@ -0,0 +1,16 @@
+/* Verify that overloaded built-ins for vec_cmp{eq,ge,gt,le,lt,ne} with
+ char inputs produce the right code when -mcpu=power9 is specified. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -mcpu=power9 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+
+#include "fold-vec-cmp-char.h"
+
+/* { dg-final { scan-assembler-times "vcmpneb" 2 } } */
+/* { dg-final { scan-assembler-times "vcmpequb" 2 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsb" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtub" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
+
deleted file mode 100644
@@ -1,86 +0,0 @@
-/* Verify that overloaded built-ins for vec_cmp with int
- inputs produce the right code. */
-
-/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-mpower8-vector -O2" } */
-
-#include <altivec.h>
-
-vector bool int
-test3_eq (vector signed int x, vector signed int y)
-{
- return vec_cmpeq (x, y);
-}
-
-vector bool int
-test6_eq (vector unsigned int x, vector unsigned int y)
-{
- return vec_cmpeq (x, y);
-}
-
-vector bool int
-test3_ge (vector signed int x, vector signed int y)
-{
- return vec_cmpge (x, y);
-}
-
-vector bool int
-test6_ge (vector unsigned int x, vector unsigned int y)
-{
- return vec_cmpge (x, y);
-}
-
-vector bool int
-test3_gt (vector signed int x, vector signed int y)
-{
- return vec_cmpgt (x, y);
-}
-
-vector bool int
-test6_gt (vector unsigned int x, vector unsigned int y)
-{
- return vec_cmpgt (x, y);
-}
-
-vector bool int
-test3_le (vector signed int x, vector signed int y)
-{
- return vec_cmple (x, y);
-}
-
-vector bool int
-test6_le (vector unsigned int x, vector unsigned int y)
-{
- return vec_cmple (x, y);
-}
-
-vector bool int
-test3_lt (vector signed int x, vector signed int y)
-{
- return vec_cmplt (x, y);
-}
-
-vector bool int
-test6_lt (vector unsigned int x, vector unsigned int y)
-{
- return vec_cmplt (x, y);
-}
-
-vector bool int
-test3_ne (vector signed int x, vector signed int y)
-{
- return vec_cmpne (x, y);
-}
-
-vector bool int
-test6_ne (vector unsigned int x, vector unsigned int y)
-{
- return vec_cmpne (x, y);
-}
-
-/* { dg-final { scan-assembler-times "vcmpequw" 4 } } */
-/* { dg-final { scan-assembler-times "vcmpgtsw" 4 } } */
-/* { dg-final { scan-assembler-times "vcmpgtuw" 4 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
-
new file mode 100644
@@ -0,0 +1,81 @@
+/* Verify that overloaded built-ins for vec_cmp with int
+ inputs produce the right code. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -O2" } */
+
+#include <altivec.h>
+
+vector bool int
+test3_eq (vector signed int x, vector signed int y)
+{
+ return vec_cmpeq (x, y);
+}
+
+vector bool int
+test6_eq (vector unsigned int x, vector unsigned int y)
+{
+ return vec_cmpeq (x, y);
+}
+
+vector bool int
+test3_ge (vector signed int x, vector signed int y)
+{
+ return vec_cmpge (x, y);
+}
+
+vector bool int
+test6_ge (vector unsigned int x, vector unsigned int y)
+{
+ return vec_cmpge (x, y);
+}
+
+vector bool int
+test3_gt (vector signed int x, vector signed int y)
+{
+ return vec_cmpgt (x, y);
+}
+
+vector bool int
+test6_gt (vector unsigned int x, vector unsigned int y)
+{
+ return vec_cmpgt (x, y);
+}
+
+vector bool int
+test3_le (vector signed int x, vector signed int y)
+{
+ return vec_cmple (x, y);
+}
+
+vector bool int
+test6_le (vector unsigned int x, vector unsigned int y)
+{
+ return vec_cmple (x, y);
+}
+
+vector bool int
+test3_lt (vector signed int x, vector signed int y)
+{
+ return vec_cmplt (x, y);
+}
+
+vector bool int
+test6_lt (vector unsigned int x, vector unsigned int y)
+{
+ return vec_cmplt (x, y);
+}
+
+vector bool int
+test3_ne (vector signed int x, vector signed int y)
+{
+ return vec_cmpne (x, y);
+}
+
+vector bool int
+test6_ne (vector unsigned int x, vector unsigned int y)
+{
+ return vec_cmpne (x, y);
+}
+
new file mode 100644
@@ -0,0 +1,14 @@
+/* Verify that overloaded built-ins for vec_cmp with int
+ inputs produce the right code. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mcpu=power7 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+
+#include "fold-vec-cmp-int.h"
+
+/* { dg-final { scan-assembler-times "vcmpequw" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsw" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtuw" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Verify that overloaded built-ins for vec_cmp with int
+ inputs produce the right code. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -mcpu=power8 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include "fold-vec-cmp-int.h"
+
+/* { dg-final { scan-assembler-times "vcmpequw" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsw" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtuw" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
new file mode 100644
@@ -0,0 +1,15 @@
+/* Verify that overloaded built-ins for vec_cmp with int
+ inputs produce the right code. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mpower9-vector -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+
+#include "fold-vec-cmp-int.h"
+
+/* { dg-final { scan-assembler-times "vcmpequw" 2 } } */
+/* { dg-final { scan-assembler-times "vcmpnew" 2 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsw" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtuw" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
deleted file mode 100644
@@ -1,87 +0,0 @@
-/* Verify that overloaded built-ins for vec_cmp with short
- inputs produce the right code. */
-
-/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-mpower8-vector -O2" } */
-
-#include <altivec.h>
-
-vector bool short
-test3_eq (vector signed short x, vector signed short y)
-{
- return vec_cmpeq (x, y);
-}
-
-vector bool short
-test6_eq (vector unsigned short x, vector unsigned short y)
-{
- return vec_cmpeq (x, y);
-}
-
-vector bool short
-test3_ge (vector signed short x, vector signed short y)
-{
- return vec_cmpge (x, y);
-}
-
-vector bool short
-test6_ge (vector unsigned short x, vector unsigned short y)
-{
- return vec_cmpge (x, y);
-}
-
-vector bool short
-test3_gt (vector signed short x, vector signed short y)
-{
- return vec_cmpgt (x, y);
-}
-
-vector bool short
-test6_gt (vector unsigned short x, vector unsigned short y)
-{
- return vec_cmpgt (x, y);
-}
-
-
-vector bool short
-test3_le (vector signed short x, vector signed short y)
-{
- return vec_cmple (x, y);
-}
-
-vector bool short
-test6_le (vector unsigned short x, vector unsigned short y)
-{
- return vec_cmple (x, y);
-}
-
-vector bool short
-test3_lt (vector signed short x, vector signed short y)
-{
- return vec_cmplt (x, y);
-}
-
-vector bool short
-test6_lt (vector unsigned short x, vector unsigned short y)
-{
- return vec_cmplt (x, y);
-}
-
-vector bool short
-test3_ne (vector signed short x, vector signed short y)
-{
- return vec_cmpne (x, y);
-}
-
-vector bool short
-test6_ne (vector unsigned short x, vector unsigned short y)
-{
- return vec_cmpne (x, y);
-}
-
-/* { dg-final { scan-assembler-times "vcmpequh" 4 } } */
-/* { dg-final { scan-assembler-times "vcmpgtsh" 4 } } */
-/* { dg-final { scan-assembler-times "vcmpgtuh" 4 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
-
new file mode 100644
@@ -0,0 +1,82 @@
+/* Verify that overloaded built-ins for vec_cmp with short
+ inputs produce the right code. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -O2" } */
+
+#include <altivec.h>
+
+vector bool short
+test3_eq (vector signed short x, vector signed short y)
+{
+ return vec_cmpeq (x, y);
+}
+
+vector bool short
+test6_eq (vector unsigned short x, vector unsigned short y)
+{
+ return vec_cmpeq (x, y);
+}
+
+vector bool short
+test3_ge (vector signed short x, vector signed short y)
+{
+ return vec_cmpge (x, y);
+}
+
+vector bool short
+test6_ge (vector unsigned short x, vector unsigned short y)
+{
+ return vec_cmpge (x, y);
+}
+
+vector bool short
+test3_gt (vector signed short x, vector signed short y)
+{
+ return vec_cmpgt (x, y);
+}
+
+vector bool short
+test6_gt (vector unsigned short x, vector unsigned short y)
+{
+ return vec_cmpgt (x, y);
+}
+
+
+vector bool short
+test3_le (vector signed short x, vector signed short y)
+{
+ return vec_cmple (x, y);
+}
+
+vector bool short
+test6_le (vector unsigned short x, vector unsigned short y)
+{
+ return vec_cmple (x, y);
+}
+
+vector bool short
+test3_lt (vector signed short x, vector signed short y)
+{
+ return vec_cmplt (x, y);
+}
+
+vector bool short
+test6_lt (vector unsigned short x, vector unsigned short y)
+{
+ return vec_cmplt (x, y);
+}
+
+vector bool short
+test3_ne (vector signed short x, vector signed short y)
+{
+ return vec_cmpne (x, y);
+}
+
+vector bool short
+test6_ne (vector unsigned short x, vector unsigned short y)
+{
+ return vec_cmpne (x, y);
+}
+
new file mode 100644
@@ -0,0 +1,16 @@
+/* Verify that overloaded built-ins for vec_cmp with short
+ inputs produce the right code. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -mcpu=power8 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include "fold-vec-cmp-short.h"
+
+/* { dg-final { scan-assembler-times "vcmpequh" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpneh" 0 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsh" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtuh" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
+
new file mode 100644
@@ -0,0 +1,16 @@
+/* Verify that overloaded built-ins for vec_cmp with short
+ inputs produce the right code. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mpower9-vector -mcpu=power9 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+
+#include "fold-vec-cmp-short.h"
+
+/* { dg-final { scan-assembler-times "vcmpequh" 2 } } */
+/* { dg-final { scan-assembler-times "vcmpneh" 2 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsh" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtuh" 4 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
+