| Message ID | 1514721520-18964-6-git-send-email-mw@semihalf.com |
|---|---|
| State | Changes Requested, archived |
| Delegated to: | David Miller |
| Headers | show |
| Series | Armada 7k/8k PP2 ACPI support | expand |
> * Modify way of obtaining interrupts - with ACPI they are resources > bound to struct platform_device and it's not possible to obtain > them directly from the child node. Hence a formula is used, depending > on the port_id and number of possible CPUs. Hi Marcin I know nothing about ACPI. Is this limitation with respect to interrupts fundamental to ACPI, or just that nobody has implemented flexible interrupt support yet? > * Until proper MDIO bus and PHY handling with ACPI is established in the > kernel, use only link interrupts feature in the driver. I think interrupts might be interesting with PHY devices, since they are child nodes of the MDIO device.... Andrew
HI Andrew, 2017-12-31 20:23 GMT+01:00 Andrew Lunn <andrew@lunn.ch>: >> * Modify way of obtaining interrupts - with ACPI they are resources >> bound to struct platform_device and it's not possible to obtain >> them directly from the child node. Hence a formula is used, depending >> on the port_id and number of possible CPUs. > > Hi Marcin > > I know nothing about ACPI. Is this limitation with respect to > interrupts fundamental to ACPI, or just that nobody has implemented > flexible interrupt support yet? I think it's a limitation, however it would be great, if some real ACPI expert was able to give an opinion here. I'd really prefer to declare IRQ's in the child nodes, but it seems not possible. > >> * Until proper MDIO bus and PHY handling with ACPI is established in the >> kernel, use only link interrupts feature in the driver. > > I think interrupts might be interesting with PHY devices, since they > are child nodes of the MDIO device.... > Apart from the phylink's SFP support that may require in-band management, it's an alternative to the normal PHY handling. Once MDIO bus + PHYs are supported for ACPI, phylib support will be used instead of the IRQs, so there should be no problem here. Best regards, Marcin
> Apart from the phylink's SFP support that may require in-band > management, it's an alternative to the normal PHY handling. Once MDIO > bus + PHYs are supported for ACPI, phylib support will be used instead > of the IRQs, so there should be no problem here. Hi Marcin However, phylib and phylink can use IRQs. The PHY can interrupt when there is a change of state. This can be seen in the DT binding documentation example: ethernet-phy@0 { compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22"; interrupt-parent = <&PIC>; interrupts = <35 IRQ_TYPE_EDGE_RISING>; reg = <0>; Whatever ACPI support you propose needs to include interrupts. May i suggest you take a look at arch/arm/boot/dts/vf610-zii-dev-rev-c.dts and ensure your ACPI work can support this. I know you tend to concentrate of Marvell parts. Although it is a Freescale SoC, the Ethernet parts are all Marvell. The SoC exports an MDIO bus. We then have an MDIO multiplexer, which exports 8 MDIO busses. Of these only 2 are used in this design. Each bus has an Ethernet switch. Each switch has an MDIO bus, which the embedded PHYs are on. The Ethernet switch is also an interrupt controller for the PHYs interrupts. So the PHYs have interrupt properties pointing back to the switch. Andrew
Hi Andrew, 2018-01-02 14:33 GMT+01:00 Andrew Lunn <andrew@lunn.ch>: >> Apart from the phylink's SFP support that may require in-band >> management, it's an alternative to the normal PHY handling. Once MDIO >> bus + PHYs are supported for ACPI, phylib support will be used instead >> of the IRQs, so there should be no problem here. > > Hi Marcin > > However, phylib and phylink can use IRQs. The PHY can interrupt when > there is a change of state. This can be seen in the DT binding > documentation example: > > ethernet-phy@0 { > compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22"; > interrupt-parent = <&PIC>; > interrupts = <35 IRQ_TYPE_EDGE_RISING>; > reg = <0>; > > Whatever ACPI support you propose needs to include interrupts. > > May i suggest you take a look at > arch/arm/boot/dts/vf610-zii-dev-rev-c.dts and ensure your ACPI work > can support this. I know you tend to concentrate of Marvell parts. > Although it is a Freescale SoC, the Ethernet parts are all Marvell. > > The SoC exports an MDIO bus. We then have an MDIO multiplexer, which > exports 8 MDIO busses. Of these only 2 are used in this design. Each > bus has an Ethernet switch. Each switch has an MDIO bus, which the > embedded PHYs are on. The Ethernet switch is also an interrupt > controller for the PHYs interrupts. So the PHYs have interrupt > properties pointing back to the switch. > I thought you were pointing possible problems in mvpp2 with PHY/link interrupts, sorry. Now I get it :) Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is more a discussion for a MDIO bus / ACPI patchset, but we either find a way to use IRQs with ACPI obtained from child nodes or for this world the functionality will be limited (at least for the beginning). Best regards, Marcin
> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is more > a discussion for a MDIO bus / ACPI patchset, but we either find a way > to use IRQs with ACPI obtained from child nodes or for this world the > functionality will be limited (at least for the beginning). Hi Marcin What i want to avoid is adding something which partially works, and then have to throw it all away and start again in order to add full support. If ACPI really limits interrupts to devices, maybe we need a totally different representation of MDIO and PHYs in ACPI to what it used in device tree? The same may be true for the Ethernet ports of the mvpp2? They might have to be represented as real devices, not children of a device? Maybe trying to map DT to ACPI on a one-to-one basis is the wrong approach? Andrew
2018-01-02 15:08 GMT+01:00 Andrew Lunn <andrew@lunn.ch>: >> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is more >> a discussion for a MDIO bus / ACPI patchset, but we either find a way >> to use IRQs with ACPI obtained from child nodes or for this world the >> functionality will be limited (at least for the beginning). > > Hi Marcin > > What i want to avoid is adding something which partially works, and > then have to throw it all away and start again in order to add full > support. > > If ACPI really limits interrupts to devices, maybe we need a totally > different representation of MDIO and PHYs in ACPI to what it used in > device tree? The same may be true for the Ethernet ports of the mvpp2? > They might have to be represented as real devices, not children of a > device? Maybe trying to map DT to ACPI on a one-to-one basis is the > wrong approach? > In terms of PP2 controller, I'd prefer to keep as much as possible to describing how real hardware looks like, i.e. single common controller with multiple ports as its children. Those considerations are reflected in the DT description shape and how the driver enumerates, which was part of the design of the initial support. Bending the driver (huge amount of shared initialization and resources) to multiple instances just for the sake of possible avoidance of IRQ description in ACPI is IMO a huge and unnecessary overkill. Anyway, I'll do a more research on the resources / ACPI representation and will get back with some conclusions. I hope that someone from this thread recipents will be able to give some advice too :) Best regards, Marcin
On January 2, 2018 7:05:35 AM PST, Marcin Wojtas <mw@semihalf.com> wrote: >2018-01-02 15:08 GMT+01:00 Andrew Lunn <andrew@lunn.ch>: >>> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is >more >>> a discussion for a MDIO bus / ACPI patchset, but we either find a >way >>> to use IRQs with ACPI obtained from child nodes or for this world >the >>> functionality will be limited (at least for the beginning). >> >> Hi Marcin >> >> What i want to avoid is adding something which partially works, and >> then have to throw it all away and start again in order to add full >> support. >> >> If ACPI really limits interrupts to devices, maybe we need a totally >> different representation of MDIO and PHYs in ACPI to what it used in >> device tree? The same may be true for the Ethernet ports of the >mvpp2? >> They might have to be represented as real devices, not children of a >> device? Maybe trying to map DT to ACPI on a one-to-one basis is the >> wrong approach? >> > >In terms of PP2 controller, I'd prefer to keep as much as possible to >describing how real hardware looks like, i.e. single common controller >with multiple ports as its children. Those considerations are >reflected in the DT description shape and how the driver enumerates, >which was part of the design of the initial support. Bending the >driver (huge amount of shared initialization and resources) to >multiple instances just for the sake of possible avoidance of IRQ >description in ACPI is IMO a huge and unnecessary overkill. True, although keep in mind that Device Tree, as implemented in Linux allows for a lot of flexibility in how parent/child nodes are represented and backed or not by a corresponding struct device. I suspect ACPI is much less permissive than that and we might want to have a struct device for the whole mvpp2 controller as well as for the child ports within that controller (something you could today with device tree too, just it would be more overhead). This does not necessarily have to influence the representation within the description language but we should not be biased by how the current implementation using Device Tree has shaped both representation and implementation.
On Sun, Dec 31, 2017 at 08:23:54PM +0100, Andrew Lunn wrote: > > * Modify way of obtaining interrupts - with ACPI they are resources > > bound to struct platform_device and it's not possible to obtain > > them directly from the child node. Hence a formula is used, depending > > on the port_id and number of possible CPUs. > > Hi Marcin > > I know nothing about ACPI. Is this limitation with respect to > interrupts fundamental to ACPI, or just that nobody has implemented > flexible interrupt support yet? > The infrastructure is there to traverse trees of children, but I don't think there any helper functions. Graeme
Graeme, 2018-01-03 12:16 GMT+01:00 <graeme.gregory@linaro.org>: > On Sun, Dec 31, 2017 at 08:23:54PM +0100, Andrew Lunn wrote: >> > * Modify way of obtaining interrupts - with ACPI they are resources >> > bound to struct platform_device and it's not possible to obtain >> > them directly from the child node. Hence a formula is used, depending >> > on the port_id and number of possible CPUs. >> >> Hi Marcin >> >> I know nothing about ACPI. Is this limitation with respect to >> interrupts fundamental to ACPI, or just that nobody has implemented >> flexible interrupt support yet? >> > The infrastructure is there to traverse trees of children, but I don't > think there any helper functions. > Thanks, so if I implement such, do you expect any formal issues that prevent its acceptance? Best regards, Marcin
diff --git a/drivers/net/ethernet/marvell/mvpp2.c b/drivers/net/ethernet/marvell/mvpp2.c index 537474f..8b1c9a3 100644 --- a/drivers/net/ethernet/marvell/mvpp2.c +++ b/drivers/net/ethernet/marvell/mvpp2.c @@ -10,6 +10,7 @@ * warranty of any kind, whether express or implied. */ +#include <linux/acpi.h> #include <linux/kernel.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> @@ -7469,7 +7470,8 @@ static int mvpp2_simple_queue_vectors_init(struct mvpp2_port *port, return 0; } -static int mvpp2_multi_queue_vectors_init(struct mvpp2_port *port, +static int mvpp2_multi_queue_vectors_init(struct platform_device *pdev, + struct mvpp2_port *port, struct device_node *port_node) { struct mvpp2_queue_vector *v; @@ -7502,7 +7504,11 @@ static int mvpp2_multi_queue_vectors_init(struct mvpp2_port *port, strncpy(irqname, "rx-shared", sizeof(irqname)); } - v->irq = of_irq_get_byname(port_node, irqname); + if (port_node) + v->irq = of_irq_get_byname(port_node, irqname); + else + v->irq = platform_get_irq(pdev, port->id * + (port->nqvecs + 2) + i); if (v->irq <= 0) { ret = -EINVAL; goto err; @@ -7520,11 +7526,12 @@ static int mvpp2_multi_queue_vectors_init(struct mvpp2_port *port, return ret; } -static int mvpp2_queue_vectors_init(struct mvpp2_port *port, +static int mvpp2_queue_vectors_init(struct platform_device *pdev, + struct mvpp2_port *port, struct device_node *port_node) { if (port->has_tx_irqs) - return mvpp2_multi_queue_vectors_init(port, port_node); + return mvpp2_multi_queue_vectors_init(pdev, port, port_node); else return mvpp2_simple_queue_vectors_init(port, port_node); } @@ -7746,7 +7753,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, struct mvpp2 *priv) { struct device_node *phy_node; - struct phy *comphy; + struct phy *comphy = NULL; struct mvpp2_port *port; struct mvpp2_port_pcpu *port_pcpu; struct device_node *port_node = to_of_node(port_fwnode); @@ -7764,7 +7771,12 @@ static int mvpp2_port_probe(struct platform_device *pdev, if (!fwnode_device_is_available(port_fwnode)) return 0; - has_tx_irqs = mvpp2_port_has_tx_irqs(priv, port_node); + if (port_node) { + has_tx_irqs = mvpp2_port_has_tx_irqs(priv, port_node); + } else { + has_tx_irqs = true; + queue_mode = MVPP2_QDIST_MULTI_MODE; + } if (!has_tx_irqs) queue_mode = MVPP2_QDIST_SINGLE_MODE; @@ -7779,7 +7791,11 @@ static int mvpp2_port_probe(struct platform_device *pdev, if (!dev) return -ENOMEM; - phy_node = of_parse_phandle(port_node, "phy", 0); + if (port_node) + phy_node = of_parse_phandle(port_node, "phy", 0); + else + phy_node = NULL; + phy_mode = fwnode_get_phy_mode(port_fwnode); if (phy_mode < 0) { dev_err(&pdev->dev, "incorrect phy mode\n"); @@ -7787,13 +7803,15 @@ static int mvpp2_port_probe(struct platform_device *pdev, goto err_free_netdev; } - comphy = devm_of_phy_get(&pdev->dev, port_node, NULL); - if (IS_ERR(comphy)) { - if (PTR_ERR(comphy) == -EPROBE_DEFER) { - err = -EPROBE_DEFER; - goto err_free_netdev; + if (port_node) { + comphy = devm_of_phy_get(&pdev->dev, port_node, NULL); + if (IS_ERR(comphy)) { + if (PTR_ERR(comphy) == -EPROBE_DEFER) { + err = -EPROBE_DEFER; + goto err_free_netdev; + } + comphy = NULL; } - comphy = NULL; } if (fwnode_property_read_u32(port_fwnode, "port-id", &id)) { @@ -7813,12 +7831,18 @@ static int mvpp2_port_probe(struct platform_device *pdev, port->nrxqs = nrxqs; port->priv = priv; port->has_tx_irqs = has_tx_irqs; + port->id = id; - err = mvpp2_queue_vectors_init(port, port_node); + err = mvpp2_queue_vectors_init(pdev, port, port_node); if (err) goto err_free_netdev; - port->link_irq = of_irq_get_byname(port_node, "link"); + if (port_node) + port->link_irq = of_irq_get_byname(port_node, "link"); + else + port->link_irq = platform_get_irq(pdev, port->id * + (port->nqvecs + 2) + + port->nqvecs + 1); if (port->link_irq == -EPROBE_DEFER) { err = -EPROBE_DEFER; goto err_deinit_qvecs; @@ -7830,7 +7854,6 @@ static int mvpp2_port_probe(struct platform_device *pdev, if (fwnode_property_read_bool(port_fwnode, "marvell,loopback")) port->flags |= MVPP2_F_LOOPBACK; - port->id = id; if (priv->hw_version == MVPP21) port->first_rxq = port->id * port->nrxqs; else @@ -8201,6 +8224,7 @@ static int mvpp2_init(struct platform_device *pdev, struct mvpp2 *priv) static int mvpp2_probe(struct platform_device *pdev) { + const struct acpi_device_id *acpi_id; struct fwnode_handle *port_fwnode; struct mvpp2 *priv; struct resource *res; @@ -8212,8 +8236,14 @@ static int mvpp2_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - priv->hw_version = - (unsigned long)of_device_get_match_data(&pdev->dev); + if (has_acpi_companion(&pdev->dev)) { + acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table, + &pdev->dev); + priv->hw_version = (unsigned long)acpi_id->driver_data; + } else { + priv->hw_version = + (unsigned long)of_device_get_match_data(&pdev->dev); + } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(&pdev->dev, res); @@ -8227,10 +8257,23 @@ static int mvpp2_probe(struct platform_device *pdev) return PTR_ERR(priv->lms_base); } else { res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (has_acpi_companion(&pdev->dev)) { + /* In case the MDIO memory region is declared in + * the ACPI, it can already appear as 'in-use' + * in the OS. Because it is overlapped by second + * region of the network controller, make + * sure it is released, before requesting it again. + * The care is taken by mvpp2 driver to avoid + * concurrent access to this memory region. + */ + release_resource(res); + } priv->iface_base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(priv->iface_base)) return PTR_ERR(priv->iface_base); + } + if (priv->hw_version == MVPP22 && dev_of_node(&pdev->dev)) { priv->sysctrl_base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "marvell,system-controller"); @@ -8256,32 +8299,34 @@ static int mvpp2_probe(struct platform_device *pdev) else priv->max_port_rxqs = 32; - priv->pp_clk = devm_clk_get(&pdev->dev, "pp_clk"); - if (IS_ERR(priv->pp_clk)) - return PTR_ERR(priv->pp_clk); - err = clk_prepare_enable(priv->pp_clk); - if (err < 0) - return err; - - priv->gop_clk = devm_clk_get(&pdev->dev, "gop_clk"); - if (IS_ERR(priv->gop_clk)) { - err = PTR_ERR(priv->gop_clk); - goto err_pp_clk; - } - err = clk_prepare_enable(priv->gop_clk); - if (err < 0) - goto err_pp_clk; + if (dev_of_node(&pdev->dev)) { + priv->pp_clk = devm_clk_get(&pdev->dev, "pp_clk"); + if (IS_ERR(priv->pp_clk)) + return PTR_ERR(priv->pp_clk); + err = clk_prepare_enable(priv->pp_clk); + if (err < 0) + return err; - if (priv->hw_version == MVPP22) { - priv->mg_clk = devm_clk_get(&pdev->dev, "mg_clk"); - if (IS_ERR(priv->mg_clk)) { - err = PTR_ERR(priv->mg_clk); - goto err_gop_clk; + priv->gop_clk = devm_clk_get(&pdev->dev, "gop_clk"); + if (IS_ERR(priv->gop_clk)) { + err = PTR_ERR(priv->gop_clk); + goto err_pp_clk; } - - err = clk_prepare_enable(priv->mg_clk); + err = clk_prepare_enable(priv->gop_clk); if (err < 0) - goto err_gop_clk; + goto err_pp_clk; + + if (priv->hw_version == MVPP22) { + priv->mg_clk = devm_clk_get(&pdev->dev, "mg_clk"); + if (IS_ERR(priv->mg_clk)) { + err = PTR_ERR(priv->mg_clk); + goto err_gop_clk; + } + + err = clk_prepare_enable(priv->mg_clk); + if (err < 0) + goto err_gop_clk; + } priv->axi_clk = devm_clk_get(&pdev->dev, "axi_clk"); if (IS_ERR(priv->axi_clk)) { @@ -8294,10 +8339,14 @@ static int mvpp2_probe(struct platform_device *pdev) if (err < 0) goto err_gop_clk; } - } - /* Get system's tclk rate */ - priv->tclk = clk_get_rate(priv->pp_clk); + /* Get system's tclk rate */ + priv->tclk = clk_get_rate(priv->pp_clk); + } else if (device_property_read_u32(&pdev->dev, "clock-frequency", + &priv->tclk)) { + dev_err(&pdev->dev, "missing clock-frequency value\n"); + return -EINVAL; + } if (priv->hw_version == MVPP22) { err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)); @@ -8401,6 +8450,9 @@ static int mvpp2_remove(struct platform_device *pdev) aggr_txq->descs_dma); } + if (is_acpi_node(port_fwnode)) + return 0; + clk_disable_unprepare(priv->axi_clk); clk_disable_unprepare(priv->mg_clk); clk_disable_unprepare(priv->pp_clk); @@ -8422,12 +8474,19 @@ static const struct of_device_id mvpp2_match[] = { }; MODULE_DEVICE_TABLE(of, mvpp2_match); +static const struct acpi_device_id mvpp2_acpi_match[] = { + { "MRVL0110", MVPP22 }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, mvpp2_acpi_match); + static struct platform_driver mvpp2_driver = { .probe = mvpp2_probe, .remove = mvpp2_remove, .driver = { .name = MVPP2_DRIVER_NAME, .of_match_table = mvpp2_match, + .acpi_match_table = ACPI_PTR(mvpp2_acpi_match), }, };
This patch introduces an alternative way of obtaining resources - via ACPI tables provided by firmware. Enabling coexistence with the DT support, in addition to the OF_*->device_*/fwnode_* API replacement, required following steps to be taken: * Add mvpp2_acpi_match table * Omit clock configuration and obtain tclk from the property - in ACPI world, the firmware is responsible for clock maintenance. * Disable comphy and syscon handling as they are not available for ACPI. * Modify way of obtaining interrupts - with ACPI they are resources bound to struct platform_device and it's not possible to obtain them directly from the child node. Hence a formula is used, depending on the port_id and number of possible CPUs. * Until proper MDIO bus and PHY handling with ACPI is established in the kernel, use only link interrupts feature in the driver. * When booting with ACPI MVPP2_QDIST_MULTI_MODE is picked by default, as there is no need to keep any kind of the backward compatibility. Moreover, a memory region used by mvmdio driver is usually placed in the middle of the address space of the PP2 network controller. The MDIO base address is obtained without requesting memory region (by devm_ioremap() call) in mvmdio.c, later overlapping resources are requested by the network driver, which is responsible for avoiding a concurrent access. In case the MDIO memory region is declared in the ACPI, it can already appear as 'in-use' in the OS. Because it is overlapped by second region of the network controller, make sure it is released, before requesting it again. The care is taken by mvpp2 driver to avoid concurrent access to this memory region. Signed-off-by: Marcin Wojtas <mw@semihalf.com> --- drivers/net/ethernet/marvell/mvpp2.c | 147 ++++++++++++++------ 1 file changed, 103 insertions(+), 44 deletions(-)