Message ID | 20171220032328.30584-1-joel@jms.id.au |
---|---|
Headers | show |
Series | ARM: dts: aspeed: updates and new machines | expand |
On Wed, Dec 20, 2017 at 1:53 PM, Joel Stanley <joel@jms.id.au> wrote: > This series of device tree patches for the ASPEED BMC machines > moves all systems to use the soon to be merged clk driver, and > updates machines to use all of the drivers we have upstream. > > v3: Address review from Rob and Cedric > - Move aspeed-gpio.h usage out into the patches where use of the GPIO > is added > - Clarify that the aspeed-clock.h patch will be merged as part of > the device tree tree. This is to ensure we don't depend on the clk > tree for building. Arnd, Michael, Stephen; how do we resolve this? We need the dt-bindings header to be present for both the clk driver and the device tree to build. The clk driver is not (yet - soon I hope?) merged by Michael and Stephen. I am about to commit the device tree changes that will go through the ARM SoC tree. Cheers, Joel
On 12/20/2017 04:23 AM, Joel Stanley wrote: > - Fix incorrect RAM size > - Remove alias; these are now specified in the dtsi > - Add newly upstreamed devices > - Include OpenBMC flash layout > > Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> > --- > v3: > - Add GPIO include > - Fix duplicate fmc and spi nodes > - Add unit name for memory node to fix warning > --- > arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 133 +++++++++++++++++++++++++-- > 1 file changed, 126 insertions(+), 7 deletions(-) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > index a7a9386f964d..623b6ab42021 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > @@ -1,23 +1,19 @@ > // SPDX-License-Identifier: GPL-2.0+ > /dts-v1/; > - > #include "aspeed-g5.dtsi" > +#include <dt-bindings/gpio/aspeed-gpio.h> > > / { > model = "Romulus BMC"; > compatible = "ibm,romulus-bmc", "aspeed,ast2500"; > > - aliases { > - serial4 = &uart5; > - }; > - > chosen { > stdout-path = &uart5; > bootargs = "console=ttyS4,115200 earlyprintk"; > }; > > - memory { > - reg = <0x80000000 0x40000000>; > + memory@80000000 { > + reg = <0x80000000 0x20000000>; > }; > > reserved-memory { > @@ -29,6 +25,49 @@ > no-map; > reg = <0xbf000000 0x01000000>; /* 16M */ > }; > + > + flash_memory: region@98000000 { > + no-map; > + reg = <0x98000000 0x04000000>; /* 64M */ > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + fault { > + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>; > + }; > + > + identify { > + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_HIGH>; > + }; > + > + power { > + gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; > + }; > + }; > + > + fsi: gpio-fsi { > + compatible = "fsi-master-gpio", "fsi-master"; > + #address-cells = <2>; > + #size-cells = <0>; > + > + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; > + data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>; > + mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>; > + enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; > + trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + checkstop { > + label = "checkstop"; > + gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; > + linux,code = <ASPEED_GPIO(J, 2)>; > + }; > }; > }; > > @@ -38,6 +77,7 @@ > status = "okay"; > m25p,fast-read; > label = "bmc"; > +#include "openbmc-flash-layout.dtsi" > }; > }; > > @@ -53,6 +93,12 @@ > }; > }; > > +&lpc_ctrl { > + status = "okay"; > + memory-region = <&flash_memory>; > + flash = <&spi1>; > +}; > + > &uart1 { > /* Rear RS-232 connector */ > status = "okay"; > @@ -81,6 +127,10 @@ > pinctrl-0 = <&pinctrl_rmii1_default>; > }; > > +&i2c1 { > + status = "okay"; > +}; > + > &i2c2 { > status = "okay"; > }; > @@ -133,8 +183,77 @@ > > &i2c12 { > status = "okay"; > + > + max31785@52 { > + compatible = "maxim,max31785"; > + reg = <0x52>; > + }; > +}; > + > +&gpio { > + nic_func_mode0 { > + gpio-hog; > + gpios = <ASPEED_GPIO(D, 3) GPIO_ACTIVE_HIGH>; > + output-low; > + line-name = "nic_func_mode0"; > + }; > + nic_func_mode1 { > + gpio-hog; > + gpios = <ASPEED_GPIO(D, 4) GPIO_ACTIVE_HIGH>; > + output-low; > + line-name = "nic_func_mode1"; > + }; > }; > > &vuart { > status = "okay"; > }; > + > +&gfx { > + status = "okay"; > +}; > + > +&pinctrl { > + aspeed,external-nodes = <&gfx &lhc>; > +}; > + > +&pwm_tacho { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>; > + > + fan@0 { > + reg = <0x00>; > + aspeed,fan-tach-ch = /bits/ 8 <0x08>; > + }; > + > + fan@1 { > + reg = <0x00>; > + aspeed,fan-tach-ch = /bits/ 8 <0x09>; > + }; > + > + fan@2 { > + reg = <0x01>; > + aspeed,fan-tach-ch = /bits/ 8 <0x0a>; > + }; > + > + fan@3 { > + reg = <0x01>; > + aspeed,fan-tach-ch = /bits/ 8 <0x0b>; > + }; > + > + fan@4 { > + reg = <0x00>; > + aspeed,fan-tach-ch = /bits/ 8 <0x0c>; > + }; > + > + fan@5 { > + reg = <0x00>; > + aspeed,fan-tach-ch = /bits/ 8 <0x0d>; > + }; > + > + fan@6 { > + reg = <0x01>; > + aspeed,fan-tach-ch = /bits/ 8 <0x0e>; > + }; > +}; >
On Wed, Dec 20, 2017 at 4:37 AM, Joel Stanley <joel@jms.id.au> wrote: > On Wed, Dec 20, 2017 at 1:53 PM, Joel Stanley <joel@jms.id.au> wrote: >> This series of device tree patches for the ASPEED BMC machines >> moves all systems to use the soon to be merged clk driver, and >> updates machines to use all of the drivers we have upstream. >> >> v3: Address review from Rob and Cedric >> - Move aspeed-gpio.h usage out into the patches where use of the GPIO >> is added >> - Clarify that the aspeed-clock.h patch will be merged as part of >> the device tree tree. This is to ensure we don't depend on the clk >> tree for building. > > Arnd, Michael, Stephen; how do we resolve this? We need the > dt-bindings header to be present for both the clk driver and the > device tree to build. > > The clk driver is not (yet - soon I hope?) merged by Michael and > Stephen. I am about to commit the device tree changes that will go > through the ARM SoC tree. There are several options: - avoid the use of the header and redefine the binding to have a clear mapping between hardware clock lines and the numeric representation. This works better for some SoCs than others, YMMV. - Don't use the constants in the dts files for now, but use the numbers directly, and update the dts files for the next merge window - merge only one side for 4.16, either the driver or the dts files, and follow up with the other one in 4.17 - make one shared git branch that contains only the headers and base both the driver and the dts files on that branch so you get a single shared commit ID. I'm fine with any of the above, please pick whatever suits you best. Arnd
On Wed, Dec 20, 2017 at 01:53:10PM +1030, Joel Stanley wrote: > These are used to by the device tree to map pin numbers to constants > required by the GPIO bindings. > > Signed-off-by: Joel Stanley <joel@jms.id.au> > -- > v3: > - Remove dtsi includes from this patch, they will come later > --- > include/dt-bindings/gpio/aspeed-gpio.h | 49 ++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h Reviewed-by: Rob Herring <robh@kernel.org>