Message ID | 1511032148-30190-1-git-send-email-york.sun@nxp.com |
---|---|
State | Accepted |
Commit | 2544f47078635958bacb106684a2f81f57a4ed80 |
Delegated to: | Stefan Roese |
Headers | show |
Series | [U-Boot] mtd: cfi: Fix checking status register feature | expand |
On 11/18/2017 11:09 AM, York Sun wrote: > Commit 72443c7f7d21 ("mtd: cfi: Add support for status register > polling") added a feature check to determine if status register > is available for certain flash chips. The "lower software bits" > register used to determine this feature is not backward compati- > ble. Older flash chips without this feature has reserved value > 0xff. Instead of checking "lower software bits" register, use > CFI primary vendor-specific extended query. Since CFI version > 1.4, software features can be read from offset 0x53 according to > document AN201168 from Cypress. > > Signed-off-by: York Sun <york.sun@nxp.com> > CC: Marek Vasut <marek.vasut@gmail.com> > --- > > drivers/mtd/cfi_flash.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c > index 8a5babe..f096e03 100644 > --- a/drivers/mtd/cfi_flash.c > +++ b/drivers/mtd/cfi_flash.c > @@ -1694,7 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) > { > ushort bankId = 0; > uchar manuId; > - uchar lsbits; > + uchar feature; > > flash_write_cmd(info, 0, 0, AMD_CMD_RESET); > flash_unlock_seq(info, 0); > @@ -1710,8 +1710,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) > } > info->manufacturer_id = manuId; > > - lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS); > - info->sr_supported = lsbits & BIT(0); > + debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n", > + info->ext_addr, info->cfi_version); > + if (info->ext_addr && info->cfi_version >= 0x3134) { > + /* read software feature (at 0x53) */ > + feature = flash_read_uchar(info, info->ext_addr + 0x13); > + debug("feature = 0x%x\n", feature); > + info->sr_supported = feature & 0x1; > + } > > switch (info->chipwidth){ > case FLASH_CFI_8BIT: > Mark, Can you test this patch on your platforms? I verified on my boards. York
On 11/21/2017 03:52 AM, York Sun wrote: > On 11/18/2017 11:09 AM, York Sun wrote: >> Commit 72443c7f7d21 ("mtd: cfi: Add support for status register >> polling") added a feature check to determine if status register >> is available for certain flash chips. The "lower software bits" >> register used to determine this feature is not backward compati- >> ble. Older flash chips without this feature has reserved value >> 0xff. Instead of checking "lower software bits" register, use >> CFI primary vendor-specific extended query. Since CFI version >> 1.4, software features can be read from offset 0x53 according to >> document AN201168 from Cypress. >> >> Signed-off-by: York Sun <york.sun@nxp.com> >> CC: Marek Vasut <marek.vasut@gmail.com> >> --- >> >> drivers/mtd/cfi_flash.c | 12 +++++++++--- >> 1 file changed, 9 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c >> index 8a5babe..f096e03 100644 >> --- a/drivers/mtd/cfi_flash.c >> +++ b/drivers/mtd/cfi_flash.c >> @@ -1694,7 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) >> { >> ushort bankId = 0; >> uchar manuId; >> - uchar lsbits; >> + uchar feature; >> >> flash_write_cmd(info, 0, 0, AMD_CMD_RESET); >> flash_unlock_seq(info, 0); >> @@ -1710,8 +1710,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) >> } >> info->manufacturer_id = manuId; >> >> - lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS); >> - info->sr_supported = lsbits & BIT(0); >> + debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n", >> + info->ext_addr, info->cfi_version); >> + if (info->ext_addr && info->cfi_version >= 0x3134) { >> + /* read software feature (at 0x53) */ >> + feature = flash_read_uchar(info, info->ext_addr + 0x13); >> + debug("feature = 0x%x\n", feature); >> + info->sr_supported = feature & 0x1; >> + } >> >> switch (info->chipwidth){ >> case FLASH_CFI_8BIT: >> > > Mark, > > Can you test this patch on your platforms? I verified on my boards. Yes, I am getting to it ... will do this week. > York >
On 21.11.2017 10:54, Marek Vasut wrote: > On 11/21/2017 03:52 AM, York Sun wrote: >> On 11/18/2017 11:09 AM, York Sun wrote: >>> Commit 72443c7f7d21 ("mtd: cfi: Add support for status register >>> polling") added a feature check to determine if status register >>> is available for certain flash chips. The "lower software bits" >>> register used to determine this feature is not backward compati- >>> ble. Older flash chips without this feature has reserved value >>> 0xff. Instead of checking "lower software bits" register, use >>> CFI primary vendor-specific extended query. Since CFI version >>> 1.4, software features can be read from offset 0x53 according to >>> document AN201168 from Cypress. >>> >>> Signed-off-by: York Sun <york.sun@nxp.com> >>> CC: Marek Vasut <marek.vasut@gmail.com> >>> --- >>> >>> drivers/mtd/cfi_flash.c | 12 +++++++++--- >>> 1 file changed, 9 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c >>> index 8a5babe..f096e03 100644 >>> --- a/drivers/mtd/cfi_flash.c >>> +++ b/drivers/mtd/cfi_flash.c >>> @@ -1694,7 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) >>> { >>> ushort bankId = 0; >>> uchar manuId; >>> - uchar lsbits; >>> + uchar feature; >>> >>> flash_write_cmd(info, 0, 0, AMD_CMD_RESET); >>> flash_unlock_seq(info, 0); >>> @@ -1710,8 +1710,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) >>> } >>> info->manufacturer_id = manuId; >>> >>> - lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS); >>> - info->sr_supported = lsbits & BIT(0); >>> + debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n", >>> + info->ext_addr, info->cfi_version); >>> + if (info->ext_addr && info->cfi_version >= 0x3134) { >>> + /* read software feature (at 0x53) */ >>> + feature = flash_read_uchar(info, info->ext_addr + 0x13); >>> + debug("feature = 0x%x\n", feature); >>> + info->sr_supported = feature & 0x1; >>> + } >>> >>> switch (info->chipwidth){ >>> case FLASH_CFI_8BIT: >>> >> >> Mark, >> >> Can you test this patch on your platforms? I verified on my boards. > > Yes, I am getting to it ... will do this week. Marek, did you find some time to test this patch on your platform? Thanks, Stefan
On 11/30/2017 08:23 AM, Stefan Roese wrote: > On 21.11.2017 10:54, Marek Vasut wrote: >> On 11/21/2017 03:52 AM, York Sun wrote: >>> On 11/18/2017 11:09 AM, York Sun wrote: >>>> Commit 72443c7f7d21 ("mtd: cfi: Add support for status register >>>> polling") added a feature check to determine if status register >>>> is available for certain flash chips. The "lower software bits" >>>> register used to determine this feature is not backward compati- >>>> ble. Older flash chips without this feature has reserved value >>>> 0xff. Instead of checking "lower software bits" register, use >>>> CFI primary vendor-specific extended query. Since CFI version >>>> 1.4, software features can be read from offset 0x53 according to >>>> document AN201168 from Cypress. >>>> >>>> Signed-off-by: York Sun <york.sun@nxp.com> >>>> CC: Marek Vasut <marek.vasut@gmail.com> >>>> --- >>>> >>>> drivers/mtd/cfi_flash.c | 12 +++++++++--- >>>> 1 file changed, 9 insertions(+), 3 deletions(-) >>>> >>>> diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c >>>> index 8a5babe..f096e03 100644 >>>> --- a/drivers/mtd/cfi_flash.c >>>> +++ b/drivers/mtd/cfi_flash.c >>>> @@ -1694,7 +1694,7 @@ static void >>>> cmdset_amd_read_jedec_ids(flash_info_t *info) >>>> { >>>> ushort bankId = 0; >>>> uchar manuId; >>>> - uchar lsbits; >>>> + uchar feature; >>>> flash_write_cmd(info, 0, 0, AMD_CMD_RESET); >>>> flash_unlock_seq(info, 0); >>>> @@ -1710,8 +1710,14 @@ static void >>>> cmdset_amd_read_jedec_ids(flash_info_t *info) >>>> } >>>> info->manufacturer_id = manuId; >>>> - lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS); >>>> - info->sr_supported = lsbits & BIT(0); >>>> + debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n", >>>> + info->ext_addr, info->cfi_version); >>>> + if (info->ext_addr && info->cfi_version >= 0x3134) { >>>> + /* read software feature (at 0x53) */ >>>> + feature = flash_read_uchar(info, info->ext_addr + 0x13); >>>> + debug("feature = 0x%x\n", feature); >>>> + info->sr_supported = feature & 0x1; >>>> + } >>>> switch (info->chipwidth){ >>>> case FLASH_CFI_8BIT: >>>> >>> >>> Mark, >>> >>> Can you test this patch on your platforms? I verified on my boards. >> >> Yes, I am getting to it ... will do this week. > > Marek, did you find some time to test this patch on your platform? Not yet, but it's on my list.
On 11/18/2017 08:09 PM, York Sun wrote: > Commit 72443c7f7d21 ("mtd: cfi: Add support for status register > polling") added a feature check to determine if status register > is available for certain flash chips. The "lower software bits" > register used to determine this feature is not backward compati- > ble. Older flash chips without this feature has reserved value > 0xff. Instead of checking "lower software bits" register, use > CFI primary vendor-specific extended query. Since CFI version > 1.4, software features can be read from offset 0x53 according to > document AN201168 from Cypress. > > Signed-off-by: York Sun <york.sun@nxp.com> > CC: Marek Vasut <marek.vasut@gmail.com> On R8A7796 M3 ULCB Tested-by: Marek Vasut <marek.vasut@gmail.com> > --- > > drivers/mtd/cfi_flash.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c > index 8a5babe..f096e03 100644 > --- a/drivers/mtd/cfi_flash.c > +++ b/drivers/mtd/cfi_flash.c > @@ -1694,7 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) > { > ushort bankId = 0; > uchar manuId; > - uchar lsbits; > + uchar feature; > > flash_write_cmd(info, 0, 0, AMD_CMD_RESET); > flash_unlock_seq(info, 0); > @@ -1710,8 +1710,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) > } > info->manufacturer_id = manuId; > > - lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS); > - info->sr_supported = lsbits & BIT(0); > + debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n", > + info->ext_addr, info->cfi_version); > + if (info->ext_addr && info->cfi_version >= 0x3134) { > + /* read software feature (at 0x53) */ > + feature = flash_read_uchar(info, info->ext_addr + 0x13); > + debug("feature = 0x%x\n", feature); > + info->sr_supported = feature & 0x1; Stefan, can you fix it up while applying to use BIT(0) here please ? > + } > > switch (info->chipwidth){ > case FLASH_CFI_8BIT: >
On 02.12.2017 10:15, Marek Vasut wrote: > On 11/18/2017 08:09 PM, York Sun wrote: >> Commit 72443c7f7d21 ("mtd: cfi: Add support for status register >> polling") added a feature check to determine if status register >> is available for certain flash chips. The "lower software bits" >> register used to determine this feature is not backward compati- >> ble. Older flash chips without this feature has reserved value >> 0xff. Instead of checking "lower software bits" register, use >> CFI primary vendor-specific extended query. Since CFI version >> 1.4, software features can be read from offset 0x53 according to >> document AN201168 from Cypress. >> >> Signed-off-by: York Sun <york.sun@nxp.com> >> CC: Marek Vasut <marek.vasut@gmail.com> > > On R8A7796 M3 ULCB > Tested-by: Marek Vasut <marek.vasut@gmail.com> Applied to u-boot-cfi-flash/master. Thanks, Stefan
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 8a5babe..f096e03 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1694,7 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) { ushort bankId = 0; uchar manuId; - uchar lsbits; + uchar feature; flash_write_cmd(info, 0, 0, AMD_CMD_RESET); flash_unlock_seq(info, 0); @@ -1710,8 +1710,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) } info->manufacturer_id = manuId; - lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS); - info->sr_supported = lsbits & BIT(0); + debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n", + info->ext_addr, info->cfi_version); + if (info->ext_addr && info->cfi_version >= 0x3134) { + /* read software feature (at 0x53) */ + feature = flash_read_uchar(info, info->ext_addr + 0x13); + debug("feature = 0x%x\n", feature); + info->sr_supported = feature & 0x1; + } switch (info->chipwidth){ case FLASH_CFI_8BIT:
Commit 72443c7f7d21 ("mtd: cfi: Add support for status register polling") added a feature check to determine if status register is available for certain flash chips. The "lower software bits" register used to determine this feature is not backward compati- ble. Older flash chips without this feature has reserved value 0xff. Instead of checking "lower software bits" register, use CFI primary vendor-specific extended query. Since CFI version 1.4, software features can be read from offset 0x53 according to document AN201168 from Cypress. Signed-off-by: York Sun <york.sun@nxp.com> CC: Marek Vasut <marek.vasut@gmail.com> --- drivers/mtd/cfi_flash.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)