| Message ID | 4CFFB571.9080308@codesourcery.com |
|---|---|
| State | New |
| Headers | show |
On Thu, 2010-12-09 at 00:42 +0800, Yao Qi wrote: > This patch is to implement to targethook preferred_rename_class, in > order to prefer LO_REGS registers over GENERAL_REGS registers in Thumb-2. > > EEMBC doesn't show speed improvements, but code size of some benchmarks > in EEMBC is reduced by 0.1% ~ 0.2%. Regression tested on '2010-11-30' > trunk. OK for mainline? > This is OK. However, I don't see any point in calling the default version of this function when that's defined to just return NO_REGS. Just do that directly yourself and save the overhead of another branch. R.
Can't approve or reject your patch but a very minor nit :) On Thu, 2010-12-09 at 00:42 +0800, Yao Qi wrote: > +static reg_class_t > +arm_preferred_rename_class (reg_class_t class) > +{ > + /* thumb-2 instructions using LO_REGS may be smaller than > instructions s/thumb-2/Thumb-2 or s/thumb-2/Thumb2 though Thumb-2 seems to be the preferred form in large parts of the source. Cheers Ramana
On 12/09/2010 12:58 AM, Richard Earnshaw wrote: > > On Thu, 2010-12-09 at 00:42 +0800, Yao Qi wrote: >> This patch is to implement to targethook preferred_rename_class, in >> order to prefer LO_REGS registers over GENERAL_REGS registers in Thumb-2. >> >> EEMBC doesn't show speed improvements, but code size of some benchmarks >> in EEMBC is reduced by 0.1% ~ 0.2%. Regression tested on '2010-11-30' >> trunk. OK for mainline? >> > > This is OK. However, I don't see any point in calling the default > version of this function when that's defined to just return NO_REGS. > Just do that directly yourself and save the overhead of another branch. OK, return NO_REGS directly in arm_preferred_rename_class, and replace "thumb-2" with "Thumb-2" in comments as Ramana pointed out. Committed.
gcc/ * config/arm/arm.c (arm_preferred_rename_class): Implement targethook PREFERRED_RENAME_CLASS. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index afca3c6..1b27f00 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -246,6 +246,7 @@ static bool arm_builtin_support_vector_misalignment (enum machine_mode mode, const_tree type, int misalignment, bool is_packed); +static reg_class_t arm_preferred_rename_class (reg_class_t class) /* Table of machine attributes. */ @@ -578,6 +579,10 @@ static const struct default_options arm_option_optimization_table[] = #define TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT \ arm_builtin_support_vector_misalignment +#undef TARGET_PREFERRED_RENAME_CLASS +#define TARGET_PREFERRED_RENAME_CLASS \ + arm_preferred_rename_class + struct gcc_target targetm = TARGET_INITIALIZER; /* Obstack for minipool constant handling. */ @@ -23264,4 +23269,16 @@ arm_builtin_support_vector_misalignment (enum machine_mode mode, is_packed); } +static reg_class_t +arm_preferred_rename_class (reg_class_t class) +{ + /* thumb-2 instructions using LO_REGS may be smaller than instructions + using GENERIC_REGS. During register rename pass, we prefer LO_REGS, + and code size can be reduced. */ + if (TARGET_THUMB2 && class == GENERAL_REGS) + return LO_REGS; + else + return default_preferred_rename_class (class); +} + #include "gt-arm.h"