Message ID | 1501693429-12893-1-git-send-email-breno.lima@nxp.com |
---|---|
State | Accepted |
Commit | a500a3311529ca79cfd51f1e223e77a94c78fbf1 |
Delegated to: | Stefano Babic |
Headers | show
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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR0301MB2116 Cc: Breno Lima <breno.lima@nxp.com>, u-boot@lists.denx.de Subject: [U-Boot] [PATCH] mx6sabresd: Fix IOMUXC_GPR6 and IOMUXC_GPR7 values X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <http://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> |
On 02/08/2017 19:03, Breno Lima wrote: > The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as > commented in the code: > /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ > > Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F. > > Signed-off-by: Breno Lima <breno.lima@nxp.com> > --- > board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c > index e416042..5329c3b 100644 > --- a/board/freescale/mx6sabresd/mx6sabresd.c > +++ b/board/freescale/mx6sabresd/mx6sabresd.c > @@ -755,8 +755,8 @@ static void gpr_init(void) > writel(0xF00000CF, &iomux->gpr[4]); > if (is_mx6dqp()) { > /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ > - writel(0x007F007F, &iomux->gpr[6]); > - writel(0x007F007F, &iomux->gpr[7]); > + writel(0x77177717, &iomux->gpr[6]); > + writel(0x77177717, &iomux->gpr[7]); > } else { > /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ > writel(0x007F007F, &iomux->gpr[6]);> And of course, I apply this as well: Applied to -master, thanks ! Best regards, Stefano Babic
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index e416042..5329c3b 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -755,8 +755,8 @@ static void gpr_init(void) writel(0xF00000CF, &iomux->gpr[4]); if (is_mx6dqp()) { /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ - writel(0x007F007F, &iomux->gpr[6]); - writel(0x007F007F, &iomux->gpr[7]); + writel(0x77177717, &iomux->gpr[6]); + writel(0x77177717, &iomux->gpr[7]); } else { /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ writel(0x007F007F, &iomux->gpr[6]);
The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as commented in the code: /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F. Signed-off-by: Breno Lima <breno.lima@nxp.com> --- board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)