diff mbox

[v3,1/3] dt-bindings: pinctrl: add most other IPQ4019 pin functions and groups

Message ID d45ae31e888ad858d9f4396cabb4dc32a3f0365e.1500038134.git.chunkeey@googlemail.com
State Not Applicable, archived
Headers show

Commit Message

Christian Lamparter July 14, 2017, 2:14 p.m. UTC 
This patch adds the remaining pin functions and mux groups.
All unknown and debug functions are omitted. Existing functions
for qpic, sdio, rgmii, rmii, wifi/d are squashed together as
much as possible. And only in case of a clash, the individually
named functions have been kept. The exceptions are:
	led0-11
	i2s_rx, i2s_tx, i2s_td, i2s_spdif_in, i2s_spdif_out,
	smart0-3

Cc: Varadarajan Narayanan <varada@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Ram Chandra Jangir <rjangir@codeaurora.org>
Cc: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
 Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Bjorn Andersson July 14, 2017, 3:54 p.m. UTC | #1 
On Fri 14 Jul 07:14 PDT 2017, Christian Lamparter wrote:

> This patch adds the remaining pin functions and mux groups.
> All unknown and debug functions are omitted. Existing functions
> for qpic, sdio, rgmii, rmii, wifi/d are squashed together as
> much as possible. And only in case of a clash, the individually
> named functions have been kept. The exceptions are:
> 	led0-11
> 	i2s_rx, i2s_tx, i2s_td, i2s_spdif_in, i2s_spdif_out,
> 	smart0-3
> 
> Cc: Varadarajan Narayanan <varada@codeaurora.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Ram Chandra Jangir <rjangir@codeaurora.org>
> Cc: John Crispin <john@phrozen.org>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> ---
>  Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt
> index cfb8500dd56b..93374f478b9e 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt
> @@ -50,7 +50,11 @@ Valid values for qcom,pins are:
>      Supports mux, bias and drive-strength
>  
>  Valid values for qcom,function are:
> -gpio, blsp_uart1, blsp_i2c0, blsp_i2c1, blsp_uart0, blsp_spi1, blsp_spi0
> +aud_pin, audio_pwm, blsp_i2c0, blsp_i2c1, blsp_spi0, blsp_spi1, blsp_uart0,
> +blsp_uart1, chip_rst, gpio, i2s_rx, i2s_spdif_in, i2s_spdif_out, i2s_td, i2s_tx,
> +jtag, led0, led1, led2, led3, led4, led5, led6, led7, led8, led9, led10, led11,
> +mdc, mdio, pcie, pmu, prng_rosc, qpic, rgmii, rmii, sdio, smart0, smart1,
> +smart2, smart3, tm, wifi0, wifi1
>  
>  Example:
>  
> -- 
> 2.13.2
> 
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Bjorn Andersson July 14, 2017, 3:57 p.m. UTC | #2 
On Fri 14 Jul 07:14 PDT 2017, Christian Lamparter wrote:

> From: Ram Chandra Jangir <rjangir@codeaurora.org>
> 
> This patch adds multiple pinctrl functions and mappings
> for SDIO, NAND, I2S, WIFI, PCIE, LEDs, etc... that have
> been missing from the current minimal version.
> 
> This patch has been updated from the original version
> that was posted by Ram Chandra Jangir on the LEDE-DEV ML:
> <https://patchwork.ozlabs.org/patch/752962/>. A short
> summary of the changes are documented in the device-tree
> patch of this series:
> "dt-bindings: pinctrl: add most other IPQ4019 pin functions and groups"
> 
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: John Crispin <john@phrozen.org>
> Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
> Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> ---
>  drivers/pinctrl/qcom/pinctrl-ipq4019.c | 431 ++++++++++++++++++++++++++-------
>  1 file changed, 346 insertions(+), 85 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
> index 743d1f458205..9e7f23d29cda 100644
> --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
> +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
> @@ -277,12 +277,49 @@ DECLARE_QCA_GPIO_PINS(99);
>  
>  enum ipq4019_functions {
>  	qca_mux_gpio,
> -	qca_mux_blsp_uart1,
> +	qca_mux_aud_pin,
> +	qca_mux_audio_pwm,
>  	qca_mux_blsp_i2c0,
>  	qca_mux_blsp_i2c1,
> -	qca_mux_blsp_uart0,
> -	qca_mux_blsp_spi1,
>  	qca_mux_blsp_spi0,
> +	qca_mux_blsp_spi1,
> +	qca_mux_blsp_uart0,
> +	qca_mux_blsp_uart1,
> +	qca_mux_chip_rst,
> +	qca_mux_i2s_rx,
> +	qca_mux_i2s_spdif_in,
> +	qca_mux_i2s_spdif_out,
> +	qca_mux_i2s_td,
> +	qca_mux_i2s_tx,
> +	qca_mux_jtag,
> +	qca_mux_led0,
> +	qca_mux_led1,
> +	qca_mux_led2,
> +	qca_mux_led3,
> +	qca_mux_led4,
> +	qca_mux_led5,
> +	qca_mux_led6,
> +	qca_mux_led7,
> +	qca_mux_led8,
> +	qca_mux_led9,
> +	qca_mux_led10,
> +	qca_mux_led11,
> +	qca_mux_mdc,
> +	qca_mux_mdio,
> +	qca_mux_pcie,
> +	qca_mux_pmu,
> +	qca_mux_prng_rosc,
> +	qca_mux_qpic,
> +	qca_mux_rgmii,
> +	qca_mux_rmii,
> +	qca_mux_sdio,
> +	qca_mux_smart0,
> +	qca_mux_smart1,
> +	qca_mux_smart2,
> +	qca_mux_smart3,
> +	qca_mux_tm,
> +	qca_mux_wifi0,
> +	qca_mux_wifi1,
>  	qca_mux_NA,
>  };
>  
> @@ -303,108 +340,331 @@ static const char * const gpio_groups[] = {
>  	"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
>  	"gpio99",
>  };
> -
> -static const char * const blsp_uart1_groups[] = {
> -	"gpio8", "gpio9", "gpio10", "gpio11",
> +static const char * const aud_pin_groups[] = {
> +	"gpio48", "gpio49", "gpio50", "gpio51",
> +};
> +static const char * const audio_pwm_groups[] = {
> +	"gpio30", "gpio31", "gpio32", "gpio33", "gpio64", "gpio65", "gpio66",
> +	"gpio67",
>  };
>  static const char * const blsp_i2c0_groups[] = {
>  	"gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59",
>  };
> -static const char * const blsp_spi0_groups[] = {
> -	"gpio12", "gpio13", "gpio14", "gpio15", "gpio45",
> -	"gpio54", "gpio55", "gpio56", "gpio57",
> -};
>  static const char * const blsp_i2c1_groups[] = {
>  	"gpio12", "gpio13", "gpio34", "gpio35",
>  };
> -static const char * const blsp_uart0_groups[] = {
> -	"gpio16", "gpio17", "gpio60", "gpio61",
> +static const char * const blsp_spi0_groups[] = {
> +	"gpio12", "gpio13", "gpio14", "gpio15", "gpio45", "gpio54", "gpio55",
> +	"gpio56", "gpio57",
>  };
>  static const char * const blsp_spi1_groups[] = {
>  	"gpio44", "gpio45", "gpio46", "gpio47",
>  };
> +static const char * const blsp_uart0_groups[] = {
> +	"gpio16", "gpio17", "gpio60", "gpio61",
> +};
> +static const char * const blsp_uart1_groups[] = {
> +	"gpio8", "gpio9", "gpio10", "gpio11",
> +};
> +static const char * const chip_rst_groups[] = {
> +	"gpio62",
> +};
> +static const char * const i2s_rx_groups[] = {
> +	"gpio0", "gpio1", "gpio2", "gpio20", "gpio21", "gpio22", "gpio23",
> +	"gpio58", "gpio60", "gpio61", "gpio63",
> +};
> +static const char * const i2s_spdif_in_groups[] = {
> +	"gpio34", "gpio59", "gpio63",
> +};
> +static const char * const i2s_spdif_out_groups[] = {
> +	"gpio35", "gpio62", "gpio63",
> +};
> +static const char * const i2s_td_groups[] = {
> +	"gpio27", "gpio28", "gpio29", "gpio54", "gpio55", "gpio56", "gpio63",
> +};
> +static const char * const i2s_tx_groups[] = {
> +	"gpio24", "gpio25", "gpio26", "gpio52", "gpio53", "gpio57", "gpio60",
> +	"gpio61",
> +};
> +static const char * const jtag_groups[] = {
> +	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
> +};
> +static const char * const led0_groups[] = {
> +	"gpio16", "gpio36", "gpio60",
> +};
> +static const char * const led1_groups[] = {
> +	"gpio17", "gpio37", "gpio61",
> +};
> +static const char * const led2_groups[] = {
> +	"gpio36", "gpio38", "gpio58",
> +};
> +static const char * const led3_groups[] = {
> +	"gpio39",
> +};
> +static const char * const led4_groups[] = {
> +	"gpio40",
> +};
> +static const char * const led5_groups[] = {
> +	"gpio44",
> +};
> +static const char * const led6_groups[] = {
> +	"gpio45",
> +};
> +static const char * const led7_groups[] = {
> +	"gpio46",
> +};
> +static const char * const led8_groups[] = {
> +	"gpio47",
> +};
> +static const char * const led9_groups[] = {
> +	"gpio48",
> +};
> +static const char * const led10_groups[] = {
> +	"gpio49",
> +};
> +static const char * const led11_groups[] = {
> +	"gpio50",
> +};
> +static const char * const mdc_groups[] = {
> +	"gpio7", "gpio52",
> +};
> +static const char * const mdio_groups[] = {
> +	"gpio6", "gpio53",
> +};
> +static const char * const pcie_groups[] = {
> +	"gpio39", "gpio52",
> +};
> +static const char * const pmu_groups[] = {
> +	"gpio54", "gpio55",
> +};
> +static const char * const prng_rosc_groups[] = {
> +	"gpio53",
> +};
> +static const char * const qpic_groups[] = {
> +	"gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
> +	"gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65",
> +	"gpio66", "gpio67", "gpio68", "gpio69",
> +};
> +static const char * const rgmii_groups[] = {
> +	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
> +	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33",
> +};
> +static const char * const rmii_groups[] = {
> +	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
> +	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
> +	"gpio50", "gpio51",
> +};
> +static const char * const sdio_groups[] = {
> +	"gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
> +	"gpio30", "gpio31", "gpio32",
> +};
> +static const char * const smart0_groups[] = {
> +	"gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46",
> +	"gpio47",
> +};
> +static const char * const smart1_groups[] = {
> +	"gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60",
> +	"gpio61",
> +};
> +static const char * const smart2_groups[] = {
> +	"gpio40", "gpio41", "gpio48", "gpio49",
> +};
> +static const char * const smart3_groups[] = {
> +	"gpio58", "gpio59", "gpio60", "gpio61",
> +};
> +static const char * const tm_groups[] = {
> +	"gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
> +	"gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
> +};
> +static const char * const wifi0_groups[] = {
> +	"gpio37", "gpio40", "gpio41", "gpio42", "gpio50", "gpio51", "gpio52",
> +	"gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
> +};
> +static const char * const wifi1_groups[] = {
> +	"gpio37", "gpio40", "gpio41", "gpio43", "gpio50", "gpio51", "gpio52",
> +	"gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
> +};
>  
>  static const struct msm_function ipq4019_functions[] = {
> -	FUNCTION(gpio),
> -	FUNCTION(blsp_uart1),
> +	FUNCTION(aud_pin),
> +	FUNCTION(audio_pwm),
>  	FUNCTION(blsp_i2c0),
>  	FUNCTION(blsp_i2c1),
> -	FUNCTION(blsp_uart0),
> -	FUNCTION(blsp_spi1),
>  	FUNCTION(blsp_spi0),
> +	FUNCTION(blsp_spi1),
> +	FUNCTION(blsp_uart0),
> +	FUNCTION(blsp_uart1),
> +	FUNCTION(chip_rst),
> +	FUNCTION(gpio),
> +	FUNCTION(i2s_rx),
> +	FUNCTION(i2s_spdif_in),
> +	FUNCTION(i2s_spdif_out),
> +	FUNCTION(i2s_td),
> +	FUNCTION(i2s_tx),
> +	FUNCTION(jtag),
> +	FUNCTION(led0),
> +	FUNCTION(led1),
> +	FUNCTION(led2),
> +	FUNCTION(led3),
> +	FUNCTION(led4),
> +	FUNCTION(led5),
> +	FUNCTION(led6),
> +	FUNCTION(led7),
> +	FUNCTION(led8),
> +	FUNCTION(led9),
> +	FUNCTION(led10),
> +	FUNCTION(led11),
> +	FUNCTION(mdc),
> +	FUNCTION(mdio),
> +	FUNCTION(pcie),
> +	FUNCTION(pmu),
> +	FUNCTION(prng_rosc),
> +	FUNCTION(qpic),
> +	FUNCTION(rgmii),
> +	FUNCTION(rmii),
> +	FUNCTION(sdio),
> +	FUNCTION(smart0),
> +	FUNCTION(smart1),
> +	FUNCTION(smart2),
> +	FUNCTION(smart3),
> +	FUNCTION(tm),
> +	FUNCTION(wifi0),
> +	FUNCTION(wifi1),
>  };
>  
>  static const struct msm_pingroup ipq4019_groups[] = {
> -	PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(5, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(8, blsp_uart1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(9, blsp_uart1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(16, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(17, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
>  	PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(20, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(21, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(22, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(23, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(24, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(25, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(27, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(28, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(29, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(34, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(35, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(44, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(45, NA, blsp_spi1, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(46, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(47, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(54, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(55, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(56, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(57, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(58, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(59, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(60, NA, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(61, NA, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA, NA),
> +	PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA, NA),
> +	PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
> +	PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA,
> +		 NA, NA, NA, NA, NA),
> +	PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA,
> +		 NA, NA, NA, NA),
> +	PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA,
> +		 NA, NA, NA),
> +	PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA,
> +		 NA, NA, NA, NA, NA),
> +	PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
> +		 NA, NA, NA),
> +	PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA,
> +		 NA, NA, NA, NA),
> +	PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA,
> +		 NA, NA, NA, NA),
> +	PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm,
> +		 wifi0, wifi1, NA, NA, NA),
> +	PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA,
> +		 NA, NA, tm, NA, NA, NA),
> +	PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx,
> +		 NA, NA, NA, NA, NA, tm, NA),
> +	PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx,
> +		 NA, NA, NA, NA, NA, tm, NA),
> +	PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA,
> +		 tm, NA, NA, NA),
> +	PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out,
> +		 i2s_spdif_in, NA, NA, NA, NA, tm, NA),
> +	PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA, NA),
> +	PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> @@ -433,7 +693,8 @@ static const struct msm_pingroup ipq4019_groups[] = {
>  	PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(98, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
> +		 NA),
>  	PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
>  };
>  
> -- 
> 2.13.2
> 
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Linus Walleij July 31, 2017, 1:15 p.m. UTC | #3 
On Fri, Jul 14, 2017 at 4:14 PM, Christian Lamparter
<chunkeey@googlemail.com> wrote:

> This patch adds the remaining pin functions and mux groups.
> All unknown and debug functions are omitted. Existing functions
> for qpic, sdio, rgmii, rmii, wifi/d are squashed together as
> much as possible. And only in case of a clash, the individually
> named functions have been kept. The exceptions are:
>         led0-11
>         i2s_rx, i2s_tx, i2s_td, i2s_spdif_in, i2s_spdif_out,
>         smart0-3
>
> Cc: Varadarajan Narayanan <varada@codeaurora.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Ram Chandra Jangir <rjangir@codeaurora.org>
> Cc: John Crispin <john@phrozen.org>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>

Patch applied with Björn's ACK.

Yours,
Linus Walleij
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Linus Walleij July 31, 2017, 1:17 p.m. UTC | #4 
On Fri, Jul 14, 2017 at 4:14 PM, Christian Lamparter
<chunkeey@googlemail.com> wrote:

> From: Ram Chandra Jangir <rjangir@codeaurora.org>
>
> This patch adds multiple pinctrl functions and mappings
> for SDIO, NAND, I2S, WIFI, PCIE, LEDs, etc... that have
> been missing from the current minimal version.
>
> This patch has been updated from the original version
> that was posted by Ram Chandra Jangir on the LEDE-DEV ML:
> <https://patchwork.ozlabs.org/patch/752962/>. A short
> summary of the changes are documented in the device-tree
> patch of this series:
> "dt-bindings: pinctrl: add most other IPQ4019 pin functions and groups"
>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: John Crispin <john@phrozen.org>
> Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
> Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>

Patch applied with Björn's ACK.

Yours,
Linus Walleij
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Linus Walleij July 31, 2017, 1:19 p.m. UTC | #5 
On Fri, Jul 14, 2017 at 4:14 PM, Christian Lamparter
<chunkeey@googlemail.com> wrote:

> From: Ram Chandra Jangir <rjangir@codeaurora.org>
>
> GPIO_PULL bits configurations in TLMM_GPIO_CFG register
> differs for IPQ40xx from rest of the other qcom SoCs.
> As it does not support the keeper state and therefore can't
> support bias-bus-hold property.
>
> This patch adds a pull_no_keeper setting which configures the
> msm_gpio_pull bits for ipq40xx. This is required to fix the
> proper configurations of gpio-pull bits for nand pins mux.
>
> IPQ40xx SoC:
> 2'b10: Internal pull up enable.
> 2'b11: Unsupport
>
> For other SoC's:
> 2'b10: Keeper
> 2'b11: Pull-Up
>
> Note: Due to pull_no_keeper length, all kerneldoc entries
> in the msm_pinctrl_soc_data struct had to be realigned.
>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
> Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>

Patch applied.

Yours,
Linus Walleij
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt
index cfb8500dd56b..93374f478b9e 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt
@@ -50,7 +50,11 @@  Valid values for qcom,pins are:
     Supports mux, bias and drive-strength
 
 Valid values for qcom,function are:
-gpio, blsp_uart1, blsp_i2c0, blsp_i2c1, blsp_uart0, blsp_spi1, blsp_spi0
+aud_pin, audio_pwm, blsp_i2c0, blsp_i2c1, blsp_spi0, blsp_spi1, blsp_uart0,
+blsp_uart1, chip_rst, gpio, i2s_rx, i2s_spdif_in, i2s_spdif_out, i2s_td, i2s_tx,
+jtag, led0, led1, led2, led3, led4, led5, led6, led7, led8, led9, led10, led11,
+mdc, mdio, pcie, pmu, prng_rosc, qpic, rgmii, rmii, sdio, smart0, smart1,
+smart2, smart3, tm, wifi0, wifi1
 
 Example: