| Message ID | 1492567595-3556-1-git-send-email-james@balean.com.au |
|---|---|
| State | Accepted |
| Commit | 46f51dc9c73cbfe5ca69a1b662e594b486bd8616 |
| Delegated to: | Tom Rini |
| Headers | show |
Hello James, Disregarding one missing space this looks good to me. On 19.04.2017 04:06, James Balean wrote: > Enables the pinctrl-single driver to support 16-bit registers. Only > 32-bit registers were supported previously. Reduced width registers are > required for some platforms, such as OMAP. > > Signed-off-by: James Balean <james@balean.com.au> > Cc: Felix Brack <fb@ltec.ch> > Cc: Simon Glass <sjg@chromium.org> > --- > Changes for v3: > - Fixes incorrect v2 submission. > - Inline rather than separate read/write function calls. > > drivers/pinctrl/pinctrl-single.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c > index d2dcec0..f19f779 100644 > --- a/drivers/pinctrl/pinctrl-single.c > +++ b/drivers/pinctrl/pinctrl-single.c > @@ -47,27 +47,27 @@ static int single_configure_pins(struct udevice *dev, > int n, reg; > u32 val; > > - for (n = 0; n < count; n++) { > + for (n = 0; n < count; n++, pins++) { > reg = fdt32_to_cpu(pins->reg); > if ((reg < 0) || (reg > pdata->offset)) { > dev_dbg(dev, " invalid register offset 0x%08x\n", reg); > - pins++; > continue; > } > reg += pdata->base; > + val = fdt32_to_cpu(pins->val) & pdata->mask; > switch (pdata->width) { > + case 16: > + writew((readw(reg) & ~pdata->mask) | val, reg); > + break; > case 32: > - val = readl(reg) & ~pdata->mask; > - val |= fdt32_to_cpu(pins->val) & pdata->mask; > - writel(val, reg); > - dev_dbg(dev, " reg/val 0x%08x/0x%08x\n", > - reg, val); > + writel((readl(reg) & ~pdata->mask) | val, reg); > break; > default: > dev_warn(dev, "unsupported register width %i\n", > pdata->width); > + continue; > } > - pins++; > + dev_dbg(dev, " reg/val 0x%08x/0x%08x\n",reg, val); Missing space just before 'reg'. > } > return 0; > } > Reviewed-by: Felix Brack <fb@ltec.ch> For the 32 bit path and an AM355x based hardware: Tested-by: Felix Brack <fb@ltec.ch> regards Felix
On 18 April 2017 at 20:06, James Balean <james@balean.com.au> wrote: > Enables the pinctrl-single driver to support 16-bit registers. Only > 32-bit registers were supported previously. Reduced width registers are > required for some platforms, such as OMAP. > > Signed-off-by: James Balean <james@balean.com.au> > Cc: Felix Brack <fb@ltec.ch> > Cc: Simon Glass <sjg@chromium.org> > --- > Changes for v3: > - Fixes incorrect v2 submission. > - Inline rather than separate read/write function calls. > > drivers/pinctrl/pinctrl-single.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) Reviewed-by: Simon Glass <sjg@chromium.org>
On Tue, Apr 18, 2017 at 09:06:35PM -0500, James Balean wrote: > Enables the pinctrl-single driver to support 16-bit registers. Only > 32-bit registers were supported previously. Reduced width registers are > required for some platforms, such as OMAP. > > Signed-off-by: James Balean <james@balean.com.au> > Cc: Felix Brack <fb@ltec.ch> > Cc: Simon Glass <sjg@chromium.org> > Reviewed-by: Felix Brack <fb@ltec.ch> > Tested-by: Felix Brack <fb@ltec.ch> > Reviewed-by: Simon Glass <sjg@chromium.org> Applied to u-boot/master, thanks!
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index d2dcec0..f19f779 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -47,27 +47,27 @@ static int single_configure_pins(struct udevice *dev, int n, reg; u32 val; - for (n = 0; n < count; n++) { + for (n = 0; n < count; n++, pins++) { reg = fdt32_to_cpu(pins->reg); if ((reg < 0) || (reg > pdata->offset)) { dev_dbg(dev, " invalid register offset 0x%08x\n", reg); - pins++; continue; } reg += pdata->base; + val = fdt32_to_cpu(pins->val) & pdata->mask; switch (pdata->width) { + case 16: + writew((readw(reg) & ~pdata->mask) | val, reg); + break; case 32: - val = readl(reg) & ~pdata->mask; - val |= fdt32_to_cpu(pins->val) & pdata->mask; - writel(val, reg); - dev_dbg(dev, " reg/val 0x%08x/0x%08x\n", - reg, val); + writel((readl(reg) & ~pdata->mask) | val, reg); break; default: dev_warn(dev, "unsupported register width %i\n", pdata->width); + continue; } - pins++; + dev_dbg(dev, " reg/val 0x%08x/0x%08x\n",reg, val); } return 0; }
Enables the pinctrl-single driver to support 16-bit registers. Only 32-bit registers were supported previously. Reduced width registers are required for some platforms, such as OMAP. Signed-off-by: James Balean <james@balean.com.au> Cc: Felix Brack <fb@ltec.ch> Cc: Simon Glass <sjg@chromium.org> --- Changes for v3: - Fixes incorrect v2 submission. - Inline rather than separate read/write function calls. drivers/pinctrl/pinctrl-single.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)