| Message ID | 1486047373-31676-3-git-send-email-jagan@openedev.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Stefano Babic |
| Headers | show |
On 02/02/2017 15:56, Jagan Teki wrote: > BOOT_CFG1[7:4] the NAND boot mode selection is done > only when BOOT_CFG1[7] is 1 hence update the NAND > boot mode detection bit case. This information available > on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM. > > Cc: Stefano Babic <sbabic@denx.de> > Cc: Tim Harvey <tharvey@gateworks.com> > Signed-off-by: Jagan Teki <jagan@openedev.com> > --- > arch/arm/imx-common/spl.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c > index a7f9705..fc3704b 100644 > --- a/arch/arm/imx-common/spl.c > +++ b/arch/arm/imx-common/spl.c > @@ -61,8 +61,8 @@ u32 spl_boot_device(void) > case 0x6: > case 0x7: > return BOOT_DEVICE_MMC1; > - /* NAND Flash: 8.5.2 */ > - case 0x8 ... 0xf: > + /* NAND Flash: 8.5.2, Table 8-10 */ > + case 0x8: > return BOOT_DEVICE_NAND; > } > return BOOT_DEVICE_NONE; > Reviewed by : Stefano Babic |sbabic@denx.de> Best regards, Stefano Babic
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index a7f9705..fc3704b 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -61,8 +61,8 @@ u32 spl_boot_device(void) case 0x6: case 0x7: return BOOT_DEVICE_MMC1; - /* NAND Flash: 8.5.2 */ - case 0x8 ... 0xf: + /* NAND Flash: 8.5.2, Table 8-10 */ + case 0x8: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE;
BOOT_CFG1[7:4] the NAND boot mode selection is done only when BOOT_CFG1[7] is 1 hence update the NAND boot mode detection bit case. This information available on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Jagan Teki <jagan@openedev.com> --- arch/arm/imx-common/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)