Message ID | 4CA23950.1000108@eagerm.com |
---|---|
State | New |
Headers | show |
On Tue, 28 Sep 2010, Michael Eager wrote: > +extern char call_used_regs[]; Does this actually work now that call_used_regs is a macro in hard-reg-set.h? > +extern int target_flags; This will break when my patch <http://gcc.gnu.org/ml/gcc-patches/2010-09/msg02171.html> is in. Don't explicitly declare any variables from .opt files. > +/* This table translates options whose names would interfere > + with normal driver options and adds a 'Z' so that they can get to > + specs processing without interference. > + > + The -xl-* options are deprecated and should be replace with their > + corresponding equivalent: > + -xl-mode-executable ==> -mxl-mode-executable > + -xl-mode-xmdstub ==> -mxl-mode-xmdstub > + -xl-mode-bootstrap ==> -mxl-mode-bootstrap > + -xl-mode-novectors ==> -mxl-mode-novectors > +*/ > + > +#define TARGET_OPTION_TRANSLATE_TABLE \ > + { "-xl-mode-executable", "-Zxl-mode-executable" }, \ > + { "-xl-mode-xmdstub", "-Zxl-mode-xmdstub" }, \ > + { "-xl-mode-bootstrap", "-Zxl-mode-bootstrap" }, \ > + { "-xl-mode-novectors", "-Zxl-mode-novectors" } Is it possible for you to use the .opt alias facility instead of TARGET_OPTION_TRANSLATE_TABLE? If you make something an alias then you don't need to handle it in specs - you could alias these options directly to the -m versions, I'd have thought. I'd like to get rid of TARGET_OPTION_TRANSLATE_TABLE. > +#undef SWITCH_TAKES_ARG > +#define SWITCH_TAKES_ARG(CHAR) \ > + (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G') You're missing two other pieces of -G support: handling it in the handle_option hook, and use of g.opt in config.gcc. See <http://gcc.gnu.org/ml/gcc-patches/2010-07/msg02340.html> and <http://gcc.gnu.org/ml/gcc-patches/2010-08/msg00066.html>.
Michael Eager wrote: > Hi -- > > Attached are the final patches to the GCC trunk > and htdocs to add support for the Xilinx MicroBlaze > processor. These patches have been updated to the > current head but are otherwise identical to the > patches which were previously approved. > > The wwwdocs patches were approved by Gerald Pfeifer > off-list. > > Rather than repost each patch individually with its > ChangeLog, the attached patch contains the ChangeLogs. > The ChangeLogs are the same as previously posted. > > Please let me know ASAP if you see any problems > with checking these patches into GCC mainline. Patches to support MicroBlaze have been checked in.
Michael, My platform doesn't have FLOAT_MIN or FLOAT_MAX, aren't the C/C++ standard names FLT_MIN and FLT_MAX? I am also seeing cmpsi-2.c fail on execution but I haven't tracked down the reason for that yet. Steve Ellcey sje@cup.hp.com --- gcc/testsuite/gcc.c-torture/execute/cmpsf-1.c (revision 0) +++ gcc/testsuite/gcc.c-torture/execute/cmpsf-1.c (revision 0) +float args[] =3D +{ + 0.0F, + 1.0F, + -1.0F,=20 + FLOAT_MAX, + FLOAT_MIN, + 0.0000000000001F, + 123456789.0F, + -987654321.0F +};
On Tue, Sep 28, 2010 at 11:52 AM, Michael Eager <eager@eagerm.com> wrote: > Hi -- > > Attached are the final patches to the GCC trunk > and htdocs to add support for the Xilinx MicroBlaze > processor. These patches have been updated to the > current head but are otherwise identical to the > patches which were previously approved. > > The wwwdocs patches were approved by Gerald Pfeifer > off-list. > > Rather than repost each patch individually with its > ChangeLog, the attached patch contains the ChangeLogs. > The ChangeLogs are the same as previously posted. > > Please let me know ASAP if you see any problems > with checking these patches into GCC mainline. > It caused: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45856
H.J. Lu wrote: > > It caused: > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45856 I've updated the bug report with patches for the test cases. Tested on x86 and x86-64.
Index: backends.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/backends.html,v retrieving revision 1.36 diff -u -p -r1.36 backends.html --- backends.html 29 Jun 2009 23:13:12 -0000 1.36 +++ backends.html 27 Sep 2010 22:56:40 -0000 @@ -85,6 +85,7 @@ m68hc11 | L FI l c s m68k | ? c a mcore | ? FI gm d s mep | F C p g d t s +microblaze CB bd s mips | Q CB qr p bda s mmix | HM Q C q p b a e mn10300 | ?? c g s Index: index.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/index.html,v retrieving revision 1.751 diff -u -p -r1.751 index.html --- index.html 7 Aug 2010 17:50:57 -0000 1.751 +++ index.html 27 Sep 2010 22:56:40 -0000 @@ -51,6 +51,11 @@ mission statement</a>.</p> <dl class="news"> +<dt>September 28, 2010</dt> +<dd>Support has been added for the +<a href="gcc-4.6/changes.html#microblaze">Xilinx MicroBlaze softcore processor</a> +target by Michael Eager, Eager Consulting.</dd> + <dt>July 31, 2010</dt> <dd><a href="gcc-4.5/">GCC 4.5.1</a> has been released.</dd> Index: readings.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/readings.html,v retrieving revision 1.198 diff -u -p -r1.198 readings.html --- readings.html 2 May 2010 19:42:24 -0000 1.198 +++ readings.html 27 Sep 2010 22:56:40 -0000 @@ -172,6 +172,13 @@ Intel®64 and IA-32 Architectures Sof <br />SID includes a MeP simulator. </li> + <li>MicroBlace + <br />Manufacturer: Xilinx + <br /><a href="http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/mb_ref_guide.pdf"> + MicroBlaze Processor Reference Guide</a> + <br />GDB includes a simulator for an earlier version of the processor. + </li> + <li>mips (mipsel, mips64, mips64el) <br />The *el variants are little-endian configurations. </li> Index: gcc-4.6/changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.6/changes.html,v retrieving revision 1.44 diff -u -p -r1.44 changes.html --- gcc-4.6/changes.html 25 Sep 2010 07:08:58 -0000 1.44 +++ gcc-4.6/changes.html 27 Sep 2010 22:56:42 -0000 @@ -265,6 +265,12 @@ the <code>--enable-frame-pointer</code> configure option.</li> </ul> +<h3 id="microblaze">MicroBlaze</h3> + +<p>Support has been added for the Xilinx MicroBlaze softcore Processor +(microblaze-elf) embedded target. This configurable processor is +supported on several Xilinx Spartan and Virtex FPGAs. </p> + <h3>MIPS</h3> <h3 id="picochip">picochip</h3>